125 lines
3.3 KiB
C
125 lines
3.3 KiB
C
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/*
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* Copyright (C) 2010-2016 NVIDIA Corporation. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __LINUX_IRQCHIP_TEGRA_H
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#define __LINUX_IRQCHIP_TEGRA_H
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#define PMC_MAX_WAKE_COUNT 64
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#define GIC_V1 1
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#define GIC_V2 2
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/* tegra internal any polarity wake sources */
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enum {
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ANY_WAKE_INDEX_VBUS = 0,
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ANY_WAKE_INDEX_ID
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};
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#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_PM_SLEEP)
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void tegra_gic_cpu_disable(bool disable_pass_through);
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void tegra_gic_cpu_enable(void);
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#endif
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#if defined(CONFIG_PM_SLEEP)
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int tegra_gic_pending_interrupt(void);
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#ifndef CONFIG_ARCH_TEGRA_2x_SOC
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void tegra_gic_dist_disable(void);
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void tegra_gic_dist_enable(void);
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void tegra_gic_disable_affinity(void);
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void tegra_gic_restore_affinity(void);
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void tegra_gic_affinity_to_cpu0(void);
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#endif
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#endif
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u32 tegra_gic_version(void);
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extern int *tegra_gpio_wake_table;
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extern int *tegra_irq_wake_table;
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extern int tegra_wake_table_len;
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#if defined(CONFIG_ARCH_TEGRA_18x_SOC)
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int tegra18x_read_wake_status(u32 *wake_status);
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#else
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static inline int tegra18x_read_wake_status(u32 *wake_status)
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{
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return -EINVAL;
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}
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#endif
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#if defined(CONFIG_PM_SLEEP)
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int tegra_wakeup_table_init(void);
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int tegra_read_wake_status(u32 *wake_status);
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int tegra_pm_irq_set_wake(int wake, int enable);
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int tegra_pm_irq_set_wake_type(int wake, int flow_type);
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bool tegra_pm_irq_lp0_allowed(void);
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void tegra_irq_to_wake(int irq, int *wak_list, int *wak_size);
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int tegra_wake_to_irq(int wake);
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int tegra_wake_to_gpio(int wake);
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void tegra_pm_update_gpio_wakeup_table(int base, int *gpio_wakeup_list,
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int nlist);
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#else
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static inline int tegra_wakeup_table_init(void)
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{
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tegra_gpio_wake_table = NULL;
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tegra_irq_wake_table = NULL;
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tegra_wake_table_len = 0;
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return 0;
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}
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static inline int tegra_pm_irq_set_wake(int wake, int enable)
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{
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return 0;
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}
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static inline int tegra_pm_irq_set_wake_type(int wake, int flow_type)
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{
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return 0;
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}
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static inline
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void tegra_irq_to_wake(int irq, int *wak_list, int *wak_size)
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{
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*wak_size = 0;
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return;
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}
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static inline void tegra_pm_update_gpio_wakeup_table(int base,
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int *gpio_wakeup_list,
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int nlist)
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{
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}
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#endif
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void tegra_set_usb_wake_source(void);
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/* get chip specific list of internal any polarity wake sources */
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void tegra_get_internal_any_wake_list(u8 *wake_count, u8 **any_wake,
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u8 *remote_usb_wak_index);
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/*
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* is_vbus_connected - true when VBUS cable is connected
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* is_id_connected - true when ID cable is connected
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* returns error if failed to read the status for a chip
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* or if the API is not supported
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*/
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int get_vbus_id_cable_connect_state(bool *is_vbus_connected,
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bool *is_id_connected);
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/* enable/disable an interrupt that is an FIQ (safe from FIQ context?) */
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void tegra_fiq_enable(int n);
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void tegra_fiq_disable(int n);
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void tegra_init_legacy_irq_cop(void);
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/* lp1 wake interrupts enabled or disabled using this API */
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int tegra_update_lp1_irq_wake(unsigned int irq, bool enable);
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#endif /* __LINUX_IRQCHIP_TEGRA_H */
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