635 lines
21 KiB
C
635 lines
21 KiB
C
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#include <stdio.h>
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#include "evsel.h"
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#include "stat.h"
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#include "color.h"
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#include "pmu.h"
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enum {
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CTX_BIT_USER = 1 << 0,
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CTX_BIT_KERNEL = 1 << 1,
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CTX_BIT_HV = 1 << 2,
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CTX_BIT_HOST = 1 << 3,
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CTX_BIT_IDLE = 1 << 4,
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CTX_BIT_MAX = 1 << 5,
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};
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#define NUM_CTX CTX_BIT_MAX
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/*
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* AGGR_GLOBAL: Use CPU 0
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* AGGR_SOCKET: Use first CPU of socket
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* AGGR_CORE: Use first CPU of core
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* AGGR_NONE: Use matching CPU
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* AGGR_THREAD: Not supported?
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*/
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static struct stats runtime_nsecs_stats[MAX_NR_CPUS];
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static struct stats runtime_cycles_stats[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_stalled_cycles_front_stats[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_stalled_cycles_back_stats[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_branches_stats[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_cacherefs_stats[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_l1_dcache_stats[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_l1_icache_stats[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_ll_cache_stats[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_itlb_cache_stats[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_dtlb_cache_stats[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_cycles_in_tx_stats[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_transaction_stats[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_elision_stats[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_topdown_total_slots[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_topdown_slots_issued[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_topdown_slots_retired[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_topdown_fetch_bubbles[NUM_CTX][MAX_NR_CPUS];
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static struct stats runtime_topdown_recovery_bubbles[NUM_CTX][MAX_NR_CPUS];
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static bool have_frontend_stalled;
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struct stats walltime_nsecs_stats;
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void perf_stat__init_shadow_stats(void)
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{
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have_frontend_stalled = pmu_have_event("cpu", "stalled-cycles-frontend");
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}
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static int evsel_context(struct perf_evsel *evsel)
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{
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int ctx = 0;
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if (evsel->attr.exclude_kernel)
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ctx |= CTX_BIT_KERNEL;
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if (evsel->attr.exclude_user)
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ctx |= CTX_BIT_USER;
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if (evsel->attr.exclude_hv)
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ctx |= CTX_BIT_HV;
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if (evsel->attr.exclude_host)
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ctx |= CTX_BIT_HOST;
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if (evsel->attr.exclude_idle)
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ctx |= CTX_BIT_IDLE;
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return ctx;
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}
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void perf_stat__reset_shadow_stats(void)
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{
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memset(runtime_nsecs_stats, 0, sizeof(runtime_nsecs_stats));
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memset(runtime_cycles_stats, 0, sizeof(runtime_cycles_stats));
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memset(runtime_stalled_cycles_front_stats, 0, sizeof(runtime_stalled_cycles_front_stats));
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memset(runtime_stalled_cycles_back_stats, 0, sizeof(runtime_stalled_cycles_back_stats));
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memset(runtime_branches_stats, 0, sizeof(runtime_branches_stats));
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memset(runtime_cacherefs_stats, 0, sizeof(runtime_cacherefs_stats));
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memset(runtime_l1_dcache_stats, 0, sizeof(runtime_l1_dcache_stats));
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memset(runtime_l1_icache_stats, 0, sizeof(runtime_l1_icache_stats));
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memset(runtime_ll_cache_stats, 0, sizeof(runtime_ll_cache_stats));
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memset(runtime_itlb_cache_stats, 0, sizeof(runtime_itlb_cache_stats));
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memset(runtime_dtlb_cache_stats, 0, sizeof(runtime_dtlb_cache_stats));
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memset(runtime_cycles_in_tx_stats, 0,
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sizeof(runtime_cycles_in_tx_stats));
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memset(runtime_transaction_stats, 0,
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sizeof(runtime_transaction_stats));
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memset(runtime_elision_stats, 0, sizeof(runtime_elision_stats));
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memset(&walltime_nsecs_stats, 0, sizeof(walltime_nsecs_stats));
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memset(runtime_topdown_total_slots, 0, sizeof(runtime_topdown_total_slots));
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memset(runtime_topdown_slots_retired, 0, sizeof(runtime_topdown_slots_retired));
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memset(runtime_topdown_slots_issued, 0, sizeof(runtime_topdown_slots_issued));
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memset(runtime_topdown_fetch_bubbles, 0, sizeof(runtime_topdown_fetch_bubbles));
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memset(runtime_topdown_recovery_bubbles, 0, sizeof(runtime_topdown_recovery_bubbles));
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}
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/*
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* Update various tracking values we maintain to print
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* more semantic information such as miss/hit ratios,
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* instruction rates, etc:
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*/
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void perf_stat__update_shadow_stats(struct perf_evsel *counter, u64 *count,
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int cpu)
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{
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int ctx = evsel_context(counter);
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if (perf_evsel__match(counter, SOFTWARE, SW_TASK_CLOCK) ||
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perf_evsel__match(counter, SOFTWARE, SW_CPU_CLOCK))
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update_stats(&runtime_nsecs_stats[cpu], count[0]);
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else if (perf_evsel__match(counter, HARDWARE, HW_CPU_CYCLES))
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update_stats(&runtime_cycles_stats[ctx][cpu], count[0]);
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else if (perf_stat_evsel__is(counter, CYCLES_IN_TX))
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update_stats(&runtime_cycles_in_tx_stats[ctx][cpu], count[0]);
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else if (perf_stat_evsel__is(counter, TRANSACTION_START))
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update_stats(&runtime_transaction_stats[ctx][cpu], count[0]);
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else if (perf_stat_evsel__is(counter, ELISION_START))
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update_stats(&runtime_elision_stats[ctx][cpu], count[0]);
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else if (perf_stat_evsel__is(counter, TOPDOWN_TOTAL_SLOTS))
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update_stats(&runtime_topdown_total_slots[ctx][cpu], count[0]);
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else if (perf_stat_evsel__is(counter, TOPDOWN_SLOTS_ISSUED))
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update_stats(&runtime_topdown_slots_issued[ctx][cpu], count[0]);
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else if (perf_stat_evsel__is(counter, TOPDOWN_SLOTS_RETIRED))
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update_stats(&runtime_topdown_slots_retired[ctx][cpu], count[0]);
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else if (perf_stat_evsel__is(counter, TOPDOWN_FETCH_BUBBLES))
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update_stats(&runtime_topdown_fetch_bubbles[ctx][cpu],count[0]);
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else if (perf_stat_evsel__is(counter, TOPDOWN_RECOVERY_BUBBLES))
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update_stats(&runtime_topdown_recovery_bubbles[ctx][cpu], count[0]);
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else if (perf_evsel__match(counter, HARDWARE, HW_STALLED_CYCLES_FRONTEND))
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update_stats(&runtime_stalled_cycles_front_stats[ctx][cpu], count[0]);
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else if (perf_evsel__match(counter, HARDWARE, HW_STALLED_CYCLES_BACKEND))
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update_stats(&runtime_stalled_cycles_back_stats[ctx][cpu], count[0]);
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else if (perf_evsel__match(counter, HARDWARE, HW_BRANCH_INSTRUCTIONS))
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update_stats(&runtime_branches_stats[ctx][cpu], count[0]);
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else if (perf_evsel__match(counter, HARDWARE, HW_CACHE_REFERENCES))
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update_stats(&runtime_cacherefs_stats[ctx][cpu], count[0]);
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else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_L1D))
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update_stats(&runtime_l1_dcache_stats[ctx][cpu], count[0]);
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else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_L1I))
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update_stats(&runtime_ll_cache_stats[ctx][cpu], count[0]);
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else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_LL))
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update_stats(&runtime_ll_cache_stats[ctx][cpu], count[0]);
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else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_DTLB))
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update_stats(&runtime_dtlb_cache_stats[ctx][cpu], count[0]);
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else if (perf_evsel__match(counter, HW_CACHE, HW_CACHE_ITLB))
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update_stats(&runtime_itlb_cache_stats[ctx][cpu], count[0]);
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}
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/* used for get_ratio_color() */
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enum grc_type {
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GRC_STALLED_CYCLES_FE,
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GRC_STALLED_CYCLES_BE,
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GRC_CACHE_MISSES,
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GRC_MAX_NR
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};
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static const char *get_ratio_color(enum grc_type type, double ratio)
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{
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static const double grc_table[GRC_MAX_NR][3] = {
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[GRC_STALLED_CYCLES_FE] = { 50.0, 30.0, 10.0 },
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[GRC_STALLED_CYCLES_BE] = { 75.0, 50.0, 20.0 },
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[GRC_CACHE_MISSES] = { 20.0, 10.0, 5.0 },
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};
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const char *color = PERF_COLOR_NORMAL;
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if (ratio > grc_table[type][0])
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color = PERF_COLOR_RED;
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else if (ratio > grc_table[type][1])
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color = PERF_COLOR_MAGENTA;
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else if (ratio > grc_table[type][2])
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color = PERF_COLOR_YELLOW;
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return color;
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}
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static void print_stalled_cycles_frontend(int cpu,
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struct perf_evsel *evsel, double avg,
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struct perf_stat_output_ctx *out)
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{
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double total, ratio = 0.0;
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const char *color;
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int ctx = evsel_context(evsel);
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total = avg_stats(&runtime_cycles_stats[ctx][cpu]);
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if (total)
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ratio = avg / total * 100.0;
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color = get_ratio_color(GRC_STALLED_CYCLES_FE, ratio);
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if (ratio)
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out->print_metric(out->ctx, color, "%7.2f%%", "frontend cycles idle",
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ratio);
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else
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out->print_metric(out->ctx, NULL, NULL, "frontend cycles idle", 0);
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}
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static void print_stalled_cycles_backend(int cpu,
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struct perf_evsel *evsel, double avg,
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struct perf_stat_output_ctx *out)
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{
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double total, ratio = 0.0;
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const char *color;
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int ctx = evsel_context(evsel);
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total = avg_stats(&runtime_cycles_stats[ctx][cpu]);
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if (total)
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ratio = avg / total * 100.0;
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color = get_ratio_color(GRC_STALLED_CYCLES_BE, ratio);
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out->print_metric(out->ctx, color, "%7.2f%%", "backend cycles idle", ratio);
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}
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static void print_branch_misses(int cpu,
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struct perf_evsel *evsel,
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double avg,
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struct perf_stat_output_ctx *out)
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{
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double total, ratio = 0.0;
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const char *color;
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int ctx = evsel_context(evsel);
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total = avg_stats(&runtime_branches_stats[ctx][cpu]);
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if (total)
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ratio = avg / total * 100.0;
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color = get_ratio_color(GRC_CACHE_MISSES, ratio);
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out->print_metric(out->ctx, color, "%7.2f%%", "of all branches", ratio);
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}
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static void print_l1_dcache_misses(int cpu,
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struct perf_evsel *evsel,
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double avg,
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struct perf_stat_output_ctx *out)
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{
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double total, ratio = 0.0;
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const char *color;
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int ctx = evsel_context(evsel);
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total = avg_stats(&runtime_l1_dcache_stats[ctx][cpu]);
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if (total)
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ratio = avg / total * 100.0;
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color = get_ratio_color(GRC_CACHE_MISSES, ratio);
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out->print_metric(out->ctx, color, "%7.2f%%", "of all L1-dcache hits", ratio);
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}
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static void print_l1_icache_misses(int cpu,
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struct perf_evsel *evsel,
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double avg,
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struct perf_stat_output_ctx *out)
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{
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double total, ratio = 0.0;
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const char *color;
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int ctx = evsel_context(evsel);
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total = avg_stats(&runtime_l1_icache_stats[ctx][cpu]);
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if (total)
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ratio = avg / total * 100.0;
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color = get_ratio_color(GRC_CACHE_MISSES, ratio);
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out->print_metric(out->ctx, color, "%7.2f%%", "of all L1-icache hits", ratio);
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}
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static void print_dtlb_cache_misses(int cpu,
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struct perf_evsel *evsel,
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double avg,
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struct perf_stat_output_ctx *out)
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{
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double total, ratio = 0.0;
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const char *color;
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int ctx = evsel_context(evsel);
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total = avg_stats(&runtime_dtlb_cache_stats[ctx][cpu]);
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if (total)
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ratio = avg / total * 100.0;
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color = get_ratio_color(GRC_CACHE_MISSES, ratio);
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out->print_metric(out->ctx, color, "%7.2f%%", "of all dTLB cache hits", ratio);
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}
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static void print_itlb_cache_misses(int cpu,
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struct perf_evsel *evsel,
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double avg,
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struct perf_stat_output_ctx *out)
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{
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double total, ratio = 0.0;
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const char *color;
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int ctx = evsel_context(evsel);
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total = avg_stats(&runtime_itlb_cache_stats[ctx][cpu]);
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if (total)
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ratio = avg / total * 100.0;
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color = get_ratio_color(GRC_CACHE_MISSES, ratio);
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out->print_metric(out->ctx, color, "%7.2f%%", "of all iTLB cache hits", ratio);
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}
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static void print_ll_cache_misses(int cpu,
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struct perf_evsel *evsel,
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double avg,
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struct perf_stat_output_ctx *out)
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{
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double total, ratio = 0.0;
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const char *color;
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int ctx = evsel_context(evsel);
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total = avg_stats(&runtime_ll_cache_stats[ctx][cpu]);
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if (total)
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ratio = avg / total * 100.0;
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color = get_ratio_color(GRC_CACHE_MISSES, ratio);
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out->print_metric(out->ctx, color, "%7.2f%%", "of all LL-cache hits", ratio);
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}
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/*
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* High level "TopDown" CPU core pipe line bottleneck break down.
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*
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* Basic concept following
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* Yasin, A Top Down Method for Performance analysis and Counter architecture
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* ISPASS14
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*
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* The CPU pipeline is divided into 4 areas that can be bottlenecks:
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*
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* Frontend -> Backend -> Retiring
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* BadSpeculation in addition means out of order execution that is thrown away
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* (for example branch mispredictions)
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* Frontend is instruction decoding.
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* Backend is execution, like computation and accessing data in memory
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* Retiring is good execution that is not directly bottlenecked
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*
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* The formulas are computed in slots.
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* A slot is an entry in the pipeline each for the pipeline width
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* (for example a 4-wide pipeline has 4 slots for each cycle)
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*
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* Formulas:
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* BadSpeculation = ((SlotsIssued - SlotsRetired) + RecoveryBubbles) /
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* TotalSlots
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* Retiring = SlotsRetired / TotalSlots
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* FrontendBound = FetchBubbles / TotalSlots
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* BackendBound = 1.0 - BadSpeculation - Retiring - FrontendBound
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*
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* The kernel provides the mapping to the low level CPU events and any scaling
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* needed for the CPU pipeline width, for example:
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*
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* TotalSlots = Cycles * 4
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*
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* The scaling factor is communicated in the sysfs unit.
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*
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* In some cases the CPU may not be able to measure all the formulas due to
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* missing events. In this case multiple formulas are combined, as possible.
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*
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* Full TopDown supports more levels to sub-divide each area: for example
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* BackendBound into computing bound and memory bound. For now we only
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* support Level 1 TopDown.
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*/
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static double sanitize_val(double x)
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{
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if (x < 0 && x >= -0.02)
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return 0.0;
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return x;
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}
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static double td_total_slots(int ctx, int cpu)
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{
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return avg_stats(&runtime_topdown_total_slots[ctx][cpu]);
|
||
|
}
|
||
|
|
||
|
static double td_bad_spec(int ctx, int cpu)
|
||
|
{
|
||
|
double bad_spec = 0;
|
||
|
double total_slots;
|
||
|
double total;
|
||
|
|
||
|
total = avg_stats(&runtime_topdown_slots_issued[ctx][cpu]) -
|
||
|
avg_stats(&runtime_topdown_slots_retired[ctx][cpu]) +
|
||
|
avg_stats(&runtime_topdown_recovery_bubbles[ctx][cpu]);
|
||
|
total_slots = td_total_slots(ctx, cpu);
|
||
|
if (total_slots)
|
||
|
bad_spec = total / total_slots;
|
||
|
return sanitize_val(bad_spec);
|
||
|
}
|
||
|
|
||
|
static double td_retiring(int ctx, int cpu)
|
||
|
{
|
||
|
double retiring = 0;
|
||
|
double total_slots = td_total_slots(ctx, cpu);
|
||
|
double ret_slots = avg_stats(&runtime_topdown_slots_retired[ctx][cpu]);
|
||
|
|
||
|
if (total_slots)
|
||
|
retiring = ret_slots / total_slots;
|
||
|
return retiring;
|
||
|
}
|
||
|
|
||
|
static double td_fe_bound(int ctx, int cpu)
|
||
|
{
|
||
|
double fe_bound = 0;
|
||
|
double total_slots = td_total_slots(ctx, cpu);
|
||
|
double fetch_bub = avg_stats(&runtime_topdown_fetch_bubbles[ctx][cpu]);
|
||
|
|
||
|
if (total_slots)
|
||
|
fe_bound = fetch_bub / total_slots;
|
||
|
return fe_bound;
|
||
|
}
|
||
|
|
||
|
static double td_be_bound(int ctx, int cpu)
|
||
|
{
|
||
|
double sum = (td_fe_bound(ctx, cpu) +
|
||
|
td_bad_spec(ctx, cpu) +
|
||
|
td_retiring(ctx, cpu));
|
||
|
if (sum == 0)
|
||
|
return 0;
|
||
|
return sanitize_val(1.0 - sum);
|
||
|
}
|
||
|
|
||
|
void perf_stat__print_shadow_stats(struct perf_evsel *evsel,
|
||
|
double avg, int cpu,
|
||
|
struct perf_stat_output_ctx *out)
|
||
|
{
|
||
|
void *ctxp = out->ctx;
|
||
|
print_metric_t print_metric = out->print_metric;
|
||
|
double total, ratio = 0.0, total2;
|
||
|
const char *color = NULL;
|
||
|
int ctx = evsel_context(evsel);
|
||
|
|
||
|
if (perf_evsel__match(evsel, HARDWARE, HW_INSTRUCTIONS)) {
|
||
|
total = avg_stats(&runtime_cycles_stats[ctx][cpu]);
|
||
|
if (total) {
|
||
|
ratio = avg / total;
|
||
|
print_metric(ctxp, NULL, "%7.2f ",
|
||
|
"insn per cycle", ratio);
|
||
|
} else {
|
||
|
print_metric(ctxp, NULL, NULL, "insn per cycle", 0);
|
||
|
}
|
||
|
total = avg_stats(&runtime_stalled_cycles_front_stats[ctx][cpu]);
|
||
|
total = max(total, avg_stats(&runtime_stalled_cycles_back_stats[ctx][cpu]));
|
||
|
|
||
|
if (total && avg) {
|
||
|
out->new_line(ctxp);
|
||
|
ratio = total / avg;
|
||
|
print_metric(ctxp, NULL, "%7.2f ",
|
||
|
"stalled cycles per insn",
|
||
|
ratio);
|
||
|
} else if (have_frontend_stalled) {
|
||
|
print_metric(ctxp, NULL, NULL,
|
||
|
"stalled cycles per insn", 0);
|
||
|
}
|
||
|
} else if (perf_evsel__match(evsel, HARDWARE, HW_BRANCH_MISSES)) {
|
||
|
if (runtime_branches_stats[ctx][cpu].n != 0)
|
||
|
print_branch_misses(cpu, evsel, avg, out);
|
||
|
else
|
||
|
print_metric(ctxp, NULL, NULL, "of all branches", 0);
|
||
|
} else if (
|
||
|
evsel->attr.type == PERF_TYPE_HW_CACHE &&
|
||
|
evsel->attr.config == ( PERF_COUNT_HW_CACHE_L1D |
|
||
|
((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
|
||
|
((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))) {
|
||
|
if (runtime_l1_dcache_stats[ctx][cpu].n != 0)
|
||
|
print_l1_dcache_misses(cpu, evsel, avg, out);
|
||
|
else
|
||
|
print_metric(ctxp, NULL, NULL, "of all L1-dcache hits", 0);
|
||
|
} else if (
|
||
|
evsel->attr.type == PERF_TYPE_HW_CACHE &&
|
||
|
evsel->attr.config == ( PERF_COUNT_HW_CACHE_L1I |
|
||
|
((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
|
||
|
((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))) {
|
||
|
if (runtime_l1_icache_stats[ctx][cpu].n != 0)
|
||
|
print_l1_icache_misses(cpu, evsel, avg, out);
|
||
|
else
|
||
|
print_metric(ctxp, NULL, NULL, "of all L1-icache hits", 0);
|
||
|
} else if (
|
||
|
evsel->attr.type == PERF_TYPE_HW_CACHE &&
|
||
|
evsel->attr.config == ( PERF_COUNT_HW_CACHE_DTLB |
|
||
|
((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
|
||
|
((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))) {
|
||
|
if (runtime_dtlb_cache_stats[ctx][cpu].n != 0)
|
||
|
print_dtlb_cache_misses(cpu, evsel, avg, out);
|
||
|
else
|
||
|
print_metric(ctxp, NULL, NULL, "of all dTLB cache hits", 0);
|
||
|
} else if (
|
||
|
evsel->attr.type == PERF_TYPE_HW_CACHE &&
|
||
|
evsel->attr.config == ( PERF_COUNT_HW_CACHE_ITLB |
|
||
|
((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
|
||
|
((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))) {
|
||
|
if (runtime_itlb_cache_stats[ctx][cpu].n != 0)
|
||
|
print_itlb_cache_misses(cpu, evsel, avg, out);
|
||
|
else
|
||
|
print_metric(ctxp, NULL, NULL, "of all iTLB cache hits", 0);
|
||
|
} else if (
|
||
|
evsel->attr.type == PERF_TYPE_HW_CACHE &&
|
||
|
evsel->attr.config == ( PERF_COUNT_HW_CACHE_LL |
|
||
|
((PERF_COUNT_HW_CACHE_OP_READ) << 8) |
|
||
|
((PERF_COUNT_HW_CACHE_RESULT_MISS) << 16))) {
|
||
|
if (runtime_ll_cache_stats[ctx][cpu].n != 0)
|
||
|
print_ll_cache_misses(cpu, evsel, avg, out);
|
||
|
else
|
||
|
print_metric(ctxp, NULL, NULL, "of all LL-cache hits", 0);
|
||
|
} else if (perf_evsel__match(evsel, HARDWARE, HW_CACHE_MISSES)) {
|
||
|
total = avg_stats(&runtime_cacherefs_stats[ctx][cpu]);
|
||
|
|
||
|
if (total)
|
||
|
ratio = avg * 100 / total;
|
||
|
|
||
|
if (runtime_cacherefs_stats[ctx][cpu].n != 0)
|
||
|
print_metric(ctxp, NULL, "%8.3f %%",
|
||
|
"of all cache refs", ratio);
|
||
|
else
|
||
|
print_metric(ctxp, NULL, NULL, "of all cache refs", 0);
|
||
|
} else if (perf_evsel__match(evsel, HARDWARE, HW_STALLED_CYCLES_FRONTEND)) {
|
||
|
print_stalled_cycles_frontend(cpu, evsel, avg, out);
|
||
|
} else if (perf_evsel__match(evsel, HARDWARE, HW_STALLED_CYCLES_BACKEND)) {
|
||
|
print_stalled_cycles_backend(cpu, evsel, avg, out);
|
||
|
} else if (perf_evsel__match(evsel, HARDWARE, HW_CPU_CYCLES)) {
|
||
|
total = avg_stats(&runtime_nsecs_stats[cpu]);
|
||
|
|
||
|
if (total) {
|
||
|
ratio = avg / total;
|
||
|
print_metric(ctxp, NULL, "%8.3f", "GHz", ratio);
|
||
|
} else {
|
||
|
print_metric(ctxp, NULL, NULL, "Ghz", 0);
|
||
|
}
|
||
|
} else if (perf_stat_evsel__is(evsel, CYCLES_IN_TX)) {
|
||
|
total = avg_stats(&runtime_cycles_stats[ctx][cpu]);
|
||
|
if (total)
|
||
|
print_metric(ctxp, NULL,
|
||
|
"%7.2f%%", "transactional cycles",
|
||
|
100.0 * (avg / total));
|
||
|
else
|
||
|
print_metric(ctxp, NULL, NULL, "transactional cycles",
|
||
|
0);
|
||
|
} else if (perf_stat_evsel__is(evsel, CYCLES_IN_TX_CP)) {
|
||
|
total = avg_stats(&runtime_cycles_stats[ctx][cpu]);
|
||
|
total2 = avg_stats(&runtime_cycles_in_tx_stats[ctx][cpu]);
|
||
|
if (total2 < avg)
|
||
|
total2 = avg;
|
||
|
if (total)
|
||
|
print_metric(ctxp, NULL, "%7.2f%%", "aborted cycles",
|
||
|
100.0 * ((total2-avg) / total));
|
||
|
else
|
||
|
print_metric(ctxp, NULL, NULL, "aborted cycles", 0);
|
||
|
} else if (perf_stat_evsel__is(evsel, TRANSACTION_START)) {
|
||
|
total = avg_stats(&runtime_cycles_in_tx_stats[ctx][cpu]);
|
||
|
|
||
|
if (avg)
|
||
|
ratio = total / avg;
|
||
|
|
||
|
if (runtime_cycles_in_tx_stats[ctx][cpu].n != 0)
|
||
|
print_metric(ctxp, NULL, "%8.0f",
|
||
|
"cycles / transaction", ratio);
|
||
|
else
|
||
|
print_metric(ctxp, NULL, NULL, "cycles / transaction",
|
||
|
0);
|
||
|
} else if (perf_stat_evsel__is(evsel, ELISION_START)) {
|
||
|
total = avg_stats(&runtime_cycles_in_tx_stats[ctx][cpu]);
|
||
|
|
||
|
if (avg)
|
||
|
ratio = total / avg;
|
||
|
|
||
|
print_metric(ctxp, NULL, "%8.0f", "cycles / elision", ratio);
|
||
|
} else if (perf_evsel__match(evsel, SOFTWARE, SW_TASK_CLOCK) ||
|
||
|
perf_evsel__match(evsel, SOFTWARE, SW_CPU_CLOCK)) {
|
||
|
if ((ratio = avg_stats(&walltime_nsecs_stats)) != 0)
|
||
|
print_metric(ctxp, NULL, "%8.3f", "CPUs utilized",
|
||
|
avg / ratio);
|
||
|
else
|
||
|
print_metric(ctxp, NULL, NULL, "CPUs utilized", 0);
|
||
|
} else if (perf_stat_evsel__is(evsel, TOPDOWN_FETCH_BUBBLES)) {
|
||
|
double fe_bound = td_fe_bound(ctx, cpu);
|
||
|
|
||
|
if (fe_bound > 0.2)
|
||
|
color = PERF_COLOR_RED;
|
||
|
print_metric(ctxp, color, "%8.1f%%", "frontend bound",
|
||
|
fe_bound * 100.);
|
||
|
} else if (perf_stat_evsel__is(evsel, TOPDOWN_SLOTS_RETIRED)) {
|
||
|
double retiring = td_retiring(ctx, cpu);
|
||
|
|
||
|
if (retiring > 0.7)
|
||
|
color = PERF_COLOR_GREEN;
|
||
|
print_metric(ctxp, color, "%8.1f%%", "retiring",
|
||
|
retiring * 100.);
|
||
|
} else if (perf_stat_evsel__is(evsel, TOPDOWN_RECOVERY_BUBBLES)) {
|
||
|
double bad_spec = td_bad_spec(ctx, cpu);
|
||
|
|
||
|
if (bad_spec > 0.1)
|
||
|
color = PERF_COLOR_RED;
|
||
|
print_metric(ctxp, color, "%8.1f%%", "bad speculation",
|
||
|
bad_spec * 100.);
|
||
|
} else if (perf_stat_evsel__is(evsel, TOPDOWN_SLOTS_ISSUED)) {
|
||
|
double be_bound = td_be_bound(ctx, cpu);
|
||
|
const char *name = "backend bound";
|
||
|
static int have_recovery_bubbles = -1;
|
||
|
|
||
|
/* In case the CPU does not support topdown-recovery-bubbles */
|
||
|
if (have_recovery_bubbles < 0)
|
||
|
have_recovery_bubbles = pmu_have_event("cpu",
|
||
|
"topdown-recovery-bubbles");
|
||
|
if (!have_recovery_bubbles)
|
||
|
name = "backend bound/bad spec";
|
||
|
|
||
|
if (be_bound > 0.2)
|
||
|
color = PERF_COLOR_RED;
|
||
|
if (td_total_slots(ctx, cpu) > 0)
|
||
|
print_metric(ctxp, color, "%8.1f%%", name,
|
||
|
be_bound * 100.);
|
||
|
else
|
||
|
print_metric(ctxp, NULL, NULL, name, 0);
|
||
|
} else if (runtime_nsecs_stats[cpu].n != 0) {
|
||
|
char unit = 'M';
|
||
|
char unit_buf[10];
|
||
|
|
||
|
total = avg_stats(&runtime_nsecs_stats[cpu]);
|
||
|
|
||
|
if (total)
|
||
|
ratio = 1000.0 * avg / total;
|
||
|
if (ratio < 0.001) {
|
||
|
ratio *= 1000;
|
||
|
unit = 'K';
|
||
|
}
|
||
|
snprintf(unit_buf, sizeof(unit_buf), "%c/sec", unit);
|
||
|
print_metric(ctxp, NULL, "%8.3f", unit_buf, ratio);
|
||
|
} else {
|
||
|
print_metric(ctxp, NULL, NULL, NULL, 0);
|
||
|
}
|
||
|
}
|