117 lines
3.2 KiB
Plaintext
117 lines
3.2 KiB
Plaintext
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Binding document for T194 PCIE PEXCLK Single/differential end selection
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======================================================================
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This document defines the device-specific binding for the T194 PCIE
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PEXCLK pad control for single or differential ends.
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Required properties:
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--------------------
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- compatible: Must be "nvidia,tegra194-pexclk-padctl"
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- reg: Should contain a list of base address and size pairs for:
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- first entry: The base address and size of PCIE_PEXCLK_PADCTRL0
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- second entry: The base address and size of PCIE_PEXCLK_PADCTRL0
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Please refer to pinctrl-bindings.txt @Documentation/devicetree/bindings/pinctrl
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for details of the common pinctrl bindings used by client devices, including
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the meaning of the phrase "pin configuration node".
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Optional Pinmux properties:
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--------------------------
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Following properties are required if default setting of pins are required
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at boot.
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- pinctrl-names: A pinctrl state named per <pinctrl-binding.txt>.
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- pinctrl[0...n]: Properties to contain the phandle for pinctrl states per
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<pinctrl-binding.txt>.
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The pin configurations are defined as child of the pinctrl states node. Each
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sub-node have following properties:
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Required properties:
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------------------
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- pins: List of pins. Valid values of pins properties are:
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pexclk.
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Child nodes contain the pinmux configurations following the conventions from
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the pinctrl-bindings.txt document. Typically a single, static configuration is
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given and applied at boot time.
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Optional properties:
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-------------------
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nvidia,pexclk-single-end: Integer, Enable/disable single end on PCIE pexclk
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pads. The valid values are 0 or 1.
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0: Disable single end, means differential.
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1: Enable single end, means single end clocks.
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Optional prod nodes:
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-------------------
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Prod configuration can be provided per the prod DT binding for
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prod initialisation. Default prod name is "prod";
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Example:
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========
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pinctrl@3790000 {
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compatible = "nvidia,tegra194-pexclk-padctl";
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reg = <0x0 0x03790000 0x0 0x1000>,
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<0x0 0x037a0000 0x0 0x1000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pexclk_pads_default>;
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pexclk_pads_default: pexclk_pads_default {
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pexclk {
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pins = "pexclk";
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nvidia,pexclk-single-end = <1>;
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};
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};
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};
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The above DT configuration will configure pexclk in single ended.
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For dynamic switching, the client node need to pass the required
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phandle. Following are changes needed in the pinctrl and client
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DT node.
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pinctrl@3790000 {
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compatible = "nvidia,tegra194-pexclk-padctl";
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reg = <0x0 0x03790000 0x0 0x1000>,
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<0x0 0x037a0000 0x0 0x1000>;
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pexclk_pads_single: pexclk_pads_single {
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pexclk {
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pins = "pexclk";
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nvidia,pexclk-single-end = <1>;
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};
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};
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pexclk_pads_diff: pexclk_pads_diff {
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pexclk {
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pins = "pexclk";
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nvidia,pexclk-single-end = <0>;
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};
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};
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};
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client-node {
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/* Other properties of client node */
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pinctrl-names = "single". "differential";
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pinctrl-0 = <&pexclk_pads_single>;
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pinctrl-1 = <&pexclk_pads_diff>;
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};
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Example with prod:
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=================
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pinctrl@3790000 {
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compatible = "nvidia,tegra194-pexclk-padctl";
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reg = <0x0 0x03790000 0x0 0x1000>,
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<0x0 0x037a0000 0x0 0x1000>;
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prod-settings {
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prod {
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prod = <
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/* Prod entries */
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>;
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};
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};
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};
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