77 lines
2.2 KiB
Plaintext
77 lines
2.2 KiB
Plaintext
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NVIDIA Tegra APE aux CPU, with communication via the "IVC" IPC protocol.
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APE is an aux CPU which talks to CCPLEX over IVC.
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Its assumed that the APE FW implements IVC, and uses HSP IRQs as part of IVC.
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Its also assumed that the APE FW expects AST regions 0/1/2 are already set up
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for the APE to access FW in DRAM, SYSRAM if applicable, and the IVC memory.
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== APE top-level node ==
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The APE core is represented by the top-level node including direct HW resources
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such as clocks, resets etc.
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Required properties:
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- compatible: should be "nvidia,tegra186-ape-ivc" for T18x.
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- reg: Address entries (APE BASE, APE IVC CPU AST, APE IVC DMA AST)
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Formatted as per standard rules for this property.
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- reg-names: "ape-evp", "ast-cpu", "ast-dma" as per the reg property.
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- clocks: Should contain an entry for each entry in clock-names.
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See ../clock/clock-bindings.txt for details.
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- clock-names: Names of the clocks required by APE.
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Must include following entries:
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- ahub
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- apb2ape
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- ape
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- adsp
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- adspneon
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- resets: Should contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names: Names of the resets required for APE.
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Must include following entries:
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- adspdbg
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- adspintf
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- adspneon
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- adspperiph
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- adspscu
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- adspwdt
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- ape
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- adsp
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- nvidia,ivc-channels: IVC channel layout. See ./tegra-sce-ivc.txt.
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Optional properties:
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- nvidia,stream-id: should contain the SMMU Stream ID used.
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== APE sub nodes ==
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* hsp
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Describes the hardware synchronization primitive(s) used.
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See ./tegra-sce-ivc.txt for details (syntax is the same).
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== Possible example ==
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tegra_ape: rtcpu@2993000 {
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compatible = "nvidia,tegra186-ape-ivc";
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reg = <0 0x02993000 0 0x1000>,
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<0 0x02994000 0 0x2000>,
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<0 0x02996000 0 0x2000>;
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reg-names = "ape-evp", "ast-cpu", "ast-dma";
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clocks =
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<&tegra_car TEGRA186_CLK_AHUB>,
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<&tegra_car TEGRA186_CLK_APB2APE>,
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<&tegra_car TEGRA186_CLK_APE>,
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<&tegra_car TEGRA186_CLK_ADSP>,
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<&tegra_car TEGRA186_CLK_ADSPNEON>;
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clock-names =
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"ahub",
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"apb2ape",
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"ape",
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"adsp",
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"adspneon";
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resets = <&tegra_car TEGRA186_RESET_ADSP_ALL>;
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reset-names = "adsp-all";
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/* See ./tegra-sce-ivc.txt for generic IVC example */
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};
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