89 lines
2.5 KiB
C
89 lines
2.5 KiB
C
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/*
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* HND arm trap handling.
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*
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* Copyright (C) 1999-2015, Broadcom Corporation
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*
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* Unless you and Broadcom execute a separate written software license
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* agreement governing use of this software, this software is licensed to you
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* under the terms of the GNU General Public License version 2 (the "GPL"),
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* available at http://www.broadcom.com/licenses/GPLv2.php, with the
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* following added to such license:
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*
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* As a special exception, the copyright holders of this software give you
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* permission to link this software with independent modules, and to copy and
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* distribute the resulting executable under terms of your choice, provided that
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* you also meet, for each linked independent module, the terms and conditions of
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* the license of that module. An independent module is a module which is not
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* derived from this software. The special exception does not apply to any
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* modifications of the software.
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*
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* Notwithstanding the above, under no circumstances may you combine this
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* software in any way with any other Broadcom software provided under a license
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* other than the GPL, without Broadcom's express prior written consent.
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*
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* $Id: hnd_armtrap.h 470663 2014-04-16 00:24:43Z $
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*/
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#ifndef _hnd_armtrap_h_
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#define _hnd_armtrap_h_
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/* ARM trap handling */
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/* Trap types defined by ARM (see arminc.h) */
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/* Trap locations in lo memory */
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#define TRAP_STRIDE 4
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#define FIRST_TRAP TR_RST
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#define LAST_TRAP (TR_FIQ * TRAP_STRIDE)
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#if defined(__ARM_ARCH_4T__)
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#define MAX_TRAP_TYPE (TR_FIQ + 1)
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#elif defined(__ARM_ARCH_7M__)
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#define MAX_TRAP_TYPE (TR_ISR + ARMCM3_NUMINTS)
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#endif /* __ARM_ARCH_7M__ */
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/* The trap structure is defined here as offsets for assembly */
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#define TR_TYPE 0x00
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#define TR_EPC 0x04
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#define TR_CPSR 0x08
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#define TR_SPSR 0x0c
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#define TR_REGS 0x10
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#define TR_REG(n) (TR_REGS + (n) * 4)
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#define TR_SP TR_REG(13)
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#define TR_LR TR_REG(14)
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#define TR_PC TR_REG(15)
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#define TRAP_T_SIZE 80
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#ifndef _LANGUAGE_ASSEMBLY
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#include <typedefs.h>
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typedef struct _trap_struct {
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uint32 type;
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uint32 epc;
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uint32 cpsr;
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uint32 spsr;
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uint32 r0; /* a1 */
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uint32 r1; /* a2 */
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uint32 r2; /* a3 */
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uint32 r3; /* a4 */
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uint32 r4; /* v1 */
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uint32 r5; /* v2 */
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uint32 r6; /* v3 */
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uint32 r7; /* v4 */
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uint32 r8; /* v5 */
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uint32 r9; /* sb/v6 */
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uint32 r10; /* sl/v7 */
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uint32 r11; /* fp/v8 */
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uint32 r12; /* ip */
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uint32 r13; /* sp */
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uint32 r14; /* lr */
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uint32 pc; /* r15 */
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} trap_t;
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#endif /* !_LANGUAGE_ASSEMBLY */
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#endif /* _hnd_armtrap_h_ */
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