288 lines
11 KiB
C
288 lines
11 KiB
C
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/*
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* 'Standard' SDIO HOST CONTROLLER driver
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*
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* Portions of this code are copyright (c) 2017 Cypress Semiconductor Corporation
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*
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* Copyright (C) 1999-2017, Broadcom Corporation
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*
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* Unless you and Broadcom execute a separate written software license
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* agreement governing use of this software, this software is licensed to you
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* under the terms of the GNU General Public License version 2 (the "GPL"),
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* available at http://www.broadcom.com/licenses/GPLv2.php, with the
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* following added to such license:
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*
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* As a special exception, the copyright holders of this software give you
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* permission to link this software with independent modules, and to copy and
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* distribute the resulting executable under terms of your choice, provided that
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* you also meet, for each linked independent module, the terms and conditions of
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* the license of that module. An independent module is a module which is not
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* derived from this software. The special exception does not apply to any
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* modifications of the software.
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*
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* Notwithstanding the above, under no circumstances may you combine this
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* software in any way with any other Broadcom software provided under a license
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* other than the GPL, without Broadcom's express prior written consent.
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*
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*
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* <<Broadcom-WL-IPTag/Open:>>
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*
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* $Id: bcmsdstd.h 514727 2014-11-12 03:02:48Z $
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*/
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#ifndef _BCM_SD_STD_H
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#define _BCM_SD_STD_H
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/* global msglevel for debug messages - bitvals come from sdiovar.h */
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#define sd_err(x) do { if (sd_msglevel & SDH_ERROR_VAL) printf x; } while (0)
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#define sd_trace(x)
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#define sd_info(x)
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#define sd_debug(x)
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#define sd_data(x)
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#define sd_ctrl(x)
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#define sd_dma(x)
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#define sd_sync_dma(sd, read, nbytes)
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#define sd_init_dma(sd)
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#define sd_ack_intr(sd)
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#define sd_wakeup(sd);
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/* Allocate/init/free per-OS private data */
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extern int sdstd_osinit(sdioh_info_t *sd);
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extern void sdstd_osfree(sdioh_info_t *sd);
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#define sd_log(x)
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#define SDIOH_ASSERT(exp) \
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do { if (!(exp)) \
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printf("!!!ASSERT fail: file %s lines %d", __FILE__, __LINE__); \
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} while (0)
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#define BLOCK_SIZE_4318 64
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#define BLOCK_SIZE_4328 512
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/* internal return code */
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#define SUCCESS 0
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#define ERROR 1
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/* private bus modes */
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#define SDIOH_MODE_SPI 0
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#define SDIOH_MODE_SD1 1
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#define SDIOH_MODE_SD4 2
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#define MAX_SLOTS 6 /* For PCI: Only 6 BAR entries => 6 slots */
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#define SDIOH_REG_WINSZ 0x100 /* Number of registers in Standard Host Controller */
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#define SDIOH_TYPE_ARASAN_HDK 1
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#define SDIOH_TYPE_BCM27XX 2
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#define SDIOH_TYPE_TI_PCIXX21 4 /* TI PCIxx21 Standard Host Controller */
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#define SDIOH_TYPE_RICOH_R5C822 5 /* Ricoh Co Ltd R5C822 SD/SDIO/MMC/MS/MSPro Host Adapter */
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#define SDIOH_TYPE_JMICRON 6 /* JMicron Standard SDIO Host Controller */
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/* For linux, allow yielding for dongle */
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#define BCMSDYIELD
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/* Expected card status value for CMD7 */
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#define SDIOH_CMD7_EXP_STATUS 0x00001E00
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#define RETRIES_LARGE 100000
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#define sdstd_os_yield(sd) do {} while (0)
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#define RETRIES_SMALL 100
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#define USE_BLOCKMODE 0x2 /* Block mode can be single block or multi */
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#define USE_MULTIBLOCK 0x4
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#define USE_FIFO 0x8 /* Fifo vs non-fifo */
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#define CLIENT_INTR 0x100 /* Get rid of this! */
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#define HC_INTR_RETUNING 0x1000
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#ifdef BCMSDIOH_TXGLOM
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/* Total glom pkt can not exceed 64K
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* need one more slot for glom padding packet
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*/
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#define SDIOH_MAXGLOM_SIZE (40+1)
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typedef struct glom_buf {
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uint32 count; /* Total number of pkts queued */
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void *dma_buf_arr[SDIOH_MAXGLOM_SIZE]; /* Frame address */
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ulong dma_phys_arr[SDIOH_MAXGLOM_SIZE]; /* DMA_MAPed address of frames */
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uint16 nbytes[SDIOH_MAXGLOM_SIZE]; /* Size of each frame */
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} glom_buf_t;
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#endif
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struct sdioh_info {
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uint cfg_bar; /* pci cfg address for bar */
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uint32 caps; /* cached value of capabilities reg */
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uint32 curr_caps; /* max current capabilities reg */
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osl_t *osh; /* osh handler */
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volatile char *mem_space; /* pci device memory va */
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uint lockcount; /* nest count of sdstd_lock() calls */
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bool client_intr_enabled; /* interrupt connnected flag */
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bool intr_handler_valid; /* client driver interrupt handler valid */
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sdioh_cb_fn_t intr_handler; /* registered interrupt handler */
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void *intr_handler_arg; /* argument to call interrupt handler */
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bool initialized; /* card initialized */
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uint target_dev; /* Target device ID */
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uint16 intmask; /* Current active interrupts */
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void *sdos_info; /* Pointer to per-OS private data */
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void *bcmsdh; /* handler to upper layer stack (bcmsdh) */
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uint32 controller_type; /* Host controller type */
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uint8 version; /* Host Controller Spec Compliance Version */
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uint irq; /* Client irq */
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int intrcount; /* Client interrupts */
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int local_intrcount; /* Controller interrupts */
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bool host_init_done; /* Controller initted */
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bool card_init_done; /* Client SDIO interface initted */
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bool polled_mode; /* polling for command completion */
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bool sd_blockmode; /* sd_blockmode == FALSE => 64 Byte Cmd 53s. */
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/* Must be on for sd_multiblock to be effective */
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bool use_client_ints; /* If this is false, make sure to restore */
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/* polling hack in wl_linux.c:wl_timer() */
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int adapter_slot; /* Maybe dealing with multiple slots/controllers */
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int sd_mode; /* SD1/SD4/SPI */
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int client_block_size[SDIOD_MAX_IOFUNCS]; /* Blocksize */
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uint32 data_xfer_count; /* Current transfer */
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uint16 card_rca; /* Current Address */
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int8 sd_dma_mode; /* DMA Mode (PIO, SDMA, ... ADMA2) on CMD53 */
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uint8 num_funcs; /* Supported funcs on client */
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uint32 com_cis_ptr;
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uint32 func_cis_ptr[SDIOD_MAX_IOFUNCS];
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void *dma_buf; /* DMA Buffer virtual address */
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ulong dma_phys; /* DMA Buffer physical address */
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void *adma2_dscr_buf; /* ADMA2 Descriptor Buffer virtual address */
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ulong adma2_dscr_phys; /* ADMA2 Descriptor Buffer physical address */
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/* adjustments needed to make the dma align properly */
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void *dma_start_buf;
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ulong dma_start_phys;
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uint alloced_dma_size;
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void *adma2_dscr_start_buf;
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ulong adma2_dscr_start_phys;
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uint alloced_adma2_dscr_size;
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int r_cnt; /* rx count */
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int t_cnt; /* tx_count */
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bool got_hcint; /* local interrupt flag */
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uint16 last_intrstatus; /* to cache intrstatus */
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int host_UHSISupported; /* whether UHSI is supported for HC. */
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int card_UHSI_voltage_Supported; /* whether UHSI is supported for
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* Card in terms of Voltage [1.8 or 3.3].
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*/
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int global_UHSI_Supp; /* type of UHSI support in both host and card.
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* HOST_SDR_UNSUPP: capabilities not supported/matched
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* HOST_SDR_12_25: SDR12 and SDR25 supported
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* HOST_SDR_50_104_DDR: one of SDR50/SDR104 or DDR50 supptd
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*/
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volatile int sd3_dat_state; /* data transfer state used for retuning check */
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volatile int sd3_tun_state; /* tuning state used for retuning check */
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bool sd3_tuning_reqd; /* tuning requirement parameter */
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uint32 caps3; /* cached value of 32 MSbits capabilities reg (SDIO 3.0) */
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#ifdef BCMSDIOH_TXGLOM
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glom_buf_t glom_info; /* pkt information used for glomming */
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uint txglom_mode; /* Txglom mode: 0 - copy, 1 - multi-descriptor */
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#endif
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};
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#define DMA_MODE_NONE 0
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#define DMA_MODE_SDMA 1
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#define DMA_MODE_ADMA1 2
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#define DMA_MODE_ADMA2 3
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#define DMA_MODE_ADMA2_64 4
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#define DMA_MODE_AUTO -1
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#define USE_DMA(sd) ((bool)((sd->sd_dma_mode > 0) ? TRUE : FALSE))
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/* States for Tuning and corr data */
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#define TUNING_IDLE 0
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#define TUNING_START 1
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#define TUNING_START_AFTER_DAT 2
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#define TUNING_ONGOING 3
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#define DATA_TRANSFER_IDLE 0
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#define DATA_TRANSFER_ONGOING 1
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#define CHECK_TUNING_PRE_DATA 1
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#define CHECK_TUNING_POST_DATA 2
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#ifdef DHD_DEBUG
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#define SD_DHD_DISABLE_PERIODIC_TUNING 0x01
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#define SD_DHD_ENABLE_PERIODIC_TUNING 0x00
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#endif
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/************************************************************
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* Internal interfaces: per-port references into bcmsdstd.c
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*/
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/* Global message bits */
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extern uint sd_msglevel;
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/* OS-independent interrupt handler */
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extern bool check_client_intr(sdioh_info_t *sd);
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/* Core interrupt enable/disable of device interrupts */
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extern void sdstd_devintr_on(sdioh_info_t *sd);
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extern void sdstd_devintr_off(sdioh_info_t *sd);
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/* Enable/disable interrupts for local controller events */
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extern void sdstd_intrs_on(sdioh_info_t *sd, uint16 norm, uint16 err);
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extern void sdstd_intrs_off(sdioh_info_t *sd, uint16 norm, uint16 err);
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/* Wait for specified interrupt and error bits to be set */
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extern void sdstd_spinbits(sdioh_info_t *sd, uint16 norm, uint16 err);
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/**************************************************************
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* Internal interfaces: bcmsdstd.c references to per-port code
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*/
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/* Register mapping routines */
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extern uint32 *sdstd_reg_map(osl_t *osh, ulong addr, int size);
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extern void sdstd_reg_unmap(osl_t *osh, ulong addr, int size);
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/* Interrupt (de)registration routines */
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extern int sdstd_register_irq(sdioh_info_t *sd, uint irq);
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extern void sdstd_free_irq(uint irq, sdioh_info_t *sd);
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/* OS-specific interrupt wrappers (atomic interrupt enable/disable) */
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extern void sdstd_lock(sdioh_info_t *sd);
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extern void sdstd_unlock(sdioh_info_t *sd);
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extern void sdstd_waitlockfree(sdioh_info_t *sd);
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/* OS-specific wrappers for safe concurrent register access */
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extern void sdstd_os_lock_irqsave(sdioh_info_t *sd, ulong* flags);
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extern void sdstd_os_unlock_irqrestore(sdioh_info_t *sd, ulong* flags);
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/* OS-specific wait-for-interrupt-or-status */
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extern int sdstd_waitbits(sdioh_info_t *sd, uint16 norm, uint16 err, bool yield, uint16 *bits);
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/* used by bcmsdstd_linux [implemented in sdstd] */
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extern void sdstd_3_enable_retuning_int(sdioh_info_t *sd);
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extern void sdstd_3_disable_retuning_int(sdioh_info_t *sd);
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extern bool sdstd_3_is_retuning_int_set(sdioh_info_t *sd);
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extern void sdstd_3_check_and_do_tuning(sdioh_info_t *sd, int tuning_param);
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extern bool sdstd_3_check_and_set_retuning(sdioh_info_t *sd);
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extern int sdstd_3_get_tune_state(sdioh_info_t *sd);
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extern int sdstd_3_get_data_state(sdioh_info_t *sd);
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extern void sdstd_3_set_tune_state(sdioh_info_t *sd, int state);
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extern void sdstd_3_set_data_state(sdioh_info_t *sd, int state);
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extern uint8 sdstd_3_get_tuning_exp(sdioh_info_t *sd);
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extern uint32 sdstd_3_get_uhsi_clkmode(sdioh_info_t *sd);
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extern int sdstd_3_clk_tuning(sdioh_info_t *sd, uint32 sd3ClkMode);
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/* used by sdstd [implemented in bcmsdstd_linux/ndis] */
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extern void sdstd_3_start_tuning(sdioh_info_t *sd);
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extern void sdstd_3_osinit_tuning(sdioh_info_t *sd);
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extern void sdstd_3_osclean_tuning(sdioh_info_t *sd);
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extern void sdstd_enable_disable_periodic_timer(sdioh_info_t * sd, uint val);
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extern sdioh_info_t *sdioh_attach(osl_t *osh, void *bar0, uint irq);
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extern SDIOH_API_RC sdioh_detach(osl_t *osh, sdioh_info_t *sd);
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#endif /* _BCM_SD_STD_H */
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