89 lines
2.6 KiB
C
89 lines
2.6 KiB
C
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/*
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* Copyright (c) 2017-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <asm/io.h>
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#include <linux/console.h>
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#include <linux/serial_core.h>
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#define NUM_BYTES_FIELD_BIT 24
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#define FLUSH_BIT 26
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#define INTR_TRIGGER_BIT 31
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static u32 update_and_send_mbox(u8 __iomem *addr, u32 mbox_val, char c)
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{
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int bytes = bytes = (mbox_val >> NUM_BYTES_FIELD_BIT) & 0x3;
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mbox_val |= BIT(INTR_TRIGGER_BIT);
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mbox_val |= c << (bytes * 8);
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bytes++;
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mbox_val = (mbox_val & ~(3 << NUM_BYTES_FIELD_BIT)) |
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(bytes << NUM_BYTES_FIELD_BIT);
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if (bytes == 3) {
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/* Send current packet to SPE */
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while (readl(addr) & BIT(INTR_TRIGGER_BIT))
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cpu_relax();
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writel(mbox_val, addr);
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mbox_val = BIT(INTR_TRIGGER_BIT);
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}
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return mbox_val;
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}
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/*
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* This function splits the string to be printed (const char *s) into multiple
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* packets. Each packet contains a max of 3 characters. Packets are sent to the
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* SPE-based combined UART server for printing. Communication with SPE is done
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* through mailbox registers which can generate interrupts for SPE.
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*/
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static void __init early_tcu_write(struct console *console,
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const char *s, unsigned int count)
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{
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struct earlycon_device *device = console->data;
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u8 __iomem *addr = device->port.membase;
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u32 mbox_val = BIT(INTR_TRIGGER_BIT);
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unsigned int i;
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/* Loop for processing each 3 char packet */
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for (i = 0; i < count; i++) {
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if (s[i] == '\n')
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mbox_val = update_and_send_mbox(addr, mbox_val, '\r');
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mbox_val = update_and_send_mbox(addr, mbox_val, s[i]);
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}
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if ((mbox_val >> NUM_BYTES_FIELD_BIT) & 0x3) {
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while (readl(addr) & BIT(INTR_TRIGGER_BIT))
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cpu_relax();
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writel(mbox_val, addr);
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}
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}
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int __init early_tegra_combined_uart_setup(struct earlycon_device *device,
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const char *options)
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{
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if (!(device->port.membase))
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return -ENODEV;
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device->con->write = early_tcu_write;
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#ifdef CONFIG_SERIAL_LOGLEVEL_PRINT
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device->con->flags |= CON_FORCE_LEVEL;
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#endif
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return 0;
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}
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EARLYCON_DECLARE(tegra_comb_uart, early_tegra_combined_uart_setup);
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