478 lines
14 KiB
C
478 lines
14 KiB
C
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/*
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* sn65dsi86_dsi2edp.c: dsi to edp controller sn65dsi86 driver.
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*
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* Copyright (c) 2013-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* Author:
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* Bibek Basu <bbasu@nvidia.com>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include <linux/i2c.h>
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#include <linux/device.h>
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#include <linux/slab.h>
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#include <linux/delay.h>
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#include <linux/regmap.h>
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#include <linux/swab.h>
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#include <linux/module.h>
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#include <linux/gpio.h>
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#include <linux/of_gpio.h>
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#include "dc.h"
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#include "dc_priv.h"
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#include "sn65dsi86_dsi2edp.h"
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#include "dsi.h"
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static struct tegra_dc_dsi2edp_data *sn65dsi86_dsi2edp;
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static struct i2c_client *sn65dsi86_i2c_client;
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enum i2c_transfer_type {
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I2C_WRITE,
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I2C_READ,
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};
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static inline int sn65dsi86_reg_write(struct tegra_dc_dsi2edp_data *dsi2edp,
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unsigned int addr, unsigned int val)
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{
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return regmap_write(dsi2edp->regmap, addr, val);
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}
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static inline void sn65dsi86_reg_read(struct tegra_dc_dsi2edp_data *dsi2edp,
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unsigned int addr, unsigned int *val)
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{
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regmap_read(dsi2edp->regmap, addr, val);
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}
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static const struct regmap_config sn65dsi86_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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};
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static int sn65dsi86_dsi2edp_init(struct tegra_dc_dsi_data *dsi)
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{
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int err = 0;
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struct tegra_dc_dsi2edp_data *dsi2edp = sn65dsi86_dsi2edp;
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if (!sn65dsi86_dsi2edp)
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return -ENODEV;
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dsi2edp->dsi = dsi;
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dsi2edp->mode = &dsi->dc->mode;
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tegra_dsi_set_outdata(dsi, dsi2edp);
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if (dsi2edp->init.en_gpio) {
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err = gpio_request(dsi2edp->init.en_gpio, "dsi2dp");
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if (err < 0) {
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pr_err("err %d: dsi2dp GPIO request failed\n", err);
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} else {
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if (dsi2edp->init.en_gpio_flags & OF_GPIO_ACTIVE_LOW)
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gpio_direction_output(dsi2edp->init.en_gpio,
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0);
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else
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gpio_direction_output(dsi2edp->init.en_gpio,
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1);
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}
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}
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return 0;
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}
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static void sn65dsi86_dsi2edp_destroy(struct tegra_dc_dsi_data *dsi)
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{
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struct tegra_dc_dsi2edp_data *dsi2edp =
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tegra_dsi_get_outdata(dsi);
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if (!dsi2edp)
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return;
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if (dsi2edp->init.en_gpio) {
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if (dsi2edp->init.en_gpio_flags & OF_GPIO_ACTIVE_LOW)
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gpio_set_value(dsi2edp->init.en_gpio, 1);
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else
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gpio_set_value(dsi2edp->init.en_gpio, 0);
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}
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sn65dsi86_dsi2edp = NULL;
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mutex_destroy(&dsi2edp->lock);
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}
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static void sn65dsi86_dsi2edp_enable(struct tegra_dc_dsi_data *dsi)
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{
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struct tegra_dc_dsi2edp_data *dsi2edp = tegra_dsi_get_outdata(dsi);
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unsigned val = 0;
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unsigned retry = 0;
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int hpd;
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if (dsi2edp && dsi2edp->dsi2edp_enabled)
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return;
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pr_info("SN65DSI86: %dx%d@%d %d-%d-%d/%d-%d-%d lanes:%d HS:%dKHz\n",
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dsi->dc->mode.h_active, dsi->dc->mode.v_active,
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dsi->info.refresh_rate, dsi->dc->mode.h_front_porch,
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dsi->dc->mode.h_sync_width, dsi->dc->mode.h_back_porch,
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dsi->dc->mode.v_front_porch, dsi->dc->mode.v_sync_width,
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dsi->dc->mode.v_back_porch, dsi->info.n_data_lanes,
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dsi->target_hs_clk_khz);
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mutex_lock(&dsi2edp->lock);
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/* reg.0x0a REFCLK */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_PLL_REFCLK_CFG,
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dsi2edp->init.pll_refclk_cfg);
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/* reg.0x10 DSI config */
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val = dsi->info.ganged_type ? (0 << 5) : (1 << 5);
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val |= (TEGRA_DSI_GANGED_SYMMETRIC_LEFT_RIGHT == dsi->info.ganged_type)
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? (1 << 7) : (0 << 7);
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val |= (4 - dsi->info.n_data_lanes / (dsi->info.ganged_type ? 2 : 1))
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<< 3;
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if (dsi->info.ganged_type)
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val |= (4 - dsi->info.n_data_lanes / 2) << 1;
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_DSI_CFG1, val);
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/* reg.0x12-0x13 DSI CLK range */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_DSI_CHA_CLK_RANGE,
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dsi->target_hs_clk_khz / 5000);
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if (dsi->info.ganged_type)
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_DSI_CHB_CLK_RANGE,
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dsi->target_hs_clk_khz / 5000);
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if (!(40000 <= dsi->target_hs_clk_khz
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&& dsi->target_hs_clk_khz < 755000))
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pr_warn("SN65DSI86: DC%d DSI HS clk %dKHz is out of range!\n",
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dsi->dc->ndev->id, dsi->target_hs_clk_khz);
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/* disable ASSR via TEST2 PULL UP */
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if (dsi2edp->init.disable_assr) {
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sn65dsi86_reg_write(dsi2edp, 0xFF, 0x07);
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sn65dsi86_reg_write(dsi2edp, 0x16, 0x01);
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sn65dsi86_reg_write(dsi2edp, 0xFF, 0x00);
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}
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/* reg.0x5a enhanced framing */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_FRAMING_CFG, (1 << 2));
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/* reg.0x93 DP num of lanes & SSC */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_DP_SSC_CFG,
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dsi2edp->init.dp_ssc_cfg);
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/* reg.0x94 L0mV HBR */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_DP_CFG, 0x80);
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/* reg.0x0d enable DP PLL */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_PLL_EN, (1 << 0));
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retry = 0;
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do {
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usleep_range(2000, 2200);
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/* DP_PLL_LOCK */
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sn65dsi86_reg_read(dsi2edp, SN65DSI86_PLL_REFCLK_CFG, &val);
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} while (((val & (1 << 7)) == 0) && (retry++ < RETRY_PLL));
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if ((val & (1 << 7)) == 0)
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pr_err("SN65DSI86: DP_PLL not locked\n");
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/* reg.0x95 POST2 0dB */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_TRAINING_CFG, 0x00);
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/* reg.0x5c HPD detection may take up to 100mSec */
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for (retry = 0; retry < RETRY_HPD; retry++) {
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sn65dsi86_reg_read(dsi2edp, SN65DSI86_REG_0x5c, &hpd);
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if (hpd & (1 << 4)) break;
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usleep_range(5000, 5500);
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}
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if (hpd & (1 << 0)) /* HPD disable makes it on */
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pr_info("SN65DSI86: DP HPD is not used\n");
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else
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pr_info("SN65DSI86: DP HPD%s detected\n",
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(hpd & (1 << 4)) ? "" : " not");
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hpd = (hpd & (1 << 4)) ? 1 : 0;
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/* reg.0x96 Semi-Auto Link-training
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takes about 15~90mSec. some monitor takes up to 900mSec */
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if (hpd) {
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retry = 0;
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do {
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sn65dsi86_reg_write(dsi2edp,
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SN65DSI86_ML_TX_MODE, 0x0a);
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usleep_range(5000, 5500);
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sn65dsi86_reg_read(dsi2edp,
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SN65DSI86_ML_TX_MODE, &val);
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} while ((val != 0x1) && (retry++ < RETRY_LT));
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if (val != 0x1)
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pr_err("SN65DSI86: semi-auto link training failed\n");
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}
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/* reg.0x20-0x21 ch.a h-active */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_VIDEO_CHA_LINE_LOW,
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(dsi->dc->mode.h_active / (dsi->info.ganged_type ? 2 : 1))
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& 0xff);
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_VIDEO_CHA_LINE_HIGH,
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(dsi->dc->mode.h_active / (dsi->info.ganged_type ? 2 : 1))
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>> 8);
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/* reg.0x22-0x23 ch.b h-active */
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if (dsi->info.ganged_type) {
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_VIDEO_CHB_LINE_LOW,
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(dsi->dc->mode.h_active / 2) & 0xff);
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_VIDEO_CHB_LINE_HIGH,
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(dsi->dc->mode.h_active / 2) >> 8);
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}
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/* reg.0x24-0x25 v-active */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_CHA_VERT_DISP_SIZE_LOW,
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dsi->dc->mode.v_active & 0xff);
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_CHA_VERT_DISP_SIZE_HIGH,
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dsi->dc->mode.v_active >> 8);
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/* reg.0x2c-0x2d h-sync-width */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_CHA_HSYNC_PULSE_WIDTH_LOW,
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dsi->dc->mode.h_sync_width & 0xff);
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_CHA_HSYNC_PULSE_WIDTH_HIGH,
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((dsi->dc->mode.h_sync_width >> 8) & 0x7f)
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| (dsi2edp->init.negative_hsync ? (1 << 7) : 0));
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/* reg.0x30-0x31 v-sync-width */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_CHA_VSYNC_PULSE_WIDTH_LOW,
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dsi->dc->mode.v_sync_width & 0xff);
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_CHA_VSYNC_PULSE_WIDTH_HIGH,
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((dsi->dc->mode.v_sync_width >> 8) & 0x7f)
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| (dsi2edp->init.negative_vsync ? (1 << 7) : 0));
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if (dsi->dc->mode.v_sync_width < 1)
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pr_warn("SN65DSI86: V-Sync-Width %d is not valid\n",
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dsi->dc->mode.v_sync_width);
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/* reg.0x34 h-back-porch */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_CHA_HORIZONTAL_BACK_PORCH,
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dsi->dc->mode.h_back_porch & 0xff);
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if (dsi->dc->mode.h_back_porch >> 8)
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pr_warn("SN65DSI86: H-Back-Porch %d is out of range\n",
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dsi->dc->mode.h_back_porch);
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/* reg.0x36 v-back-porch */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_CHA_VERTICAL_BACK_PORCH,
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dsi->dc->mode.v_back_porch & 0xff);
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if ((dsi->dc->mode.v_back_porch < 1)
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|| (dsi->dc->mode.v_back_porch >> 8))
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pr_warn("SN65DSI86: V-Back-Porch %d is out of range\n",
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dsi->dc->mode.v_back_porch);
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/* reg.0x38 h-front-porch */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_CHA_HORIZONTAL_FRONT_PORCH,
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dsi->dc->mode.h_front_porch & 0xff);
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if (dsi->dc->mode.h_front_porch >> 8)
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pr_warn("SN65DSI86: H-Front-Porch %d is out of range\n",
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dsi->dc->mode.h_front_porch);
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/* reg.0x3a v-front-porch */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_CHA_VERTICAL_FRONT_PORCH,
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dsi->dc->mode.v_front_porch & 0xff);
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if ((dsi->dc->mode.v_front_porch < 1)
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|| (dsi->dc->mode.v_front_porch >> 8))
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pr_warn("SN65DSI86: V-Front-Porch %d is out of range\n",
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dsi->dc->mode.v_front_porch);
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/* reg.0x5b DP-18BPP Enable */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_DP_18BPP_EN, 0x00);
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/* reg.0x3c COLOR BAR */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_COLOR_BAR_CFG,
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dsi2edp->init.enable_colorbar ? (1 << 4) : 0);
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/* reg.0x5a enable Vstream */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_FRAMING_CFG,
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(1 << 3) | (1 << 2));
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dsi2edp->dsi2edp_enabled = true;
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mutex_unlock(&dsi2edp->lock);
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}
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static void sn65dsi86_dsi2edp_disable(struct tegra_dc_dsi_data *dsi)
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{
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struct tegra_dc_dsi2edp_data *dsi2edp = tegra_dsi_get_outdata(dsi);
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mutex_lock(&dsi2edp->lock);
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/* enhanced framing and Vstream disable */
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sn65dsi86_reg_write(dsi2edp, SN65DSI86_FRAMING_CFG, 0x04);
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dsi2edp->dsi2edp_enabled = false;
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mutex_unlock(&dsi2edp->lock);
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}
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#ifdef CONFIG_PM
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static void sn65dsi86_dsi2edp_suspend(struct tegra_dc_dsi_data *dsi)
|
||
|
|
{
|
||
|
|
struct tegra_dc_dsi2edp_data *dsi2edp = tegra_dsi_get_outdata(dsi);
|
||
|
|
|
||
|
|
mutex_lock(&dsi2edp->lock);
|
||
|
|
/* configure GPIO1 for suspend */
|
||
|
|
sn65dsi86_reg_write(dsi2edp, SN65DSI86_GPIO_CTRL_CFG, 0x02);
|
||
|
|
dsi2edp->dsi2edp_enabled = false;
|
||
|
|
mutex_unlock(&dsi2edp->lock);
|
||
|
|
|
||
|
|
}
|
||
|
|
|
||
|
|
static void sn65dsi86_dsi2edp_resume(struct tegra_dc_dsi_data *dsi)
|
||
|
|
{
|
||
|
|
struct tegra_dc_dsi2edp_data *dsi2edp = tegra_dsi_get_outdata(dsi);
|
||
|
|
|
||
|
|
mutex_lock(&dsi2edp->lock);
|
||
|
|
/* disable configure GPIO1 for suspend */
|
||
|
|
sn65dsi86_reg_write(dsi2edp, SN65DSI86_GPIO_CTRL_CFG, 0x00);
|
||
|
|
/* enhanced framing and Vstream enable */
|
||
|
|
sn65dsi86_reg_write(dsi2edp, SN65DSI86_FRAMING_CFG, 0x0c);
|
||
|
|
dsi2edp->dsi2edp_enabled = true;
|
||
|
|
mutex_unlock(&dsi2edp->lock);
|
||
|
|
}
|
||
|
|
#endif
|
||
|
|
|
||
|
|
struct tegra_dsi_out_ops tegra_dsi2edp_ops = {
|
||
|
|
.init = sn65dsi86_dsi2edp_init,
|
||
|
|
.destroy = sn65dsi86_dsi2edp_destroy,
|
||
|
|
.enable = sn65dsi86_dsi2edp_enable,
|
||
|
|
.disable = sn65dsi86_dsi2edp_disable,
|
||
|
|
#ifdef CONFIG_PM
|
||
|
|
.suspend = sn65dsi86_dsi2edp_suspend,
|
||
|
|
.resume = sn65dsi86_dsi2edp_resume,
|
||
|
|
#endif
|
||
|
|
};
|
||
|
|
|
||
|
|
static int of_dsi2edp_parse_platform_data(struct i2c_client *client)
|
||
|
|
{
|
||
|
|
struct device_node *np = client->dev.of_node;
|
||
|
|
struct tegra_dc_dsi2edp_data *dsi2edp = sn65dsi86_dsi2edp;
|
||
|
|
enum of_gpio_flags flags;
|
||
|
|
int err = 0;
|
||
|
|
u32 temp;
|
||
|
|
|
||
|
|
if (!np) {
|
||
|
|
dev_err(&client->dev, "dsi2edp: device node not defined\n");
|
||
|
|
err = -EINVAL;
|
||
|
|
goto err;
|
||
|
|
}
|
||
|
|
|
||
|
|
dsi2edp->init.en_gpio = of_get_named_gpio_flags(np,
|
||
|
|
"ti,enable-gpio", 0, &flags);
|
||
|
|
dsi2edp->init.en_gpio_flags = flags;
|
||
|
|
if (!dsi2edp->init.en_gpio)
|
||
|
|
dev_err(&client->dev, "dsi2edp: gpio number not provided\n");
|
||
|
|
|
||
|
|
if (!of_property_read_u32(np, "ti,pll-refclk-cfg", &temp))
|
||
|
|
dsi2edp->init.pll_refclk_cfg = temp;
|
||
|
|
else
|
||
|
|
dsi2edp->init.pll_refclk_cfg = 0x02;
|
||
|
|
|
||
|
|
if (!of_property_read_u32(np, "ti,disable-assr", &temp))
|
||
|
|
dsi2edp->init.disable_assr = temp;
|
||
|
|
else
|
||
|
|
dsi2edp->init.disable_assr = 0;
|
||
|
|
|
||
|
|
if (!of_property_read_u32(np, "ti,dp-ssc-cfg", &temp))
|
||
|
|
dsi2edp->init.dp_ssc_cfg = temp;
|
||
|
|
else
|
||
|
|
dsi2edp->init.dp_ssc_cfg = 0x20;
|
||
|
|
|
||
|
|
if (!of_property_read_u32(np, "ti,negative-hsync", &temp))
|
||
|
|
dsi2edp->init.negative_hsync = temp;
|
||
|
|
else
|
||
|
|
dsi2edp->init.negative_hsync = 0;
|
||
|
|
|
||
|
|
if (!of_property_read_u32(np, "ti,negative-vsync", &temp))
|
||
|
|
dsi2edp->init.negative_vsync = temp;
|
||
|
|
else
|
||
|
|
dsi2edp->init.negative_vsync = 0;
|
||
|
|
|
||
|
|
if (!of_property_read_u32(np, "ti,enable-colorbar", &temp))
|
||
|
|
dsi2edp->init.enable_colorbar = temp;
|
||
|
|
else
|
||
|
|
dsi2edp->init.enable_colorbar = 0;
|
||
|
|
|
||
|
|
/* parameters below this will be obsolete */
|
||
|
|
|
||
|
|
if (!of_property_read_u32(np, "ti,h-pulse-width-high", &temp))
|
||
|
|
if (temp & (1 << 7))
|
||
|
|
dsi2edp->init.negative_hsync = 1;
|
||
|
|
|
||
|
|
if (!of_property_read_u32(np, "ti,v-pulse-width-high", &temp))
|
||
|
|
if (temp & (1 << 7))
|
||
|
|
dsi2edp->init.negative_vsync = 1;
|
||
|
|
|
||
|
|
err:
|
||
|
|
return err;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int sn65dsi86_i2c_probe(struct i2c_client *client,
|
||
|
|
const struct i2c_device_id *id)
|
||
|
|
{
|
||
|
|
int err = 0;
|
||
|
|
|
||
|
|
sn65dsi86_i2c_client = client;
|
||
|
|
sn65dsi86_dsi2edp = devm_kzalloc(&client->dev,
|
||
|
|
sizeof(*sn65dsi86_dsi2edp),
|
||
|
|
GFP_KERNEL);
|
||
|
|
if (!sn65dsi86_dsi2edp)
|
||
|
|
return -ENOMEM;
|
||
|
|
|
||
|
|
memset(sn65dsi86_dsi2edp, 0, sizeof(struct tegra_dc_dsi2edp_data));
|
||
|
|
mutex_init(&sn65dsi86_dsi2edp->lock);
|
||
|
|
sn65dsi86_dsi2edp->client_i2c = client;
|
||
|
|
|
||
|
|
sn65dsi86_dsi2edp->regmap = devm_regmap_init_i2c(client,
|
||
|
|
&sn65dsi86_regmap_config);
|
||
|
|
if (IS_ERR(sn65dsi86_dsi2edp->regmap)) {
|
||
|
|
err = PTR_ERR(sn65dsi86_dsi2edp->regmap);
|
||
|
|
dev_err(&client->dev,
|
||
|
|
"SN65DSI86: regmap init failed\n");
|
||
|
|
return err;
|
||
|
|
}
|
||
|
|
|
||
|
|
err = of_dsi2edp_parse_platform_data(client);
|
||
|
|
if (err)
|
||
|
|
return err;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static int sn65dsi86_i2c_remove(struct i2c_client *client)
|
||
|
|
{
|
||
|
|
sn65dsi86_i2c_client = NULL;
|
||
|
|
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static const struct i2c_device_id sn65dsi86_id_table[] = {
|
||
|
|
{"sn65dsi86_dsi2edp", 0},
|
||
|
|
{},
|
||
|
|
};
|
||
|
|
|
||
|
|
static const struct of_device_id sn65dsi86_dt_match[] = {
|
||
|
|
{ .compatible = "ti,sn65dsi86" },
|
||
|
|
{ }
|
||
|
|
};
|
||
|
|
|
||
|
|
static struct i2c_driver sn65dsi86_i2c_drv = {
|
||
|
|
.driver = {
|
||
|
|
.name = "sn65dsi86_dsi2edp",
|
||
|
|
.of_match_table = of_match_ptr(sn65dsi86_dt_match),
|
||
|
|
.owner = THIS_MODULE,
|
||
|
|
},
|
||
|
|
.probe = sn65dsi86_i2c_probe,
|
||
|
|
.remove = sn65dsi86_i2c_remove,
|
||
|
|
.id_table = sn65dsi86_id_table,
|
||
|
|
};
|
||
|
|
|
||
|
|
static int __init sn65dsi86_i2c_client_init(void)
|
||
|
|
{
|
||
|
|
int err = 0;
|
||
|
|
|
||
|
|
err = i2c_add_driver(&sn65dsi86_i2c_drv);
|
||
|
|
if (err)
|
||
|
|
pr_err("SN65DSI86: Failed to add i2c client driver\n");
|
||
|
|
|
||
|
|
return err;
|
||
|
|
}
|
||
|
|
|
||
|
|
static void __exit sn65dsi86_i2c_client_exit(void)
|
||
|
|
{
|
||
|
|
i2c_del_driver(&sn65dsi86_i2c_drv);
|
||
|
|
}
|
||
|
|
|
||
|
|
subsys_initcall(sn65dsi86_i2c_client_init);
|
||
|
|
module_exit(sn65dsi86_i2c_client_exit);
|
||
|
|
|
||
|
|
MODULE_AUTHOR("Bibek Basu <bbasu@nvidia.com>");
|
||
|
|
MODULE_DESCRIPTION(" TI SN65DSI86 dsi bridge to edp");
|
||
|
|
MODULE_LICENSE("GPL");
|