177 lines
6.2 KiB
C
177 lines
6.2 KiB
C
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/*
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* drivers/video/tegra/host/nvcsi/nvcsi.h
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*
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* Deskew driver
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*
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* Copyright (c) 2018-2019 NVIDIA Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __DESKEW_H__
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#define __DESKEW_H__
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#include <linux/completion.h>
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#include <uapi/linux/nvhost_nvcsi_ioctl.h>
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#include <media/csi.h>
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////////////////////////////////////////////////////////////////
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// STREAM REGISTERS
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////////////////////////////////////////////////////////////////
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#define NVCSI_STREAM_0_ERROR_STATUS2VI_MASK regs[0]
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#define NVCSI_STREAM_1_ERROR_STATUS2VI_MASK regs[1]
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#define CFG_ERR_STATUS2VI_MASK_ALL regs[2]
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////////////////////////////////////////////////////////////////
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// PHY REGISTERS
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////////////////////////////////////////////////////////////////
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// PHY INTERRUPTS REGISTERS
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#define NVCSI_PHY_0_CILA_INTR_STATUS regs[3]
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// bits in register NVCSI_PHY_0_CILA_INTR_STATUS
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#define intr_dphy_cil_deskew_calib_err_ctrl (1 << 27)
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#define intr_dphy_cil_deskew_calib_err_lane1 (1 << 26)
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#define intr_dphy_cil_deskew_calib_err_lane0 (1 << 25)
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#define intr_dphy_cil_deskew_calib_done_ctrl (1 << 24)
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#define intr_dphy_cil_deskew_calib_done_lane1 (1 << 23)
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#define intr_dphy_cil_deskew_calib_done_lane0 (1 << 22)
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#define NVCSI_PHY_0_CILA_INTR_MASK regs[4]
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#define NVCSI_PHY_0_CILB_INTR_STATUS regs[5]
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#define NVCSI_PHY_0_CILB_INTR_MASK regs[6]
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// new registers in T194
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#define T194_NVCSI_PHY_0_CILA_INTR_1_STATUS 0x10404
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#define T194_NVCSI_PHY_0_CILA_INTR_1_MASK 0x1040c
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#define T194_NVCSI_PHY_0_CILB_INTR_1_STATUS 0x10804
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#define T194_NVCSI_PHY_0_CILB_INTR_1_MASK 0x1080c
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////////////////////////////////////////////////////////////////
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// PHY DESKEW REGISTERS
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////////////////////////////////////////////////////////////////
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// XXX_OFFSET: address offset from NVCSI_CIL_PHY_CTRL_0
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#define NVCSI_PHY_0_NVCSI_CIL_PHY_CTRL_0 regs[7]
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#define NVCSI_CIL_A_SW_RESET_0_OFFSET regs[8]
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#define NVCSI_CIL_A_CLK_DESKEW_CTRL_0_OFFSET regs[9]
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// bits in register NVCSI_CIL_A_CLK_DESKEW_CTRL_0
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#define CLK_INADJ_SWEEP_CTRL (0x1 << 15)
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#define CLK_INADJ_LIMIT_HIGH (0x3f << 8)
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#define CLK_INADJ_LIMIT_LOW 0x3f
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#define NVCSI_CIL_A_DPHY_INADJ_CTRL_0_OFFSET regs[10]
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// bits in register NVCSI_CIL_A_DPHY_INADJ_CTRL_0
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#define SW_SET_DPHY_INADJ_CLK (0x1 << 22)
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#define DPHY_INADJ_CLK (0x3f << 16)
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#define DPHY_INADJ_CLK_SHIFT 16
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#define SW_SET_DPHY_INADJ_IO1 (0x1 << 14)
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#define DPHY_INADJ_IO1 (0x3f << 8)
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#define DPHY_INADJ_IO1_SHIFT 8
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#define SW_SET_DPHY_INADJ_IO0 (0x1 << 6)
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#define DPHY_INADJ_IO0 0x3f
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#define DPHY_INADJ_IO0_SHIFT 0
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#define NVCSI_CIL_A_DATA_DESKEW_CTRL_0_OFFSET regs[11]
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// bits in register NVCSI_CIL_A_DATA_DESKEW_CTRL_0
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#define DATA_INADJ_SWEEP_CTRL1 (0x1 << 31)
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#define DATA_INADJ_SWEEP_CTRL0 (0x1 << 15)
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#define DATA_INADJ_LIMIT_HIGH1 (0x3f << 23)
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#define DATA_INADJ_LIMIT_HIGH0 (0x3f << 8)
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#define NVCSI_CIL_A_DPHY_DESKEW_STATUS_0_OFFSET regs[12]
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// bits in register NVCSI_CIL_A_DPHY_DESKEW_STATUS_0
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#define DPHY_CALIB_ERR_IO1 (0x1 << 15)
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#define DPHY_CALIB_DONE_IO1 (0x1 << 14)
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#define DPHY_CALIB_ERR_IO0 (0x1 << 7)
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#define DPHY_CALIB_DONE_IO0 (0x1 << 6)
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#define NVCSI_CIL_A_DPHY_DESKEW_DATA_CALIB_STATUS_LOW_0_0_OFFSET regs[13]
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#define NVCSI_CIL_A_DPHY_DESKEW_DATA_CALIB_STATUS_HIGH_0_0_OFFSET regs[14]
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#define NVCSI_CIL_A_DPHY_DESKEW_CLK_CALIB_STATUS_LOW_0_0_OFFSET regs[15]
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#define NVCSI_CIL_A_DPHY_DESKEW_CLK_CALIB_STATUS_HIGH_0_0_OFFSET regs[16]
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// only for t194+
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#define NVCSI_CIL_A_DPHY_DESKEW_RESULT_STATUS_OFFSET 0x64
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#define NVCSI_CIL_B_DPHY_DESKEW_RESULT_STATUS_OFFSET 0xf0
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/*
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* NVCSI_PHY_0_NVCSI_CIL_A_DESKEW_CONTROL_0 was introduced in T194
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* Use this register for DESKEW_COMPARE and DESKEW_SETTLE
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* On T186, this register doesn't exist, and will be mapped to
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* NVCSI_PHY_0_NVCSI_CIL_A_CONTROL_0 for deskew compare/settle programming
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*/
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#define NVCSI_CIL_A_DESKEW_CONTROL_0_OFFSET regs[17]
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#define NVCSI_CIL_A_CONTROL_0_OFFSET regs[18]
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/*
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* bits in NVCSI_CIL_A_DESKEW_CONTROL_0/NVCSI_CIL_A_CONTROL_0
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* For T194, the THS_SETTLE control was split into
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* THS_SETTLE0 and THS_SETTLE1 for per-lane control
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* For T186, THS_SETTLE0_SHIFT and THS_SETTLE0_SHIFT1 will be the same.
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*/
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#define DESKEW_COMPARE regs[19]
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#define DESKEW_COMPARE_SHIFT regs[20]
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#define DESKEW_SETTLE regs[21]
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#define DESKEW_SETTLE_SHIFT regs[22]
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#define CLK_SETTLE regs[23]
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#define CLK_SETTLE_SHIFT0 regs[24]
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#define THS_SETTLE0 regs[25]
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#define THS_SETTLE1 regs[26]
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#define THS_SETTLE0_SHIFT regs[27]
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#define THS_SETTLE1_SHIFT regs[28]
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#define NVCSI_CIL_B_DPHY_INADJ_CTRL_0_OFFSET regs[29]
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#define NVCSI_CIL_B_CLK_DESKEW_CTRL_0_OFFSET regs[30]
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#define NVCSI_CIL_B_DATA_DESKEW_CTRL_0_OFFSET regs[31]
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#define NVCSI_CIL_B_DPHY_DESKEW_STATUS_0_OFFSET regs[32]
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// same note as above for NVCSI_CIL_A_DESKEW_CONTROL_0
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#define NVCSI_CIL_B_DESKEW_CONTROL_0_OFFSET regs[33]
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#define NVCSI_CIL_B_CONTROL_0_OFFSET regs[34]
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#define NVCSI_DPHY_CALIB_STATUS_IO_OFFSET 0x8
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#define NVCSI_PHY_OFFSET 0x10000
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#define NVCSI_CIL_B_OFFSET regs[35]
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#define REGS_COUNT 36
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////////
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#define DESKEW_TIMEOUT_MSEC 100
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struct nvcsi_deskew_context {
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unsigned int deskew_lanes;
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struct task_struct *deskew_kthread;
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struct completion thread_done;
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};
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#if IS_ENABLED(CONFIG_TEGRA_GRHOST_NVCSI)
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int nvcsi_deskew_apply_check(struct nvcsi_deskew_context *ctx);
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int nvcsi_deskew_setup(struct nvcsi_deskew_context *ctx);
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#else
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static int inline nvcsi_deskew_apply_check(struct nvcsi_deskew_context *ctx)
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{
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return 0;
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}
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static int inline nvcsi_deskew_setup(struct nvcsi_deskew_context *ctx)
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{
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return 0;
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}
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#endif
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void nvcsi_deskew_platform_setup(struct tegra_csi_device *dev, bool is_t19x);
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void deskew_dbgfs_calc_bound(struct seq_file *s, long long input_stats);
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void deskew_dbgfs_deskew_stats(struct seq_file *s);
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#endif
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