47 lines
1.5 KiB
C
47 lines
1.5 KiB
C
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/*
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* Copyright (c) 2016-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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/*
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* This is the t19x specific component of the new SID dt-binding.
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*/
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#define TEGRA_SID_RCE 0x2a /* 42 */
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#define TEGRA_SID_RCE_VM2 0x2b /* 43 */
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#define TEGRA_SID_RCE_RM 0x2F /* 47 */
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#define TEGRA_SID_VIFALC 0x30 /* 48 */
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#define TEGRA_SID_ISPFALC 0x31 /* 49 */
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#define TEGRA_SID_MIU 0x50 /* 80 */
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#define TEGRA_SID_NVDLA0 0x51 /* 81 */
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#define TEGRA_SID_NVDLA1 0x52 /* 82 */
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#define TEGRA_SID_PVA0 0x53 /* 83 */
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#define TEGRA_SID_PVA1 0x54 /* 84 */
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#define TEGRA_SID_NVENC1 0x55 /* 85 */
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#define TEGRA_SID_PCIE0 0x56 /* 86 */
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#define TEGRA_SID_PCIE1 0x57 /* 87 */
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#define TEGRA_SID_PCIE2 0x58 /* 88 */
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#define TEGRA_SID_PCIE3 0x59 /* 89 */
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#define TEGRA_SID_PCIE4 0x5A /* 90 */
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#define TEGRA_SID_PCIE5 0x5B /* 91 */
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#define TEGRA_SID_NVDEC1 0x5C /* 92 */
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#define TEGRA_SID_VI_VM2 0x64 /* 100 */
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