30 lines
1.1 KiB
C
30 lines
1.1 KiB
C
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/*
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* Copyright (C) 2015-2016, NVIDIA Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*/
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#ifndef _DT_BINDINGS_PINCTRL_TEGRA_PADCTL_PHY_H
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#define _DT_BINDINGS_PINCTRL_TEGRA_PADCTL_PHY_H 1
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/* 0-15 for USB3 */
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#define TEGRA_PADCTL_PHY_USB3_BASE (0)
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#define TEGRA_PADCTL_PHY_USB3_P(x) ((x) + TEGRA_PADCTL_PHY_USB3_BASE)
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/* 16-31 for UTMI */
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#define TEGRA_PADCTL_PHY_UTMI_BASE (16)
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#define TEGRA_PADCTL_PHY_UTMI_P(x) ((x) + TEGRA_PADCTL_PHY_UTMI_BASE)
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/* 32-47 for HSIC */
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#define TEGRA_PADCTL_PHY_HSIC_BASE (32)
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#define TEGRA_PADCTL_PHY_HSIC_P(x) ((x) + TEGRA_PADCTL_PHY_HSIC_BASE)
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/* 48-63 for Tegra built-in CDP phy for UTMI */
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#define TEGRA_PADCTL_PHY_CDP_BASE (48)
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#define TEGRA_PADCTL_PHY_CDP_P(x) ((x) + TEGRA_PADCTL_PHY_CDP_BASE)
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#define TEGRA_PADCTL_PORT_DISABLED (0)
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#define TEGRA_PADCTL_PORT_HOST_ONLY (1)
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#define TEGRA_PADCTL_PORT_DEVICE_ONLY (2)
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#define TEGRA_PADCTL_PORT_OTG_CAP (3)
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#endif /* _DT_BINDINGS_PINCTRL_TEGRA_PADCTL_PHY_H */
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