397 lines
11 KiB
C
397 lines
11 KiB
C
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/**
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* Copyright (c) 2015-2018, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*/
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#ifndef __EMC_BWMGR_H
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#define __EMC_BWMGR_H
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/of_address.h>
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#include <linux/platform/tegra/iso_client.h>
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/* keep in sync with tegra_bwmgr_client_names */
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enum tegra_bwmgr_client_id {
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TEGRA_BWMGR_CLIENT_CPU_CLUSTER_0,
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TEGRA_BWMGR_CLIENT_CPU_CLUSTER_1,
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TEGRA_BWMGR_CLIENT_CPU_CLUSTER_2,
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TEGRA_BWMGR_CLIENT_CPU_CLUSTER_3,
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TEGRA_BWMGR_CLIENT_DISP0,
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TEGRA_BWMGR_CLIENT_DISP1,
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TEGRA_BWMGR_CLIENT_DISP2,
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TEGRA_BWMGR_CLIENT_DISP1_LA_EMC,
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TEGRA_BWMGR_CLIENT_DISP2_LA_EMC,
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TEGRA_BWMGR_CLIENT_USBD,
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TEGRA_BWMGR_CLIENT_XHCI,
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TEGRA_BWMGR_CLIENT_SDMMC1,
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TEGRA_BWMGR_CLIENT_SDMMC2,
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TEGRA_BWMGR_CLIENT_SDMMC3,
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TEGRA_BWMGR_CLIENT_SDMMC4,
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TEGRA_BWMGR_CLIENT_MON,
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TEGRA_BWMGR_CLIENT_GPU,
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TEGRA_BWMGR_CLIENT_MSENC,
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TEGRA_BWMGR_CLIENT_NVENC1,
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TEGRA_BWMGR_CLIENT_NVJPG,
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TEGRA_BWMGR_CLIENT_NVDEC,
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TEGRA_BWMGR_CLIENT_NVDEC1,
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TEGRA_BWMGR_CLIENT_TSEC,
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TEGRA_BWMGR_CLIENT_TSECB,
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TEGRA_BWMGR_CLIENT_VI,
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TEGRA_BWMGR_CLIENT_ISPA,
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TEGRA_BWMGR_CLIENT_ISPB,
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TEGRA_BWMGR_CLIENT_CAMERA,
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TEGRA_BWMGR_CLIENT_CAMERA_NON_ISO,
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TEGRA_BWMGR_CLIENT_CAMRTC,
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TEGRA_BWMGR_CLIENT_ISOMGR,
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TEGRA_BWMGR_CLIENT_THERMAL_CAP,
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TEGRA_BWMGR_CLIENT_VIC,
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TEGRA_BWMGR_CLIENT_APE_ADSP,
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TEGRA_BWMGR_CLIENT_APE_ADMA,
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TEGRA_BWMGR_CLIENT_PCIE,
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TEGRA_BWMGR_CLIENT_PCIE_1,
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TEGRA_BWMGR_CLIENT_PCIE_2,
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TEGRA_BWMGR_CLIENT_PCIE_3,
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TEGRA_BWMGR_CLIENT_PCIE_4,
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TEGRA_BWMGR_CLIENT_PCIE_5,
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TEGRA_BWMGR_CLIENT_BBC_0,
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TEGRA_BWMGR_CLIENT_EQOS,
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TEGRA_BWMGR_CLIENT_SE0,
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TEGRA_BWMGR_CLIENT_SE1,
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TEGRA_BWMGR_CLIENT_SE2,
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TEGRA_BWMGR_CLIENT_SE3,
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TEGRA_BWMGR_CLIENT_SE4,
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TEGRA_BWMGR_CLIENT_PMQOS,
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TEGRA_BWMGR_CLIENT_NVPMODEL,
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TEGRA_BWMGR_CLIENT_DEBUG,
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TEGRA_BWMGR_CLIENT_DLA0,
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TEGRA_BWMGR_CLIENT_DLA1,
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TEGRA_BWMGR_CLIENT_COUNT /* Should always be last */
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};
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enum tegra_bwmgr_request_type {
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TEGRA_BWMGR_SET_EMC_FLOOR, /* lower bound */
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TEGRA_BWMGR_SET_EMC_CAP, /* upper bound */
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TEGRA_BWMGR_SET_EMC_ISO_CAP, /* upper bound that affects ISO Bw */
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TEGRA_BWMGR_SET_EMC_SHARED_BW, /* shared bw request */
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TEGRA_BWMGR_SET_EMC_SHARED_BW_ISO, /* for use by ISO Mgr only */
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TEGRA_BWMGR_SET_EMC_REQ_COUNT /* Should always be last */
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};
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enum bwmgr_dram_types {
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DRAM_TYPE_NONE,
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DRAM_TYPE_LPDDR4_16CH_ECC,
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DRAM_TYPE_LPDDR4_8CH_ECC,
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DRAM_TYPE_LPDDR4_4CH_ECC,
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DRAM_TYPE_LPDDR4_2CH_ECC,
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DRAM_TYPE_LPDDR4_16CH,
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DRAM_TYPE_LPDDR4_8CH,
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DRAM_TYPE_LPDDR4_4CH,
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DRAM_TYPE_LPDDR4_2CH,
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DRAM_TYPE_LPDDR3_2CH,
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DRAM_TYPE_DDR3_2CH
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};
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extern u8 bwmgr_dram_efficiency;
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extern u8 bwmgr_dram_num_channels;
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/* flag to determine supported memory and channel configuration */
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extern u8 bwmgr_dram_config_supported;
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extern u32 *bwmgr_dram_iso_eff_table;
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extern u32 *bwmgr_dram_noniso_eff_table;
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extern u32 *bwmgr_max_nvdis_bw_reqd;
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extern u32 *bwmgr_max_vi_bw_reqd;
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extern int *bwmgr_slope;
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extern u32 *bwmgr_vi_bw_reqd_offset;
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extern int bwmgr_iso_bw_percentage;
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extern enum bwmgr_dram_types bwmgr_dram_type;
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extern int emc_to_dram_freq_factor;
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struct tegra_bwmgr_client;
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struct bwmgr_ops {
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unsigned long (*freq_to_bw)(unsigned long freq);
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unsigned long (*bw_to_freq)(unsigned long bw);
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u32 (*dvfs_latency)(u32 ufreq);
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unsigned long (*bwmgr_apply_efficiency)(
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unsigned long total_bw, unsigned long iso_bw,
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unsigned long max_rate, u64 usage_flags,
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unsigned long *iso_bw_min, unsigned long iso_bw_nvdis,
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unsigned long iso_bw_vi);
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unsigned long (*get_best_iso_freq)(long iso_bw,
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long iso_bw_nvdis, long iso_bw_vi);
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void (*update_efficiency)(unsigned long dram_refresh_rate);
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u32 (*get_max_iso_bw)(enum tegra_iso_client client);
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};
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struct bwmgr_ops *bwmgr_eff_init_t21x(void);
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struct bwmgr_ops *bwmgr_eff_init_t18x(void);
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struct bwmgr_ops *bwmgr_eff_init_t19x(void);
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#if defined(CONFIG_TEGRA_BWMGR)
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/**
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* tegra_bwmgr_register - register an EMC Bandwidth Manager client.
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* Also see tegra_bwmgr_unregister().
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* @client client id from tegra_bwmgr_client_id
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*
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* Returns a valid handle on successful registration, NULL on error.
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*/
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struct tegra_bwmgr_client *tegra_bwmgr_register(
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enum tegra_bwmgr_client_id client);
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/**
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* tegra_bwmgr_unregister - unregister an EMC Bandwidth Manager client.
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* Callers should match register/unregister calls.
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* Persistence of old requests across
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* register/unregister calls is undefined.
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* Also see tegra_bwmgr_set_emc()
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*
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* @handle handle acquired during tegra_bwmgr_register
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*/
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void tegra_bwmgr_unregister(struct tegra_bwmgr_client *handle);
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/**
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* tegra_bwmgr_get_dram_num_channels - get the number of DRAM channels
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*
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* Returns the number of DRAM channels that are configured on the underlying
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* platform.
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*/
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u8 tegra_bwmgr_get_dram_num_channels(void);
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/**
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* tegra_bwmgr_get_emc_rate - get the current EMC rate.
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*
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* Returns current memory clock rate in Hz.
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*/
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unsigned long tegra_bwmgr_get_emc_rate(void);
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/**
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* tegra_bwmgr_get_max_emc_rate - get the max EMC rate.
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*
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* Returns the max memory clock rate in Hz.
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*/
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unsigned long tegra_bwmgr_get_max_emc_rate(void);
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/**
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* tegra_bwmgr_get_core_emc_rate - get the actual emc frequency calculated
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* using the dram frequency and emc_to_dram
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* conversion factor.
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*
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* Returns the core emc rate in Hz.
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*/
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unsigned long tegra_bwmgr_get_core_emc_rate(void);
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/**
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* tegra_bwmgr_round_rate - round up to next EMC rate which can be provided
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*
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* @bw Input rate
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*
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* Returns the next higher rate from the Input rate that EMC can run at.
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*/
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unsigned long tegra_bwmgr_round_rate(unsigned long bw);
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/**
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* tegra_bwmgr_set_emc - request to bwmgr to set an EMC rate parameter.
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* Actual clock rate depends on aggregation of
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* requests by all clients. If needed, use
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* tegra_bwmgr_get_emc_rate() to get the rate after
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* a tegra_bwmgr_set_emc() call.
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*
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* Call tegra_bwmgr_set_emc() with same request type and
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* val = 0 to clear request.
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*
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* @handle handle acquired during tegra_bwmgr_register
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* @val value to be set in Hz, 0 to clear old request of the same type
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* @req chosen type from tegra_bwmgr_request_type
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*
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* Returns success (0) or negative errno.
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*/
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int tegra_bwmgr_set_emc(struct tegra_bwmgr_client *handle, unsigned long val,
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enum tegra_bwmgr_request_type req);
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/**
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* tegra_bwmgr_get_client_info - outputs the value previously set with
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* tegra_bwmgr_set_emc or 0 if no value has been set.
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*
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* @handle handle acquired during tegra_bwmgr_register
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* @out_val bandwidth value in Hz
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* @req chosen type from tegra_bwmgr_request_type
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*
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* Returns success (0) or negative errno.
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*/
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int tegra_bwmgr_get_client_info(struct tegra_bwmgr_client *handle,
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unsigned long *out_val,
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enum tegra_bwmgr_request_type req);
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/**
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* tegra_bwmgr_notifier_register - register a notifier callback when
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* emc rate changes. Must be called from non-atomic
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* context. The callback must not call any bwmgr API.
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* @nb linux notifier block
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*
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* Returns success (0) or negative errno.
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*/
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int tegra_bwmgr_notifier_register(struct notifier_block *nb);
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/**
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* tegra_bwmgr_notifier_unregister - unregister a notifier callback.
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* @nb linux notifier block
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*
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* Returns success (0) or negative errno.
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*/
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int tegra_bwmgr_notifier_unregister(struct notifier_block *nb);
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/*
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* Initialize bwmgr.
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* This api would be called by .init_machine during boot.
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* bwmgr clients, don't call this api.
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*/
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int __init bwmgr_init(void);
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void __exit bwmgr_exit(void);
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/*
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* Initialize pmqos bwmgr code which registers pmqos as bwmgr client and
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* registers a notifier which gets called on update to PMQOS_EMC_FREQ_MIN.
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*/
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int __init pmqos_bwmgr_init(void);
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#else /* CONFIG_TEGRA_BWMGR */
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static inline struct tegra_bwmgr_client *tegra_bwmgr_register(
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enum tegra_bwmgr_client_id client_id)
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{
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static int i;
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/* return a dummy handle to allow client to function
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* as if bwmgr were enabled.
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*/
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return (struct tegra_bwmgr_client *) &i;
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}
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static inline void tegra_bwmgr_unregister(struct tegra_bwmgr_client *handle) {}
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static inline int bwmgr_init(void)
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{
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return 0;
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}
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static inline void bwmgr_exit(void) {}
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static inline u8 tegra_bwmgr_get_dram_num_channels(void)
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{
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return 0;
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}
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static inline unsigned long tegra_bwmgr_get_emc_rate(void)
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{
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static struct clk *bwmgr_emc_clk;
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struct device_node *dn;
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if (!bwmgr_emc_clk) {
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dn = of_find_compatible_node(NULL, NULL, "nvidia,bwmgr");
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if (dn == NULL) {
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pr_err("bwmgr: dt node not found.\n");
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return 0;
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}
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bwmgr_emc_clk = of_clk_get(dn, 0);
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if (IS_ERR_OR_NULL(bwmgr_emc_clk)) {
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pr_err("bwmgr: couldn't find emc clock.\n");
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bwmgr_emc_clk = NULL;
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WARN_ON(true);
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return 0;
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}
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}
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return clk_get_rate(bwmgr_emc_clk);
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}
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static inline unsigned long tegra_bwmgr_get_max_emc_rate(void)
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{
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static struct clk *bwmgr_emc_clk;
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struct device_node *dn;
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if (!bwmgr_emc_clk) {
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dn = of_find_compatible_node(NULL, NULL, "nvidia,bwmgr");
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if (dn == NULL) {
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pr_err("bwmgr: dt node not found.\n");
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return 0;
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}
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bwmgr_emc_clk = of_clk_get(dn, 0);
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if (IS_ERR_OR_NULL(bwmgr_emc_clk)) {
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pr_err("bwmgr: couldn't find emc clock.\n");
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bwmgr_emc_clk = NULL;
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WARN_ON(true);
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return 0;
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}
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}
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/* Use LONG_MAX as clk_round_rate treats rate argument as signed */
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return clk_round_rate(bwmgr_emc_clk, LONG_MAX);
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline unsigned long tegra_bwmgr_get_core_emc_rate(void)
|
||
|
|
{
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
static inline unsigned long tegra_bwmgr_round_rate(unsigned long bw)
|
||
|
|
{
|
||
|
|
static struct clk *bwmgr_emc_clk;
|
||
|
|
struct device_node *dn;
|
||
|
|
|
||
|
|
if (!bwmgr_emc_clk) {
|
||
|
|
dn = of_find_compatible_node(NULL, NULL, "nvidia,bwmgr");
|
||
|
|
if (dn == NULL) {
|
||
|
|
pr_err("bwmgr: dt node not found.\n");
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
bwmgr_emc_clk = of_clk_get(dn, 0);
|
||
|
|
if (IS_ERR_OR_NULL(bwmgr_emc_clk)) {
|
||
|
|
pr_err("bwmgr: couldn't find emc clock.\n");
|
||
|
|
bwmgr_emc_clk = NULL;
|
||
|
|
WARN_ON(true);
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
}
|
||
|
|
|
||
|
|
return clk_round_rate(bwmgr_emc_clk, bw);
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline int tegra_bwmgr_set_emc(struct tegra_bwmgr_client *handle,
|
||
|
|
unsigned long val, enum tegra_bwmgr_request_type req)
|
||
|
|
{
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline int tegra_bwmgr_get_client_info(struct tegra_bwmgr_client *handle,
|
||
|
|
unsigned long *out_val,
|
||
|
|
enum tegra_bwmgr_request_type req)
|
||
|
|
{
|
||
|
|
if (!out_val)
|
||
|
|
return -EINVAL;
|
||
|
|
*out_val = 0;
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline int tegra_bwmgr_notifier_register(struct notifier_block *nb)
|
||
|
|
{
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
static inline int tegra_bwmgr_notifier_unregister(struct notifier_block *nb)
|
||
|
|
{
|
||
|
|
return 0;
|
||
|
|
}
|
||
|
|
|
||
|
|
#endif /* CONFIG_TEGRA_BWMGR */
|
||
|
|
#endif /* __EMC_BWMGR_H */
|