85 lines
1.9 KiB
C
85 lines
1.9 KiB
C
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/*
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* Copyright (C) 2017-2018, NVIDIA Corporation. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __TEGRA_MC_H
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#define __TEGRA_MC_H
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/*
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* API for reading carveout info.
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*/
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enum carveout_desc {
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MC_SECURITY_CARVEOUT1 = 0,
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MC_SECURITY_CARVEOUT2,
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MC_SECURITY_CARVEOUT3,
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MC_SECURITY_CARVEOUT4,
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MC_NR_CARVEOUTS
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};
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struct mc_carveout_info {
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enum carveout_desc desc;
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u64 base;
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u64 size;
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};
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#if defined(CONFIG_TEGRA_MC)
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/**
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* Read from the MC.
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*
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* @idx The MC channel to read from.
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* @reg The offset of the register to read.
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*
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* Read from the specified MC channel: 0 -> MC0, 1 -> MC1, etc. If @idx
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* corresponds to a non-existent channel then 0 is returned.
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*/
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extern u32 tegra_mc_readl(u32 reg);
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/**
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* Write to the MC.
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*
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* @idx The MC channel to write to.
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* @val Value to write.
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* @reg The offset of the register to write.
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*
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* Write to the specified MC channel: 0 -> MC0, 1 -> MC1, etc. For writes there
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* is a special channel, %MC_BROADCAST_CHANNEL, which writes to all channels. If
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* @idx corresponds to a non-existent channel then the write is dropped.
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*/
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extern void tegra_mc_writel(u32 val, u32 reg);
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extern int mc_get_carveout_info(struct mc_carveout_info *inf, int *nr,
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enum carveout_desc co);
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#else
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static inline u32 tegra_mc_readl(u32 reg)
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{
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return 0xffffffff;
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}
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static inline void tegra_mc_writel(u32 val, u32 reg)
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{
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}
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static inline int mc_get_carveout_info(struct mc_carveout_info *inf, int *nr,
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enum carveout_desc co)
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{
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return -ENODEV;
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}
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#endif
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#endif
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