310 lines
9.5 KiB
C
310 lines
9.5 KiB
C
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/*
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* Raydium RM31080 touchscreen header
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*
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* Copyright (C) 2012-2014, Raydium Semiconductor Corporation.
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* Copyright (C) 2012-2014, NVIDIA Corporation. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#ifndef _RM31080A_TS_H_
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#define _RM31080A_TS_H_
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/***************************************************************************
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* Kernel CTRL Define
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* DO NOT MODIFY
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* NOTE: Need to sync with HAL
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***************************************************************************/
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#define RETURN_OK 0
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#define RETURN_FAIL 1
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#define TRUE 1
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#define FALSE 0
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#define DEBUG_DRIVER 0x01
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#define DEBUG_REGISTER 0x02
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#define DEBUG_KTHREAD 0x04
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#define RM_IOCTL_REPORT_POINT 0x1001
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#define RM_IOCTL_SET_HAL_PID 0x1002
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#define RM_IOCTL_INIT_START 0x1003
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#define RM_IOCTL_INIT_END 0x1004
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#define RM_IOCTL_FINISH_CALC 0x1005
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#define RM_IOCTL_SCRIBER_CTRL 0x1006
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#define RM_IOCTL_READ_RAW_DATA 0x1007
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#define RM_IOCTL_SET_PARAMETER 0x100A
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#define RM_IOCTL_SET_VARIABLE 0x1010
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#define RM_VARIABLE_SELF_TEST_RESULT 0x01
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#define RM_VARIABLE_SCRIBER_FLAG 0x02
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#define RM_VARIABLE_AUTOSCAN_FLAG 0x03
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#define RM_VARIABLE_VERSION 0x04
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#define RM_VARIABLE_IDLEMODECHECK 0x05
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#define RM_VARIABLE_REPEAT 0x06
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#define RM_VARIABLE_WATCHDOG_FLAG 0x07
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#define RM_VARIABLE_TEST_VERSION 0x08
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#define RM_VARIABLE_SET_SPI_UNLOCK 0x09
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#define RM_VARIABLE_SET_WAKE_UNLOCK 0x0A
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#define RM_VARIABLE_DPW 0x0B
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#define RM_VARIABLE_NS_MODE 0x0C
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#define RM_VARIABLE_TOUCHFILE_STATUS 0x0D
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#define RM_VARIABLE_TOUCH_EVENT 0x0E
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#define RM_IOCTL_GET_VARIABLE 0x1011
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#define RM_VARIABLE_PLATFORM_ID 0x01
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#define RM_VARIABLE_GPIO_SELECT 0x02
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#define RM_VARIABLE_CHECK_SPI_LOCK 0x03
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#define RM_IOCTL_GET_SACN_MODE 0x1012
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#define RM_IOCTL_SET_KRL_TBL 0x1013
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#define RM_IOCTL_WATCH_DOG 0x1014
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#define RM_IOCTL_SET_BASELINE 0x1015
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#define RM_IOCTL_INIT_SERVICE 0x1016
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#define RM_IOCTL_SET_CLK 0x1017
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#define RM_INPUT_RESOLUTION_X 4096
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#define RM_INPUT_RESOLUTION_Y 4096
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#define RM_TS_SIGNAL 44
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#define RM_TS_MAX_POINTS 16
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#define RM_SIGNAL_INTR 0x00000001
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#define RM_SIGNAL_SUSPEND 0x00000002
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#define RM_SIGNAL_RESUME 0x00000003
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#define RM_SIGNAL_CHANGE_PARA 0x00000004
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#define RM_SIGNAL_WATCH_DOG_CHECK 0x00000005
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#define RM_SIGNAL_REPORT_MODE_CHANGE 0x00000006
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#define RM_SIGNAL_PARA_SMOOTH 0x00
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#define RM_SIGNAL_PARA_SELF_TEST 0x01
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#define RM_SIGNAL_PARA_REPORT_MODE_CHANGE 0x02
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#define RM_SELF_TEST_STATUS_FINISH 0
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#define RM_SELF_TEST_STATUS_TESTING 1
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#define RM_SELF_TEST_RESULT_FAIL 0
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#define RM_SELF_TEST_RESULT_PASS 1
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/****************************************************************************
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* Platform define
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***************************************************************************/
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#define RM_PLATFORM_K007 0x00
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#define RM_PLATFORM_K107 0x01
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#define RM_PLATFORM_C210 0x02
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#define RM_PLATFORM_D010 0x03
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#define RM_PLATFORM_P005 0x04
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#define RM_PLATFORM_R005 0x05
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#define RM_PLATFORM_M010 0x06
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#define RM_PLATFORM_P140 0x07
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#define RM_PLATFORM_A010 0x08
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#define RM_PLATFORM_L005 0x09
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#define RM_PLATFORM_K156 0x0A
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#define RM_PLATFORM_T008 0x0B
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#define RM_PLATFORM_T008_2 0x0D
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#define RM_PLATFORM_RAYPRJ 0x80
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/***************************************************************************
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* DO NOT MODIFY - Kernel CTRL Define
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* NOTE: Need to sync with HAL
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***************************************************************************/
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/***************************************************************************
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* Kernel Command Set
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* DO NOT MODIFY
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* NOTE: Need to sync with HAL
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***************************************************************************/
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#define KRL_TBL_CMD_LEN 3
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#define KRL_INDEX_FUNC_SET_IDLE 0
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#define KRL_INDEX_FUNC_PAUSE_AUTO 1
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#define KRL_INDEX_RM_RESUME 2
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#define KRL_INDEX_RM_SUSPEND 3
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#define KRL_INDEX_RM_READ_IMG 4
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#define KRL_INDEX_RM_WATCHDOG 5
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#define KRL_INDEX_RM_TESTMODE 6
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#define KRL_INDEX_RM_SLOWSCAN 7
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#define KRL_INDEX_RM_CLEARINT 8
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#define KRL_INDEX_RM_SCANSTART 9
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#define KRL_INDEX_RM_WAITSCANOK 10
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#define KRL_INDEX_RM_SETREPTIME 11
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#define KRL_INDEX_RM_NSPARA 12
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#define KRL_INDEX_RM_WRITE_IMG 13
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#define KRL_INDEX_RM_TLK 14
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#define KRL_INDEX_RM_KL_TESTMODE 15
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#define KRL_INDEX_RM_NS_SCF 16
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#define KRL_SIZE_SET_IDLE 128
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#define KRL_SIZE_PAUSE_AUTO 64
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#define KRL_SIZE_RM_RESUME 64
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#define KRL_SIZE_RM_SUSPEND 64
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#define KRL_SIZE_RM_READ_IMG 64
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#define KRL_SIZE_RM_WATCHDOG 96
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#define KRL_SIZE_RM_TESTMODE 96
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#define KRL_SIZE_RM_SLOWSCAN 128
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#define KRL_SIZE_RM_CLEARINT 32
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#define KRL_SIZE_RM_SCANSTART 32
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#define KRL_SIZE_RM_WAITSCANOK 32
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#define KRL_SIZE_RM_SETREPTIME 32
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#define KRL_SIZE_RM_NS_PARA 64
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#define KRL_SIZE_RM_WRITE_IMAGE 64
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#define KRL_SIZE_RM_TLK 128
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#define KRL_SIZE_RM_KL_TESTMODE 128
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#define KRL_SIZE_RM_SCF_PARA 64
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#define KRL_TBL_FIELD_POS_LEN_H 0
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#define KRL_TBL_FIELD_POS_LEN_L 1
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#define KRL_TBL_FIELD_POS_CASE_NUM 2
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#define KRL_TBL_FIELD_POS_CMD_NUM 3
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#define KRL_CMD_READ 0x11
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#define KRL_CMD_WRITE_W_DATA 0x12
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#define KRL_CMD_WRITE_WO_DATA 0x13
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#define KRL_CMD_IF_AND_OR 0x14
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#define KRL_CMD_AND 0x18
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#define KRL_CMD_OR 0x19
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#define KRL_CMD_NOT 0x1A
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#define KRL_CMD_XOR 0x1B
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#define KRL_CMD_WRITE_W_COUNT 0x1C
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#define KRL_CMD_RETURN_RESULT 0x1D
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#define KRL_CMD_RETURN_VALUE 0x1E
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#define KRL_CMD_DRAM_INIT 0x1F
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#define KRL_CMD_SEND_SIGNAL 0x20
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#define KRL_CMD_CONFIG_RST 0x21
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#define KRL_SUB_CMD_SET_RST_GPIO 0x00
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#define KRL_SUB_CMD_SET_RST_VALUE 0x01
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#define KRL_CMD_SET_TIMER 0x22
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#define KRL_SUB_CMD_INIT_TIMER 0x00
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#define KRL_SUB_CMD_ADD_TIMER 0x01
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#define KRL_SUB_CMD_DEL_TIMER 0x02
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#define KRL_CMD_CONFIG_3V3 0x23
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#define KRL_SUB_CMD_SET_3V3_GPIO 0x00
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#define KRL_SUB_CMD_SET_3V3_REGULATOR 0x01
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#define KRL_CMD_CONFIG_1V8 0x24
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#define KRL_SUB_CMD_SET_1V8_GPIO 0x00
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#define KRL_SUB_CMD_SET_1V8_REGULATOR 0x01
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#define KRL_CMD_CONFIG_CLK 0x25
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#define KRL_SUB_CMD_SET_CLK 0x00
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#define KRL_CMD_CONFIG_CS 0x26
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#define KRL_SUB_CMD_SET_CS_LOW 0x00
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#define KRL_CMD_MSLEEP 0x40
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#define KRL_CMD_FLUSH_QU 0x52
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#define KRL_SUB_CMD_SENSOR_QU 0x00
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#define KRL_SUB_CMD_TIMER_QU 0x01
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#define KRL_CMD_READ_IMG 0x60
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#define KRL_CMD_WRITE_IMG 0x61
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#define KRL_CMD_CONFIG_IRQ 0x70
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#define KRL_SUB_CMD_SET_IRQ 0x00
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#define KRL_CMD_DUMMY 0xFF
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/***************************************************************************
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* DO NOT MODIFY - Kernel Command Set
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* NOTE: Need to sync with HAL
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***************************************************************************/
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/***************************************************************************
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* Kernel Point Report Definition
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* DO NOT MODIFY
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* NOTE: Need to sync with HAL
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***************************************************************************/
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#define INPUT_PROTOCOL_TYPE_A 0x01
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#define INPUT_PROTOCOL_TYPE_B 0x02
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#define INPUT_PROTOCOL_CURRENT_SUPPORT INPUT_PROTOCOL_TYPE_B
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#define INPUT_SLOT_RESET 0x80
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#define INPUT_ID_RESET 0xFF
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#define MAX_REPORT_TOUCHED_POINTS 10
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#define POINT_TYPE_NONE 0x00
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#define POINT_TYPE_STYLUS 0x01
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#define POINT_TYPE_ERASER 0x02
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#define POINT_TYPE_FINGER 0x03
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#define POINT_TYPE_THUMB 0x04
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#define POINT_TYPE_NUM 0x05
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#define EVENT_REPORT_MODE_STYLUS_ERASER_FINGER 0x00
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#define EVENT_REPORT_MODE_FINGER_ONLY 0x01
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#define EVENT_REPORT_MODE_FINGER_ONLY_ALL_FINGERS 0x02
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#define EVENT_REPORT_MODE_STYLUS_FINGER 0x03
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#define EVENT_REPORT_MODE_STYLUS_ERASER 0x04
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#define EVENT_REPORT_MODE_STYLUS_ONLY 0x05
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#define EVENT_REPORT_MODE_ERASER_ONLY 0x06
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#define EVENT_REPORT_MODE_TYPE_NUM 0x07
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/***************************************************************************
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* DO NOT MODIFY - Kernel Point Report Definition
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* NOTE: Need to sync with HAL
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***************************************************************************/
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/*#define ENABLE_CALC_QUEUE_COUNT*/
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#define ENABLE_SLOW_SCAN
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#define ENABLE_SMOOTH_LEVEL
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#define ENABLE_SPI_SETTING 0
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#define ENABLE_FREQ_HOPPING 1
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#define ENABLE_QUEUE_GUARD 0
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#define ENABLE_EVENT_QUEUE 0
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#define CS_SUPPORT
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#define ISR_POST_HANDLER WORK_QUEUE /*or KTHREAD*/
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#define WORK_QUEUE 0
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#define KTHREAD 1
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enum tch_update_reason {
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STYLUS_DISABLE_BY_WATER = 0x01,
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STYLUS_DISABLE_BY_NOISE,
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STYLUS_IS_ENABLED = 0xFF,
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};
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struct rm_touch_event {
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unsigned char uc_touch_count;
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unsigned char uc_id[RM_TS_MAX_POINTS];
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unsigned char uc_tool_type[RM_TS_MAX_POINTS];
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unsigned short us_x[RM_TS_MAX_POINTS];
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unsigned short us_y[RM_TS_MAX_POINTS];
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unsigned short us_z[RM_TS_MAX_POINTS];
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unsigned short us_tilt_x[RM_TS_MAX_POINTS];
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unsigned short us_tilt_y[RM_TS_MAX_POINTS];
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unsigned char uc_slot[RM_TS_MAX_POINTS];
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unsigned char uc_pre_tool_type[RM_TS_MAX_POINTS];
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};
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#if ENABLE_EVENT_QUEUE
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struct rm_touch_event_list {
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struct list_head next_event;
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struct rm_touch_event *event_record;
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};
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#endif
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struct rm_spi_ts_platform_data {
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int gpio_reset;
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int gpio_1v8;
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int gpio_3v3;
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int x_size;
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int y_size;
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unsigned char *config;
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int platform_id;
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unsigned char *name_of_clock;
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unsigned char *name_of_clock_con;
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bool gpio_sensor_select0;
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bool gpio_sensor_select1;
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};
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int rm_tch_spi_byte_write(unsigned char u8_addr, unsigned char u8_value);
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int rm_tch_spi_byte_read(unsigned char u8_addr, unsigned char *p_u8_value);
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#endif /*_RM31080A_TS_H_*/
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