226 lines
6.3 KiB
C
226 lines
6.3 KiB
C
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/* Copyright (c) 2012-2019, NVIDIA CORPORATION. All rights reserved.
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __UAPI_NVC_H__
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#define __UAPI_NVC_H__
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#include <linux/ioctl.h>
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#include <linux/types.h>
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#define NVC_INT2FLOAT_DIVISOR_1K 1000
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#define NVC_INT2FLOAT_DIVISOR_1M 1000000
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#define NVC_INT2FLOAT_DIVISOR 1000
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struct nvc_param_32 {
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__u32 param;
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__u32 sizeofvalue;
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__u32 variant;
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__u32 p_value;
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} __packed;
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struct nvc_param {
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__u32 param;
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__u32 sizeofvalue;
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__u32 variant;
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unsigned long p_value;
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} __packed;
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enum nvc_params {
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NVC_PARAM_EXPOSURE = 0,
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NVC_PARAM_GAIN,
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NVC_PARAM_FRAMERATE,
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NVC_PARAM_MAX_FRAMERATE,
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NVC_PARAM_INPUT_CLOCK,
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NVC_PARAM_LOCUS,
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NVC_PARAM_FLASH_CAPS,
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NVC_PARAM_FLASH_LEVEL,
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NVC_PARAM_FLASH_PIN_STATE,
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NVC_PARAM_TORCH_CAPS,
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NVC_PARAM_TORCH_LEVEL,
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NVC_PARAM_FOCAL_LEN,
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NVC_PARAM_MAX_APERTURE,
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NVC_PARAM_FNUMBER,
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NVC_PARAM_EXPOSURE_LIMITS,
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NVC_PARAM_GAIN_LIMITS,
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NVC_PARAM_FRAMERATE_LIMITS,
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NVC_PARAM_FRAME_RATES,
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NVC_PARAM_CLOCK_LIMITS,
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NVC_PARAM_EXP_LATCH_TIME,
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NVC_PARAM_REGION_USED,
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NVC_PARAM_CALIBRATION_DATA,
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NVC_PARAM_CALIBRATION_OVERRIDES,
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NVC_PARAM_SELF_TEST,
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NVC_PARAM_STS,
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NVC_PARAM_TESTMODE,
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NVC_PARAM_EXPECTED_VALUES,
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NVC_PARAM_RESET,
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NVC_PARAM_OPTIMIZE_RES,
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NVC_PARAM_DETECT_COLOR_TEMP,
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NVC_PARAM_LINES_PER_SEC,
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NVC_PARAM_CAPS,
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NVC_PARAM_CUSTOM_BLOCK_INFO,
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NVC_PARAM_STEREO_CAP,
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NVC_PARAM_FOCUS_STEREO,
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NVC_PARAM_STEREO,
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NVC_PARAM_INHERENT_GAIN,
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NVC_PARAM_VIEW_ANGLE_H,
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NVC_PARAM_VIEW_ANGLE_V,
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NVC_PARAM_ISP_SETTING,
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NVC_PARAM_OPERATION_MODE,
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NVC_PARAM_SUPPORT_ISP,
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NVC_PARAM_AWB_LOCK,
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NVC_PARAM_AE_LOCK,
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NVC_PARAM_RES_CHANGE_WAIT_TIME,
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NVC_PARAM_FACTORY_CALIBRATION_DATA,
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NVC_PARAM_DEV_ID,
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NVC_PARAM_GROUP_HOLD,
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NVC_PARAM_SET_SENSOR_FLASH_MODE,
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NVC_PARAM_TORCH_QUERY,
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NVC_PARAM_FLASH_EXT_CAPS,
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NVC_PARAM_TORCH_EXT_CAPS,
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NVC_PARAM_BEGIN_VENDOR_EXTENSIONS = 0x10000000,
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NVC_PARAM_CALIBRATION_STATUS,
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NVC_PARAM_TEST_PATTERN,
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NVC_PARAM_MODULE_INFO,
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NVC_PARAM_FLASH_MAX_POWER,
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NVC_PARAM_DIRECTION,
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NVC_PARAM_SENSOR_TYPE,
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NVC_PARAM_DLI_CHECK,
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NVC_PARAM_PARALLEL_DLI_CHECK,
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NVC_PARAM_BRACKET_CAPS,
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NVC_PARAM_NUM,
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NVC_PARAM_I2C,
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NVC_PARAM_FEATURES,
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NVC_PARAM_FORCE32 = 0x7FFFFFFF
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};
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/* sync off */
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#define NVC_SYNC_OFF 0
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/* use only this device (the one receiving the call) */
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#define NVC_SYNC_MASTER 1
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/* use only the synced device (the "other" device) */
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#define NVC_SYNC_SLAVE 2
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/* use both synced devices at the same time */
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#define NVC_SYNC_STEREO 3
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#define NVC_RESET_HARD 0
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#define NVC_RESET_SOFT 1
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struct nvc_param_isp {
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int attr;
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void *p_data;
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__u32 data_size;
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} __packed;
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struct nvc_isp_focus_param {
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__s32 min_pos;
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__s32 max_pos;
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__s32 hyperfocal;
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__s32 macro;
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__s32 powersave;
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} __packed;
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struct nvc_isp_focus_pos {
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__u32 is_auto;
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__s32 value;
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} __packed;
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struct nvc_isp_focus_region {
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__u32 num_region;
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__s32 value;
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} __packed;
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enum nvc_params_isp {
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NVC_PARAM_ISP_FOCUS_CAF = 16389,
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NVC_PARAM_ISP_FOCUS_CAF_PAUSE,
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NVC_PARAM_ISP_FOCUS_CAF_STS,
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NVC_PARAM_ISP_FOCUS_POS = 16407,
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NVC_PARAM_ISP_FOCUS_RANGE,
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NVC_PARAM_ISP_FOCUS_AF_RGN = 16413,
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NVC_PARAM_ISP_FOCUS_AF_RGN_MASK,
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NVC_PARAM_ISP_FOCUS_AF_RGN_STS,
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NVC_PARAM_ISP_FOCUS_CTRL = 16424,
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NVC_PARAM_ISP_FOCUS_TRGR,
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NVC_PARAM_ISP_FOCUS_STS,
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};
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#define NVC_PARAM_ISP_FOCUS_STS_BUSY 0
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#define NVC_PARAM_ISP_FOCUS_STS_LOCKD 1
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#define NVC_PARAM_ISP_FOCUS_STS_FAILD 2
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#define NVC_PARAM_ISP_FOCUS_STS_ERR 3
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#define NVC_PARAM_ISP_FOCUS_CTRL_ON 0
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#define NVC_PARAM_ISP_FOCUS_CTRL_OFF 1
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#define NVC_PARAM_ISP_FOCUS_CTRL_AUTO 2
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#define NVC_PARAM_ISP_FOCUS_CTRL_ALOCK 3
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#define NVC_PARAM_ISP_FOCUS_CAF_CONVRG 1
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#define NVC_PARAM_ISP_FOCUS_CAF_SEARCH 2
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#define NVC_PARAM_ISP_FOCUS_POS_INF 0
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#define NVC_IOCTL_PWR_WR _IOW('o', 102, int)
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#define NVC_IOCTL_PWR_RD _IOW('o', 103, int)
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#define NVC_IOCTL_PARAM_WR _IOW('o', 104, struct nvc_param)
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#define NVC_IOCTL32_PARAM_WR _IOW('o', 104, struct nvc_param_32)
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#define NVC_IOCTL_PARAM_RD _IOWR('o', 105, struct nvc_param)
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#define NVC_IOCTL32_PARAM_RD _IOWR('o', 105, struct nvc_param_32)
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#define NVC_IOCTL_PARAM_ISP_RD _IOWR('o', 200, struct nvc_param_isp)
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#define NVC_IOCTL_PARAM_ISP_WR _IOWR('o', 201, struct nvc_param_isp)
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#define NVC_IOCTL_FUSE_ID _IOWR('o', 202, struct nvc_fuseid)
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#define NVC_IOCTL_SET_EEPROM_DATA _IOWR('o', 254, __u8 *)
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#define NVC_IOCTL_GET_EEPROM_DATA _IOWR('o', 255, __u8 *)
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/* Expected higher level power calls are:
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* 1 = OFF
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* 2 = STANDBY
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* 3 = ON
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* These will be multiplied by 2 before given to the driver's PM code that
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* uses the _PWR_ defines. This allows us to insert defines to give more power
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* granularity and still remain linear with regards to the power usage and
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* full power state transition latency for easy implementation of PM
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* algorithms.
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* The PM actions:
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* _PWR_ERR = Non-valid state.
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* _PWR_OFF_FORCE = _PWR_OFF is forced regardless of standby mechanisms.
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* _PWR_OFF = Device, regulators, clocks, etc is turned off. The longest
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* transition time to _PWR_ON is from this state.
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* _PWR_STDBY_OFF = Device is useless but powered. No communication possible.
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* Device does not retain programming. Main purpose is for
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* faster return to _PWR_ON without regulator delays.
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* _PWR_STDBY = Device is in standby. Device retains programming.
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* _PWR_COMM = Device is powered enough to communicate with the device.
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* _PWR_ON = Device is at full power with active output.
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*
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* The kernel drivers treat these calls as Guaranteed Level Of Service.
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*/
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#define NVC_PWR_ERR 0
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#define NVC_PWR_OFF_FORCE 1
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#define NVC_PWR_OFF 2
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#define NVC_PWR_STDBY_OFF 3
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#define NVC_PWR_STDBY 4
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#define NVC_PWR_COMM 5
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#define NVC_PWR_ON 6
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struct nvc_fuseid {
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__u32 size;
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__u8 data[16];
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};
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#endif /* __UAPI_NVC_H__ */
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