131 lines
6.6 KiB
C
131 lines
6.6 KiB
C
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/*
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* tegra210_mixer_alt.h - Definitions for Tegra210 MIXER driver
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*
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* Copyright (c) 2015-2019, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHIN
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __TEGRA210_MIXER_ALT_H__
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#define __TEGRA210_MIXER_ALT_H__
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#define TEGRA210_MIXER_AXBAR_RX_STRIDE 0x40
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#define TEGRA210_MIXER_AXBAR_RX_MAX 10
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#define TEGRA210_MIXER_AXBAR_RX_LIMIT (TEGRA210_MIXER_AXBAR_RX_MAX * TEGRA210_MIXER_AXBAR_RX_STRIDE)
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/* AXBAR_RX related MIXER offsets */
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#define TEGRA210_MIXER_AXBAR_RX1_SOFT_RESET 0x04
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#define TEGRA210_MIXER_AXBAR_RX1_STATUS 0x10
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#define TEGRA210_MIXER_AXBAR_RX1_CIF_CTRL 0x24
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#define TEGRA210_MIXER_AXBAR_RX1_CTRL 0x28
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#define TEGRA210_MIXER_AXBAR_RX1_PEAK_CTRL 0x2c
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#define TEGRA210_MIXER_AXBAR_RX1_SAMPLE_COUNT 0x30
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#define TEGRA210_MIXER_AXBAR_RX1_CYA 0x34
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#define TEGRA210_MIXER_AXBAR_RX1_DBG0 0x38
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#define TEGRA210_MIXER_AXBAR_RX1_DBG1 0x3c
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#define TEGRA210_MIXER_AXBAR_TX_STRIDE 0x40
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#define TEGRA210_MIXER_AXBAR_TX_MAX 5
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#define TEGRA210_MIXER_AXBAR_TX_LIMIT (TEGRA210_MIXER_AXBAR_RX_LIMIT + (TEGRA210_MIXER_AXBAR_TX_MAX * TEGRA210_MIXER_AXBAR_TX_STRIDE))
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/* AXBAR_TX related MIXER offsets */
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#define TEGRA210_MIXER_AXBAR_TX1_ENABLE 0x280
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#define TEGRA210_MIXER_AXBAR_TX1_SOFT_RESET 0x284
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#define TEGRA210_MIXER_AXBAR_TX1_STATUS 0x290
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#define TEGRA210_MIXER_AXBAR_TX1_INT_STATUS 0x294
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#define TEGRA210_MIXER_AXBAR_TX1_INT_MASK 0x298
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#define TEGRA210_MIXER_AXBAR_TX1_INT_SET 0x29c
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#define TEGRA210_MIXER_AXBAR_TX1_INT_CLEAR 0x2a0
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#define TEGRA210_MIXER_AXBAR_TX1_CIF_CTRL 0x2a4
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#define TEGRA210_MIXER_AXBAR_TX1_ADDER_CONFIG 0x2a8
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#define TEGRA210_MIXER_AXBAR_TX1_CYA 0x2ac
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#define TEGRA210_MIXER_AXBAR_TX1_DBG0 0x2b0
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#define TEGRA210_MIXER_AXBAR_TX1_DBG1 0x2b4
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/* MIXER related offsets */
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#define TEGRA210_MIXER_ENABLE 0x400
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#define TEGRA210_MIXER_SOFT_RESET 0x404
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#define TEGRA210_MIXER_CG 0x408
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#define TEGRA210_MIXER_STATUS 0x410
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#define TEGRA210_MIXER_INT_STATUS 0x414
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL 0x42c
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_DATA 0x430
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#define TEGRA210_MIXER_AHUBRAMCTL_PEAKM_RAM_CTRL 0x434
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#define TEGRA210_MIXER_AHUBRAMCTL_PEAKM_RAM_DATA 0x438
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#define TEGRA210_MIXER_CTRL 0x43c
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#define TEGRA210_MIXER_CYA 0x440
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#define TEGRA210_MIXER_DBG 0x448
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#define TEGRA210_MIXER_AXBAR_TX_ENABLE_SHIFT 0
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#define TEGRA210_MIXER_AXBAR_TX_EN (1 << TEGRA210_MIXER_AXBAR_TX_ENABLE_SHIFT)
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/* TODO Add fields for MIXER_AXBAR_TX1_ADDER_CONFIG register */
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#define TEGRA210_MIXER_AXBAR_TX2_ADDER_CONFIG (TEGRA210_MIXER_AXBAR_TX1_ADDER_CONFIG + TEGRA210_MIXER_AXBAR_TX_STRIDE)
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#define TEGRA210_MIXER_AXBAR_TX3_ADDER_CONFIG (TEGRA210_MIXER_AXBAR_TX2_ADDER_CONFIG + TEGRA210_MIXER_AXBAR_TX_STRIDE)
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#define TEGRA210_MIXER_AXBAR_TX4_ADDER_CONFIG (TEGRA210_MIXER_AXBAR_TX3_ADDER_CONFIG + TEGRA210_MIXER_AXBAR_TX_STRIDE)
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#define TEGRA210_MIXER_AXBAR_TX5_ADDER_CONFIG (TEGRA210_MIXER_AXBAR_TX4_ADDER_CONFIG + TEGRA210_MIXER_AXBAR_TX_STRIDE)
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#define TEGRA210_MIXER_AXBAR_TX2_ENABLE (TEGRA210_MIXER_AXBAR_TX1_ENABLE + TEGRA210_MIXER_AXBAR_TX_STRIDE)
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#define TEGRA210_MIXER_AXBAR_TX3_ENABLE (TEGRA210_MIXER_AXBAR_TX2_ENABLE + TEGRA210_MIXER_AXBAR_TX_STRIDE)
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#define TEGRA210_MIXER_AXBAR_TX4_ENABLE (TEGRA210_MIXER_AXBAR_TX3_ENABLE + TEGRA210_MIXER_AXBAR_TX_STRIDE)
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#define TEGRA210_MIXER_AXBAR_TX5_ENABLE (TEGRA210_MIXER_AXBAR_TX4_ENABLE + TEGRA210_MIXER_AXBAR_TX_STRIDE)
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/* Fields in TEGRA210_MIXER_ENABLE */
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#define TEGRA210_MIXER_ENABLE_SHIFT 0
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#define TEGRA210_MIXER_ENABLE_MASK (1 << TEGRA210_MIXER_ENABLE_SHIFT)
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#define TEGRA210_MIXER_EN (1 << TEGRA210_MIXER_ENABLE_SHIFT)
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/* Fields in TEGRA210_MIXER_CTRL */
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#define TEGRA210_MIXER_CTRL_ENABLE_BYPASS_MODE 1
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#define TEGRA210_MIXER_CTRL_DISABLE_BYPASS_MODE 0
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/* Fields in TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL */
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_ADDR_0 0x0
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_ADDR_STRIDE 0x10
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_READ_BUSY_SHIFT 31
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_READ_BUSY_MASK (1 << TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_READ_BUSY_SHIFT)
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_READ_BUSY (1 << TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_READ_BUSY_SHIFT)
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_SEQ_READ_COUNT_SHIFT 16
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_SEQ_READ_COUNT_MASK (0xff << TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_SEQ_READ_COUNT_SHIFT)
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_RW_SHIFT 14
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_RW_MASK (1 << TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_RW_SHIFT)
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_RW_WRITE (1 << TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_RW_SHIFT)
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_ADDR_INIT_EN_SHIFT 13
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_ADDR_INIT_EN_MASK (1 << TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_ADDR_INIT_EN_SHIFT)
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_ADDR_INIT_EN (1 << TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_ADDR_INIT_EN_SHIFT)
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_SEQ_ACCESS_EN_SHIFT 12
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_SEQ_ACCESS_EN_MASK (1 << TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_SEQ_ACCESS_EN_SHIFT)
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_SEQ_ACCESS_EN (1 << TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_SEQ_ACCESS_EN_SHIFT)
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_RAM_ADDR_SHIFT 0
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#define TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_RAM_ADDR_MASK (0x1ff << TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_RAM_ADDR_SHIFT)
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#define TEGRA210_MIXER_TOTAL_PATH (TEGRA210_MIXER_AXBAR_RX_MAX + \
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TEGRA210_MIXER_AXBAR_TX_MAX)
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struct tegra210_mixer {
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struct regmap *regmap;
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int gain_coeff[14];
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int gain_value[TEGRA210_MIXER_AXBAR_RX_MAX];
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unsigned int channels_via_control[TEGRA210_MIXER_TOTAL_PATH];
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};
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#endif
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