/*
 * Copyright (c) 2016-2020, NVIDIA CORPORATION.  All rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under the terms and conditions of the GNU General Public License,
 * version 2, as published by the Free Software Foundation.
 *
 * This program is distributed in the hope it will be useful, but WITHOUT
 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
 * more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program.  If not, see <http://www.gnu.org/licenses/>.
 */


#ifndef DT_BINDINGS_MEMORY_TEGRA114_MC_H
#define DT_BINDINGS_MEMORY_TEGRA114_MC_H

#define TEGRA_SWGROUP_PTC	0
#define TEGRA_SWGROUP_DC	1
#define TEGRA_SWGROUP_DCB	2
#define TEGRA_SWGROUP_EPP	3
#define TEGRA_SWGROUP_G2	4
#define TEGRA_SWGROUP_AVPC	5
#define TEGRA_SWGROUP_NV	6
#define TEGRA_SWGROUP_HDA	7
#define TEGRA_SWGROUP_HC	8
#define TEGRA_SWGROUP_MSENC	9
#define TEGRA_SWGROUP_PPCS	10
#define TEGRA_SWGROUP_VDE	11
#define TEGRA_SWGROUP_MPCORELP	12
#define TEGRA_SWGROUP_MPCORE	13
#define TEGRA_SWGROUP_VI	14
#define TEGRA_SWGROUP_ISP	15
#define TEGRA_SWGROUP_XUSB_HOST	16
#define TEGRA_SWGROUP_XUSB_DEV	17
#define TEGRA_SWGROUP_EMUCIF	18
#define TEGRA_SWGROUP_TSEC	19

#endif