Device tree binding for NVIDIA Tegra XUSB host mode controller (XHCI) ============================ The Tegra xHCI controller complies to xHCI specifications which supports both USB 2.0 HighSpeed/FullSpeed/LowSpeed and USB 3.0 SuperSpeed protocols. Required properties: -------------------- - compatible: For Tegra124, must be "nvidia,tegra124-xusb". For Tegra186, must be "nvidia,tegra186-xhci". For Tegra194, must be "nvidia,tegra194-xhci". For Tegra210, must be "nvidia,tegra210-xhci". For Tegra210b01, must be "nvidia,tegra210b01-xhci". - reg: For Tegra124, Tegra210 and Tegra210b01, must contain the base and length of the xHCI host registers, XUSB FPCI registers and XUSB IPFS registers. For Tegra186 and Tegra194, must contain the base and length of the xHCI host registers, XUSB FPCI registers. - interrupts: Must contain the xHCI host interrupt, the mailbox interrupt and the padctl interrupt. - interrupt-parent: For Tegra186 and Tegra194, must be the parent's entry of the xHCI interrupt, the mailbox interrupt and the padctl interrupt. - clocks: Must contain an entry for each entry in clock-names. See ../clock/clock-bindings.txt for details. - clock-names: Must include the following entries: - xusb_host - xusb_falcon_src - xusb_ss - xusb_ss_src - xusb_hs_src - xusb_fs_src - pll_u_480m - clk_m - pll_e - iommus: phandle and IOMMU specifier for the IOMMU that serves the XUSB host. See ../iommu/iommu.txt for details. Required properties for Tegra xhci: --------------------------------- - nvidia,xusb-padctl: phandle to the XUSB pad controller that is used to configure the USB pads used by the XHCI controller. - phys: Must contain an entry for each entry in phy-names. See ../phy/phy-bindings.txt for details. - phy-names: Must contain an entry for each PHY used by the controller. Names must be of the form -, where is "usb2" or "usb3". and is a 0-based index. The following PHYs are available: - Tegra124: usb2-0, usb2-1, usb2-2, usb2-3, hsic-0, hsic-1, usb3-0, usb3-1 - Tegra186: usb2-0, usb2-1, usb2-2, hsic-0, usb3-0, usb3-1, usb3-2 - Tegra194: usb2-0, usb2-1, usb2-2, usb2-3, usb3-0, usb3-1, usb3-2, usb3-3 - Tegra210: usb2-0, usb2-1, usb2-2, usb2-3, hsic-0, usb3-0, usb3-1, usb3-2, usb3-3 - Tegra210b01: usb2-0, usb2-1, usb2-2, usb2-3, hsic-0, usb3-0, usb3-1, usb3-2, usb3-3 For Tegra124: - avddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V. - dvddio-pex-supply: PCIe/USB3 digital logic power supply. Must supply 1.05 V. - avdd-usb-supply: USB controller power supply. Must supply 3.3 V. - avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V. - avdd-pll-erefe-supply: PLLE reference PLL power supply. Must supply 1.05 V. - avdd-usb-ss-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V. - hvdd-usb-ss-supply: High-voltage PCIe/USB3 power supply. Must supply 3.3 V. - hvdd-usb-ss-pll-e-supply: High-voltage PLLE power supply. Must supply 3.3 V. For Tegra210: - hvdd_usb-supply: PEX USB 3.0 pads power supply. Must supply 1.8 V. - avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V. - vddio_hsic-supply: HSIC regulator supply for HSIC rail. Must supply 1.8 V. - avddio-usb-supply: USB 2.0 pads power supply. Must supply 3.3 V. - dvdd_sata-supply: SATA digital logic power supply. Must supply 1.05 V. - avddio-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.05 V. For Tegra210b01: - hvdd_usb-supply: PEX USB 3.0 pads power supply. Must supply 1.8 V. - avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V. - avddio-usb-supply: USB 2.0 pads power supply. Must supply 3.3 V. - avddio-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.05 V. Optional properties: -------------------- - extcon-cables: OTG support. Must contains an excon-cable entry which detects USB ID pin. See ../extcon/extcon-gpio-states.txt for details. When the extcon cable state is 1, OTG port will transition to host mode. - extcon-cable-names: Must be "id". - nvidia,boost_cpu_freq: Specifies the value to which CPU frequency is boosted. This is only the minimum frequency; DVFS can scale up CPU frequency further based on need and CPU loading. CPU boost frequency through PMQOS is enabled for the xHCI controller only when this field’s value is greater than zero. The boost is applicable only for bulk and ISOC transfers; other endpoints do not need to be boosted. Example : Before boosting on Quill-prod: Output of "cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq" 345600 2419200 2419200 345600 345600 345600 After boosting on QUill-prod: (nvidia,boost_cpu_freq = <800>) Output of "cat /sys/devices/system/cpu/cpu*/cpufreq/scaling_cur_freq" 806400 2419200 2419200 806400 806400 806400 - nvidia,boost_cpu_trigger: Minimum buffer length of the bulk or isoc transfers beyond which we boost frequency. This field is applicable only if "nvidia,boost_cpu_freq" > 0. This field should be > 16384(16KB), else driver will use default 16384. - nvidia,boost_emc_freq: Set the value which EMC frequency will be requested. XHCI controller will request EMC bandwidth through BWMGR for Bulk and Isoc transfers. For Tegra210 and Tegra210b01: - nvidia,pmc-wakeup: The PMC is the only device that can wake up the system from deep sleep mode (i.e. LP0). There are some wake up events in the PMC wake mask register that can be used to trigger PMC to wake up the system. The PMC wake mask register defines which devices or siganls can be the source to trigger the PMC waking up. If the devices support waking up the system from deep sleep mode, then it needs to describe a property for PMC wake up events. This property defines the usage. The entries should be of the form pmc_phandle: the phandle of PMC device tree node event_type: 0 = PMC_WAKE_TYPE_GPIO 1 = PMC_WAKE_TYPE_EVENT event_offset: the offset of PMC wake mask register trigger_type: set 0 when event_type is PMC_WAKE_TYPE_GPIO if event_type is PMC_WAKE_TYPE_EVENT 0 = PMC_TRIGGER_TYPE_NONE 1 = PMC_TRIGGER_TYPE_RISING 2 = PMC_TRIGGER_TYPE_FALLING 4 = PMC_TRIGGER_TYPE_HIGH 8 = PMC_TRIGGER_TYPE_LOW The assignments of event_type and trigger_type can be found in header file . Example: -------- xhci@3530000 { compatible = "nvidia,tegra186-xhci"; reg = <0x0 0x03530000 0x0 0x8000>, <0x0 0x03538000 0x0 0x1000>; interrupts = <0 163 0x4>, <0 164 0x4>, <0 167 0x4>; interrupt-parent = <&pm_irq>; clocks = <&tegra_car TEGRA186_CLK_XUSB_HOST>, <&tegra_car TEGRA186_CLK_XUSB_FALCON>, <&tegra_car TEGRA186_CLK_XUSB_SS>, <&tegra_car TEGRA186_CLK_XUSB_CORE_SS>, <&tegra_car TEGRA186_CLK_CLK_M>, <&tegra_car TEGRA186_CLK_XUSB_FS>, <&tegra_car TEGRA186_CLK_PLLU>, <&tegra_car TEGRA186_CLK_CLK_M>, <&tegra_car TEGRA186_CLK_PLLE>; clock-names = "xusb_host", "xusb_falcon_src", "xusb_ss", "xusb_ss_src", "xusb_hs_src", "xusb_fs_src", "pll_u_480m", "clk_m", "pll_e"; iommus = <&smmu TEGRA_SID_XUSB_HOST>; iommu_sodev_map; nvidia,xusb-padctl = <&xusb_padctl>; phys = <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-0}>, /* USB 2.0 micro-AB, J20 */ <&{/xusb_padctl@3520000/pads/usb2/lanes/usb2-1}>, /* USB 3.0 STD-A, J19 */ <&{/xusb_padctl@3520000/pads/usb3/lanes/usb3-1}>; /* USB 3.0 STD-A, J19 */ phy-names = "usb2-0", "usb2-1", "usb3-1"; extcon-cables = <&vbus_id_extcon 1>; extcon-cable-names = "id"; #extcon-cells = <1>; nvidia,boost_cpu_freq = <800>; nvidia,boost_cpu_trigger = <18432>; };