300 lines
10 KiB
Plaintext
300 lines
10 KiB
Plaintext
/*
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* arch/arm/boot/dts/panel-s-wuxga-7-0.dtsi
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*
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* Copyright (c) 2015-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*/
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#include <dt-bindings/display/tegra-dc.h>
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#include <dt-bindings/display/tegra-panel.h>
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/ {
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host1x {
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dsi {
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panel_s_wuxga_7_0: panel-s-wuxga-7-0 {
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status = "disabled";
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compatible = "s,wuxga-7-0";
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nvidia,dsi-instance = <DSI_INSTANCE_0>;
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nvidia,dsi-n-data-lanes = <8>;
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nvidia,dsi-pixel-format = <TEGRA_DSI_PIXEL_FORMAT_24BIT_P>;
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nvidia,dsi-refresh-rate = <60>;
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nvidia,dsi-video-data-type = <TEGRA_DSI_VIDEO_TYPE_VIDEO_MODE>;
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nvidia,dsi-video-clock-mode = <TEGRA_DSI_VIDEO_CLOCK_CONTINUOUS>;
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nvidia,dsi-video-burst-mode = <TEGRA_DSI_VIDEO_NONE_BURST_MODE>;
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nvidia,dsi-ganged-type = <TEGRA_DSI_GANGED_SYMMETRIC_LEFT_RIGHT_OVERLAP>;
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nvidia,dsi-ganged-overlap = <2>;
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nvidia,dsi-ganged-swap-links = <1>;
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nvidia,dsi-ganged-write-to-all-links = <1>;
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nvidia,dsi-controller-vs = <DSI_VS_1>;
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nvidia,dsi-virtual-channel = <TEGRA_DSI_VIRTUAL_CHANNEL_0>;
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nvidia,dsi-panel-reset = <TEGRA_DSI_ENABLE>;
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nvidia,dsi-ulpm-not-support = <TEGRA_DSI_ENABLE>;
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nvidia,dsi-suspend-stop-stream-late = <TEGRA_DSI_ENABLE>;
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nvidia,dsi-power-saving-suspend = <TEGRA_DSI_ENABLE>;
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nvidia,dsi-init-cmd =
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/* Long Packet: <PACKETTYPE[u8] COMMANDID[u8] PAYLOADCOUNT[u16] ECC[u8] PAYLOAD[..] CHECKSUM[u16]> */
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/* Short Packet: <PACKETTYPE[u8] COMMANDID[u8] DATA0[u8] DATA1[u8] ECC[u8]> */
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/* For DSI packets each DT cell is interpreted as u8 not u32 */
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<TEGRA_DSI_PACKET_CMD DSI_DCS_WRITE_0_PARAM DSI_DCS_EXIT_SLEEP_MODE 0x0 0x0>,
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/* This panel has a very sensitive power on/off sequence.
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* Send a few more frames for safety. No max limit from vendor. */
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<TEGRA_DSI_SEND_FRAME 10>,
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<TEGRA_DSI_PACKET_CMD DSI_DCS_WRITE_0_PARAM DSI_DCS_SET_DISPLAY_ON 0x0 0x0>;
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nvidia,dsi-n-init-cmd = <3>;
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nvidia,dsi-suspend-cmd =
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<TEGRA_DSI_PACKET_CMD DSI_DCS_WRITE_0_PARAM DSI_DCS_SET_DISPLAY_OFF 0x0 0x0>,
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<TEGRA_DSI_SEND_FRAME 3>,
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<TEGRA_DSI_PACKET_CMD DSI_DCS_WRITE_0_PARAM DSI_DCS_ENTER_SLEEP_MODE 0x0 0x0>,
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<TEGRA_DSI_SEND_FRAME 10>;
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nvidia,dsi-n-suspend-cmd = <4>;
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nvidia,dsi-pkt-seq =
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<CMD_VS LEN_SHORT PKT_LP LINE_STOP>,
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<CMD_HS LEN_SHORT PKT_LP LINE_STOP>,
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<CMD_HS LEN_SHORT PKT_LP LINE_STOP>,
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<CMD_HS LEN_SHORT CMD_RGB_24BPP LEN_HACTIVE3 CMD_BLNK LEN_HFP LINE_STOP>,
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<CMD_HS LEN_SHORT PKT_LP LINE_STOP>,
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<CMD_HS LEN_SHORT CMD_RGB_24BPP LEN_HACTIVE3 CMD_BLNK LEN_HFP LINE_STOP>;
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disp-default-out {
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nvidia,out-type = <TEGRA_DC_OUT_DSI>;
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nvidia,out-width = <107>;
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nvidia,out-height = <172>;
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nvidia,out-flags = <TEGRA_DC_OUT_CONTINUOUS_MODE>;
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nvidia,out-parent-clk = "pll_d_out0";
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nvidia,out-xres = <1200>;
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nvidia,out-yres = <1920>;
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};
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display-timings {
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1200x1920-32-60Hz {
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clock-frequency = <193224000>;
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hactive = <1200>;
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vactive = <1920>;
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hfront-porch = <107>;
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hback-porch = <20>;
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hsync-len = <1>;
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vfront-porch = <497>;
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vback-porch = <7>;
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vsync-len = <1>;
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nvidia,h-ref-to-sync = <1>;
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nvidia,v-ref-to-sync = <11>;
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};
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};
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smartdimmer {
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status = "okay";
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nvidia,use-auto-pwm = <0>;
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nvidia,hw-update-delay = <0>;
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nvidia,bin-width = <0xffffffff>;
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nvidia,aggressiveness = <5>;
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nvidia,use-vid-luma = <0>;
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nvidia,phase-in-settings = <0>;
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nvidia,phase-in-adjustments = <0>;
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nvidia,k-limit-enable = <1>;
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nvidia,k-limit = <200>;
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nvidia,sd-window-enable = <0>;
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nvidia,soft-clipping-enable= <1>;
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nvidia,soft-clipping-threshold = <128>;
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nvidia,smooth-k-enable = <1>;
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nvidia,smooth-k-incr = <4>;
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nvidia,coeff = <5 9 2>;
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nvidia,fc = <0 0>;
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nvidia,blp = <1024 255>;
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nvidia,bltf = <57 65 73 82
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92 103 114 125
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138 150 164 178
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193 208 224 241>;
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nvidia,lut = <255 255 255
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199 199 199
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153 153 153
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116 116 116
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85 85 85
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59 59 59
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36 36 36
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17 17 17
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0 0 0>;
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nvidia,use-vpulse2 = <1>;
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nvidia,bl-device-name = "pwm-backlight";
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};
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cmu {
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nvidia,cmu-csc = < 0x100 0x0 0x0
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0x0 0x100 0x0
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0x0 0x0 0x100 >;
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nvidia,cmu-lut2 = < 0 1 2 2 3 4 5 6
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6 7 8 9 10 10 11 12
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253 253 254 254 254 254 255 255 >;
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};
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};
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};
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};
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backlight {
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panel_s_wuxga_7_0_bl: panel-s-wuxga-7-0-bl {
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status = "disabled";
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compatible = "s,wuxga-7-0-bl";
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pwms = <&tegra_pwm 1 40161>;
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max-brightness = <255>;
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default-brightness = <191>;
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default-charge-brightness = <112>;
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bl-measured = < 0 1 2 4 5 6 7 8
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252 252 253 253 254 254 255 255 >;
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};
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};
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};
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