tegrakernel/kernel/nvidia/Documentation/devicetree/bindings/pinctrl/nvidia,tegra186-dpaux-pinct...

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Device tree binding for NVIDIA Tegra186 DPAUX PINCTL
====================================================
The Tegra186 DPAUX PINCTL driver manages the DPAUX muxing
This document defines the device-specific binding for chips after
Tegra186 DPAUX PINCTL driver.
This driver models dpaux pins to be muxed as either for I2C or DISPLAY.
Refer to pinctrl-bindings.txt in this directory for generic information about
pin controller device tree bindings.
Required properties:
--------------------
- compatible: Must be "nvidia,tegra186-dpaux-padctl" or
"nvidia,tegra186-dpaux1-padctl" or
"nvidia,tegra194-dpaux-padctl" or
"nvidia,tegra194-dpaux1-padctl" or
"nvidia,tegra194-dpaux2-padctl" or
"nvidia,tegra194-dpaux3-padctl".
The pinmux configuration are applied statically at boot time.
These configurations are defined as the child of the pinctrl state node.
Each sub-node have following properties:
Required properties:
------------------
- pins: List of pins. Valid values of pins properties for:
t186: dpaux1-1, dpaux-0.
t194: dpaux1-1, dpaux-0, dpaux2-2, dpaux3-3.
- functions: List of functions: Valid values for function properties:
t186: i2c, display.
t194: i2c, display.
Examples:
========
Board file extract:
-------------------
# DPAUX1 muxed to I2C mode
i2c@3190000 {
pinctrl-names = "default";
pinctrl-0 = <&dpaux_default>;
};
host1x {
...
dpaux@15040000 {
...
compatible = "nvidia,tegra186-dpaux1-padctl";
dpaux_default: pinmux@0 {
dpaux1_pins {
pins = "dpaux1-1";
function = "i2c";
};
};
...
};
# DPAUX0 muxed to I2C mode
i2c@31b0000 {
pinctrl-names = "default";
pinctrl-0 = <&dpaux0_default>;
};
host1x {
...
dpaux@155c0000 {
...
compatible = "nvidia,tegra186-dpaux-padctl";
dpaux0_default: pinmux@0 {
dpaux0_pins {
pins = "dpaux-0";
function = "i2c";
};
};
...
};