547 lines
12 KiB
C
547 lines
12 KiB
C
/*
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* drivers/i2c/busses/i2c-ivc-single.c
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*
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* Copyright (C) 2017 NVIDIA Corporation. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#include "i2c-ivc-single.h"
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#include <linux/debugfs.h>
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#include <linux/i2c.h>
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#include <linux/module.h>
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#include <linux/mutex.h>
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#include <soc/tegra/tegra-ivc-rpc.h>
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#include "soc/tegra/camrtc-i2c-common.h"
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#include "i2c-rtcpu-common.h"
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/*
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* I2C IVC Single driver internal data structure
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*/
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#define MAX_DEVS 4
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#define I2C_CAMRTC_RPC_IVC_SINGLE_TIMEOUT_MS 250
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struct tegra_i2c_ivc_single_dev {
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/* IVC RPC */
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struct tegra_ivc_channel *chan;
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struct mutex inuse;
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bool is_added;
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bool is_online;
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/* I2C device behind this IVC */
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u32 bus_id;
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u32 reg_base;
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u32 bus_clk_rate;
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/* statistics */
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struct {
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unsigned int xfer_requests;
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unsigned int total_bytes;
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unsigned int reads, read_bytes;
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unsigned int writes, write_bytes;
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unsigned int errors;
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} stat;
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/* RPC call for I2C_REQUEST_SINGLE */
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struct tegra_ivc_rpc_call_param rpc_i2c_req;
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u8 rpc_i2c_req_buf[CAMRTC_I2C_REQUEST_MAX_LEN];
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struct camrtc_rpc_i2c_response rpc_i2c_rsp;
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};
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static DEFINE_MUTEX(g_i2c_ivc_lock);
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static struct tegra_i2c_ivc_single_dev *g_i2c_ivc_devs[MAX_DEVS];
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u32 tegra_i2c_get_clk_freq(struct device_node *np)
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{
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int ret;
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u32 bus_clk_rate;
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ret = of_property_read_u32(np, "clock-frequency",
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&bus_clk_rate);
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if (ret)
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bus_clk_rate = 100000; /* default clock rate */
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return bus_clk_rate;
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}
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EXPORT_SYMBOL(tegra_i2c_get_clk_freq);
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u32 tegra_i2c_get_reg_base(struct device_node *np)
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{
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int ret;
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u32 reg_base;
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ret = of_property_read_u32_index(np, "reg", 1, ®_base);
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BUG_ON(ret < 0);
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return reg_base;
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}
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EXPORT_SYMBOL(tegra_i2c_get_reg_base);
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/*
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* I2C interface
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*/
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static struct tegra_i2c_ivc_single_dev *tegra_i2c_ivc_get_dev(u32 reg_base)
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{
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size_t i;
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struct tegra_i2c_ivc_single_dev *sdev = NULL;
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mutex_lock(&g_i2c_ivc_lock);
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/* Find an IVC channel corresponding to base */
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for (i = 0; i < ARRAY_SIZE(g_i2c_ivc_devs); ++i) {
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if (!g_i2c_ivc_devs[i])
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continue;
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if (g_i2c_ivc_devs[i]->reg_base == reg_base) {
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sdev = g_i2c_ivc_devs[i];
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mutex_lock(&sdev->inuse);
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break;
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}
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}
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mutex_unlock(&g_i2c_ivc_lock);
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return sdev;
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}
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static void tegra_i2c_ivc_put_dev(struct tegra_i2c_ivc_single_dev *sdev)
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{
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if (sdev)
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mutex_unlock(&sdev->inuse);
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}
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static int tegra_i2c_ivc_register(struct tegra_i2c_ivc_single_dev *sdev)
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{
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size_t i;
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int ret = -EBUSY;
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mutex_lock(&g_i2c_ivc_lock);
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for (i = 0; i < ARRAY_SIZE(g_i2c_ivc_devs); ++i) {
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if (!g_i2c_ivc_devs[i]) {
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g_i2c_ivc_devs[i] = sdev;
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ret = 0;
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break;
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}
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}
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mutex_unlock(&g_i2c_ivc_lock);
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return ret;
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}
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static void tegra_i2c_ivc_unregister(struct tegra_i2c_ivc_single_dev *sdev)
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{
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size_t i;
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mutex_lock(&g_i2c_ivc_lock);
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for (i = 0; i < ARRAY_SIZE(g_i2c_ivc_devs); ++i) {
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if (g_i2c_ivc_devs[i] == sdev) {
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g_i2c_ivc_devs[i] = NULL;
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break;
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}
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}
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mutex_unlock(&g_i2c_ivc_lock);
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}
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static int tegra_i2c_ivc_add_single(struct tegra_ivc_channel *chan);
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static int tegra_i2c_ivc_do_single_xfer(
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struct tegra_i2c_ivc_single_dev *i2c_ivc_dev,
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const struct i2c_msg *reqs, int num)
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{
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u8 *pbuf = NULL, *pprev_len = NULL;
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const struct i2c_msg *preq, *preq_end;
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int ret = 0, len = 0;
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u8 *read_ptr = NULL;
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int read_len = 0;
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if (num == 0)
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return 0;
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++i2c_ivc_dev->stat.xfer_requests;
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/* First byte is bus ID */
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pbuf = i2c_ivc_dev->rpc_i2c_req_buf + 1;
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len = 1;
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preq = reqs;
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preq_end = reqs + num;
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for (;;) {
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bool is_read = (preq->flags & I2C_M_RD);
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u32 bytes = 0;
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if ((preq == preq_end) || (is_read && read_ptr != NULL) ||
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((len + 4 + preq->len) > CAMRTC_I2C_REQUEST_MAX_LEN)) {
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struct camrtc_rpc_i2c_response *rpc_rsp;
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rpc_rsp = &i2c_ivc_dev->rpc_i2c_rsp;
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i2c_ivc_dev->rpc_i2c_req.request_len = len;
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i2c_ivc_dev->rpc_i2c_req.callback = NULL;
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i2c_ivc_dev->rpc_i2c_req.callback_param =
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&i2c_ivc_dev->chan->dev;
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ret = tegra_ivc_rpc_call(i2c_ivc_dev->chan,
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&i2c_ivc_dev->rpc_i2c_req);
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if (ret < 0) {
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++i2c_ivc_dev->stat.errors;
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dev_err(&i2c_ivc_dev->chan->dev,
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"I2C transaction to 0x%x failed: %d\n",
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reqs[0].addr, ret);
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return -EIO;
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}
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if (rpc_rsp->result != 0) {
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dev_err(&i2c_ivc_dev->chan->dev,
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"I2C transaction response at addr 0x%x failed: %d\n",
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reqs[0].addr, rpc_rsp->result);
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return -EIO;
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}
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if (read_ptr) {
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memcpy(read_ptr, rpc_rsp->read_data, read_len);
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read_ptr = NULL;
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}
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if (preq == preq_end)
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return num;
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pbuf = i2c_ivc_dev->rpc_i2c_req_buf + 1;
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len = 1;
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}
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if (!is_read) {
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pbuf[0] = 0;
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++i2c_ivc_dev->stat.writes;
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i2c_ivc_dev->stat.write_bytes += preq->len;
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} else {
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read_ptr = preq->buf;
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read_len = preq->len;
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pbuf[0] = CAMRTC_I2C_REQUEST_FLAG_READ;
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++i2c_ivc_dev->stat.reads;
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i2c_ivc_dev->stat.read_bytes += preq->len;
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}
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if ((preq->flags & I2C_M_NOSTART) == 0) {
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pbuf[1] = preq->addr & 0xff;
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if (WARN_ON(preq->flags & I2C_M_TEN)) {
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/* This is not yet implemented */
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pbuf[0] |= CAMRTC_I2C_REQUEST_FLAG_TEN;
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pbuf[2] = (preq->addr >> 8) & 0xff;
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bytes = 2;
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} else {
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pbuf[2] = 0;
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bytes = 1;
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}
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} else {
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pbuf[0] |= CAMRTC_I2C_REQUEST_FLAG_NOSTART;
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/* slave address is don't care */
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pbuf[1] = 0;
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pbuf[2] = 0;
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}
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i2c_ivc_dev->stat.total_bytes += bytes + preq->len;
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pbuf[3] = preq->len;
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pprev_len = pbuf + 3;
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pbuf += 4;
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len += 4;
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if (is_read) {
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preq++;
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continue;
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}
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memcpy(pbuf, preq->buf, preq->len);
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pbuf += preq->len;
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len += preq->len;
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++preq;
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/* Merge write requests with NOSTART */
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while (preq != preq_end && (preq->flags & I2C_M_NOSTART)) {
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u8 *psrc = preq->buf;
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if ((len + preq->len) > CAMRTC_I2C_REQUEST_MAX_LEN)
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break;
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memcpy(pbuf, psrc, preq->len);
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pbuf += preq->len;
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*pprev_len += preq->len;
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len += preq->len;
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i2c_ivc_dev->stat.write_bytes += preq->len;
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i2c_ivc_dev->stat.total_bytes += preq->len;
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++preq;
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}
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}
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}
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int tegra_i2c_ivc_single_xfer(u32 i2c_base,
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const struct i2c_msg *reqs, int num)
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{
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struct tegra_i2c_ivc_single_dev *i2c_ivc_dev;
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int ret = 0;
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i2c_ivc_dev = tegra_i2c_ivc_get_dev(i2c_base);
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if (i2c_ivc_dev == NULL)
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return -ENODEV;
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if (num <= 0)
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goto unlock;
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ret = tegra_ivc_channel_runtime_get(i2c_ivc_dev->chan);
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if (ret < 0)
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goto unlock;
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if (tegra_ivc_rpc_channel_is_suspended(i2c_ivc_dev->chan)) {
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ret = -EBUSY;
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goto error;
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}
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if (!i2c_ivc_dev->is_online) {
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ret = -ECONNRESET;
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goto error;
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}
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if (!i2c_ivc_dev->is_added) {
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ret = tegra_i2c_ivc_add_single(i2c_ivc_dev->chan);
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if (ret != 0) {
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dev_err(&i2c_ivc_dev->chan->dev,
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"I2C device not ready\n");
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ret = -EIO;
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goto error;
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}
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}
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ret = tegra_i2c_ivc_do_single_xfer(i2c_ivc_dev, reqs, num);
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error:
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tegra_ivc_channel_runtime_put(i2c_ivc_dev->chan);
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unlock:
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tegra_i2c_ivc_put_dev(i2c_ivc_dev);
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return ret;
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}
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EXPORT_SYMBOL(tegra_i2c_ivc_single_xfer);
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/*
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* IVC channel Debugfs
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*/
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#define DEFINE_SEQ_FOPS(_fops_, _show_) \
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static int _fops_ ## _open(struct inode *inode, struct file *file) \
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{ \
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return single_open(file, _show_, inode->i_private); \
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} \
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static const struct file_operations _fops_ = { \
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.open = _fops_ ## _open, \
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.read = seq_read, \
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.llseek = seq_lseek, \
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.release = single_release }
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static int tegra_i2c_ivc_single_stat_show(
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struct seq_file *file, void *data)
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{
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struct tegra_ivc_channel *chan = file->private;
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struct tegra_i2c_ivc_single_dev *i2c_ivc_dev =
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tegra_ivc_channel_get_drvdata(chan);
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seq_printf(file, "Xfer requests: %u\n",
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i2c_ivc_dev->stat.xfer_requests);
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seq_printf(file, "Total bytes: %u\n", i2c_ivc_dev->stat.total_bytes);
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seq_printf(file, "Read requests: %u\n", i2c_ivc_dev->stat.reads);
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seq_printf(file, "Read bytes: %u\n", i2c_ivc_dev->stat.read_bytes);
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seq_printf(file, "Write requests: %u\n", i2c_ivc_dev->stat.writes);
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seq_printf(file, "Write bytes: %u\n", i2c_ivc_dev->stat.write_bytes);
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seq_printf(file, "Errors: %u\n", i2c_ivc_dev->stat.errors);
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return 0;
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}
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DEFINE_SEQ_FOPS(tegra_i2c_ivc_debugfs_stats,
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tegra_i2c_ivc_single_stat_show);
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static void tegra_i2c_ivc_single_create_debugfs(
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struct tegra_ivc_channel *chan,
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struct dentry *debugfs_root)
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{
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debugfs_create_file("stats", S_IRUGO,
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debugfs_root, chan,
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&tegra_i2c_ivc_debugfs_stats);
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}
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/*
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* IVC channel driver interface
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*/
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static int tegra_i2c_ivc_add_single(struct tegra_ivc_channel *chan)
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{
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struct tegra_i2c_ivc_single_dev *i2c_ivc_dev =
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tegra_ivc_channel_get_drvdata(chan);
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struct camrtc_rpc_i2c_add_single rpc_add_single;
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u32 bus_id;
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int ret;
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if (i2c_ivc_dev->reg_base == 0) {
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dev_err(&chan->dev,
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"Invalid I2C device at 0x%08x\n",
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i2c_ivc_dev->reg_base);
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return -ENODEV;
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}
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rpc_add_single.reg_base = i2c_ivc_dev->reg_base;
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rpc_add_single.bus_clk_rate = i2c_ivc_dev->bus_clk_rate;
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/* Register an I2C device to CamRTC */
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ret = tegra_ivc_rpc_call_pl(chan,
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CAMRTC_RPC_REQ_I2C_ADD_SINGLE_DEV,
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sizeof(rpc_add_single), &rpc_add_single,
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TEGRA_IVC_RPC_RSP_RET_CODE,
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sizeof(bus_id), &bus_id,
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NULL, NULL, 0);
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if (ret < 0) {
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dev_err(&chan->dev,
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"Failed to register an I2C device at 0x%08x: %d\n",
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i2c_ivc_dev->reg_base, ret);
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return -EIO;
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}
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dev_info(&chan->dev,
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"Registered an I2C single device at 0x%08x to bus %d\n",
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i2c_ivc_dev->reg_base, bus_id);
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i2c_ivc_dev->bus_id = bus_id;
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i2c_ivc_dev->rpc_i2c_req_buf[0] = bus_id;
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i2c_ivc_dev->rpc_i2c_req.request_id =
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CAMRTC_RPC_REQ_I2C_REQUEST_SINGLE;
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i2c_ivc_dev->rpc_i2c_req.request = i2c_ivc_dev->rpc_i2c_req_buf;
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i2c_ivc_dev->rpc_i2c_req.response_id = CAMRTC_RPC_RSP_I2C_RESPONSE;
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i2c_ivc_dev->rpc_i2c_req.response_len =
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sizeof(i2c_ivc_dev->rpc_i2c_rsp);
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i2c_ivc_dev->rpc_i2c_req.response = &i2c_ivc_dev->rpc_i2c_rsp;
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i2c_ivc_dev->rpc_i2c_req.callback = NULL;
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i2c_ivc_dev->rpc_i2c_req.callback_param = &i2c_ivc_dev->chan->dev;
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i2c_ivc_dev->rpc_i2c_req.timeout_ms =
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I2C_CAMRTC_RPC_IVC_SINGLE_TIMEOUT_MS;
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i2c_ivc_dev->is_added = true;
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return 0;
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}
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static void tegra_i2c_ivc_single_ready(
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struct tegra_ivc_channel *chan, bool online)
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{
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struct tegra_i2c_ivc_single_dev *i2c_ivc_dev =
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tegra_ivc_channel_get_drvdata(chan);
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i2c_ivc_dev->is_online = online;
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if (!online)
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i2c_ivc_dev->is_added = false;
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}
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static struct tegra_ivc_rpc_ops tegra_ivc_rpc_user_ops = {
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.create_debugfs = tegra_i2c_ivc_single_create_debugfs,
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.ready = tegra_i2c_ivc_single_ready,
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};
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/* Platform device */
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static int tegra_ivc_rpc_i2c_single_probe(struct tegra_ivc_channel *chan)
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{
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int ret;
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struct tegra_i2c_ivc_single_dev *i2c_ivc_dev;
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struct device_node *i2c_node;
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u32 reg_base;
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/* Register IVC/RPC channel */
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ret = tegra_ivc_rpc_channel_probe(chan, &tegra_ivc_rpc_user_ops);
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if (ret < 0) {
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dev_err(&chan->dev, "Cannot start IVC/RPC interface");
|
|
return ret;
|
|
}
|
|
|
|
i2c_node = of_parse_phandle(chan->dev.of_node, "device", 0);
|
|
if (i2c_node == NULL) {
|
|
dev_err(&chan->dev, "Cannot get i2c device node");
|
|
ret = -ENODEV;
|
|
goto remove;
|
|
}
|
|
|
|
reg_base = tegra_i2c_get_reg_base(i2c_node);
|
|
if (reg_base == 0) {
|
|
ret = -ENODEV;
|
|
goto put;
|
|
}
|
|
|
|
i2c_ivc_dev = devm_kzalloc(&chan->dev, sizeof(*i2c_ivc_dev),
|
|
GFP_KERNEL);
|
|
if (i2c_ivc_dev == NULL) {
|
|
ret = -ENOMEM;
|
|
goto put;
|
|
}
|
|
|
|
mutex_init(&i2c_ivc_dev->inuse);
|
|
|
|
i2c_ivc_dev->is_added = false;
|
|
i2c_ivc_dev->is_online = false;
|
|
i2c_ivc_dev->reg_base = reg_base;
|
|
i2c_ivc_dev->bus_clk_rate = tegra_i2c_get_clk_freq(i2c_node);
|
|
i2c_ivc_dev->chan = chan;
|
|
|
|
tegra_ivc_channel_set_drvdata(chan, i2c_ivc_dev);
|
|
|
|
ret = tegra_i2c_ivc_register(i2c_ivc_dev);
|
|
if (ret < 0)
|
|
goto put;
|
|
|
|
return 0;
|
|
|
|
put:
|
|
of_node_put(i2c_node);
|
|
remove:
|
|
tegra_ivc_rpc_channel_remove(chan);
|
|
return ret;
|
|
}
|
|
|
|
static void tegra_ivc_rpc_i2c_single_remove(struct tegra_ivc_channel *chan)
|
|
{
|
|
struct tegra_i2c_ivc_single_dev *i2c_ivc_dev;
|
|
|
|
i2c_ivc_dev = tegra_ivc_channel_get_drvdata(chan);
|
|
tegra_i2c_ivc_unregister(i2c_ivc_dev);
|
|
tegra_ivc_rpc_channel_remove(chan);
|
|
}
|
|
|
|
static const struct of_device_id tegra_ivc_rpc_i2c_single_of_match[] = {
|
|
{ .compatible = "nvidia,tegra186-camera-ivc-rpc-i2c-single", },
|
|
{ },
|
|
};
|
|
TEGRA_IVC_RPC_DRIVER_DEFINE(i2c_single, "tegra-ivc-rpc-i2c-single")
|
|
|
|
MODULE_AUTHOR("Ashish Singh <assingh@nvidia.com>");
|
|
MODULE_DESCRIPTION("NVIDIA Tegra CAMRTC I2C IVC driver");
|
|
MODULE_LICENSE("GPL");
|