181 lines
4.0 KiB
C
181 lines
4.0 KiB
C
/*
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* Tegra Host Virtualization Interfaces to Server
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*
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* Copyright (c) 2014-2018, NVIDIA Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#ifndef __TEGRA_VHOST_H
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#define __TEGRA_VHOST_H
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enum {
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/* Must start at 1, 0 is used for VGPU */
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TEGRA_VHOST_MODULE_HOST = 1,
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TEGRA_VHOST_MODULE_VIC,
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TEGRA_VHOST_MODULE_VI,
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TEGRA_VHOST_MODULE_ISP,
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TEGRA_VHOST_MODULE_MSENC,
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TEGRA_VHOST_MODULE_NVDEC,
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TEGRA_VHOST_MODULE_NVJPG,
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TEGRA_VHOST_MODULE_NVENC1,
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TEGRA_VHOST_MODULE_NVDEC1,
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TEGRA_VHOST_MODULE_VI_THI,
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TEGRA_VHOST_MODULE_ISP_THI,
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TEGRA_VHOST_MODULE_NVCSI,
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};
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enum {
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TEGRA_VHOST_QUEUE_CMD = 0,
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TEGRA_VHOST_QUEUE_PB,
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TEGRA_VHOST_QUEUE_INTR,
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/* See also TEGRA_VGPU_QUEUE_* in tegra_vgpu.h */
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};
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enum {
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TEGRA_VHOST_CMD_CONNECT = 0,
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TEGRA_VHOST_CMD_DISCONNECT,
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TEGRA_VHOST_CMD_ABORT,
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TEGRA_VHOST_CMD_SYNCPT_WRITE,
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TEGRA_VHOST_CMD_SYNCPT_READ,
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TEGRA_VHOST_CMD_SYNCPT_CPU_INCR,
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TEGRA_VHOST_CMD_WAITBASE_WRITE,
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TEGRA_VHOST_CMD_WAITBASE_READ,
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TEGRA_VHOST_CMD_MUTEX_TRY_LOCK,
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TEGRA_VHOST_CMD_MUTEX_UNLOCK,
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TEGRA_VHOST_CMD_SYNCPT_ENABLE_INTR,
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TEGRA_VHOST_CMD_SYNCPT_DISABLE_INTR,
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TEGRA_VHOST_CMD_SYNCPT_DISABLE_INTR_ALL,
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TEGRA_VHOST_CMD_SYNCPT_GET_RANGE,
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TEGRA_VHOST_CMD_CHANNEL_ALLOC_CLIENTID,
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TEGRA_VHOST_CMD_HOST1X_CDMA_SUBMIT,
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TEGRA_VHOST_CMD_HOST1X_REGRDWR,
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TEGRA_VHOST_CMD_SUSPEND,
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TEGRA_VHOST_CMD_RESUME,
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TEGRA_VHOST_CMD_PROD_APPLY, /* WAR */
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TEGRA_VHOST_CMD_CIL_SW_RESET, /* WAR */
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};
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struct tegra_vhost_connect_params {
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u32 module;
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u64 handle;
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};
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struct tegra_vhost_syncpt_params {
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u32 id;
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u32 val;
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};
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struct tegra_vhost_syncpt_range_params {
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u32 base;
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u32 size;
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};
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struct tegra_vhost_waitbase_params {
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u32 id;
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u32 val;
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};
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struct tegra_vhost_mutex_params {
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u32 id;
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u32 locked;
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u32 owner;
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};
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struct tegra_vhost_syncpt_intr_params {
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u32 id;
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u32 thresh;
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};
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struct tegra_vhost_channel_clientid_params {
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u32 moduleid;
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u32 clientid;
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};
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struct tegra_vhost_channel_submit_params {
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u32 clientid;
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u32 job_id;
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u32 num_entries;
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u32 num_syncpts;
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u32 timeout;
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};
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#define REGRDWR_ARRAY_SIZE (u32)4
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struct tegra_vhost_channel_regrdwr_params {
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u32 moduleid;
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u32 count;
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u32 write;
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u32 regs[REGRDWR_ARRAY_SIZE];
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};
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struct tegra_vhost_prod_apply_params {
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u32 phy_mode;
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};
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struct tegra_vhost_cil_sw_reset_params {
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u32 lanes;
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u32 enable;
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};
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struct tegra_vhost_cmd_msg {
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u32 cmd;
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int ret;
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u64 handle;
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union {
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struct tegra_vhost_connect_params connect;
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struct tegra_vhost_syncpt_params syncpt;
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struct tegra_vhost_syncpt_range_params syncpt_range;
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struct tegra_vhost_waitbase_params waitbase;
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struct tegra_vhost_mutex_params mutex;
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struct tegra_vhost_syncpt_intr_params syncpt_intr;
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struct tegra_vhost_channel_clientid_params clientid;
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struct tegra_vhost_channel_submit_params cdma_submit;
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struct tegra_vhost_channel_regrdwr_params regrdwr;
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struct tegra_vhost_prod_apply_params prod_apply;
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struct tegra_vhost_cil_sw_reset_params cil_sw_reset;
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} params;
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};
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enum {
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TEGRA_VHOST_EVENT_SYNCPT_INTR = 0,
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TEGRA_VHOST_EVENT_CHAN_TIMEOUT_INTR,
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TEGRA_VHOST_EVENT_ABORT
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};
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struct tegra_vhost_syncpt_intr_info {
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u32 id;
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u32 thresh;
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};
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struct tegra_vhost_chan_timeout_intr_info {
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u32 module_id;
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u32 client_id;
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u32 job_id_start;
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u32 job_id_end;
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};
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struct tegra_vhost_intr_msg {
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unsigned int event;
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union {
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struct tegra_vhost_syncpt_intr_info syncpt_intr;
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struct tegra_vhost_chan_timeout_intr_info chan_timeout;
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} info;
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};
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#define TEGRA_VHOST_QUEUE_SIZES \
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sizeof(struct tegra_vhost_cmd_msg), \
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4096, \
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sizeof(struct tegra_vhost_intr_msg)
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#endif
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