174 lines
4.6 KiB
C
174 lines
4.6 KiB
C
/*
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* Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef LINUX_TEGRA_CAMRTC_I2C_COMMON_H
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#define LINUX_TEGRA_CAMRTC_I2C_COMMON_H
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#if defined(__KERNEL__)
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#include <linux/types.h>
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#include <linux/compiler.h>
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#else
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#include <stdint.h>
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#endif
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/* I2C_REQUEST_MULTI frame size estimation
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* Assume the sensor has 2 byte register address
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* Assume each setting requires 4 consecutive register write
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* Assume up to four different setting updates
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* Each transfer has 2 byte header (flag + length).
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*
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* Header: 4 bytes
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* Transaction 0: Group Hold. 2 (header) + 3 (data)
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* Transaction 1,2,3,4: Setting update. (2 (header) + 6 (data)) * 4
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* Transaction 5: Group Hold. 2 (header) + 3 (data)
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* Transaction 6: Group Hold. 2 (header) + 3 (data)
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* Total: 51 bytes
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*
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* With RPC header: 75 bytes
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* IVC frame should be multiple of 64, thus 128 is picked.
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*/
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/* Message IDs */
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#define CAMRTC_RPC_REQ_I2C_ADD_SINGLE_DEV 0x01U
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#define CAMRTC_RPC_REQ_I2C_DEL_SINGLE_DEV 0x02U
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#define CAMRTC_RPC_REQ_I2C_REQUEST_SINGLE 0x03U
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#define CAMRTC_RPC_REQ_I2C_ADD_MULTI_DEV 0x11U
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#define CAMRTC_RPC_REQ_I2C_DEL_MULTI_DEV 0x12U
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#define CAMRTC_RPC_REQ_I2C_ADD_SENSOR 0x13U
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#define CAMRTC_RPC_REQ_I2C_DEL_SENSOR 0x14U
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#define CAMRTC_RPC_REQ_I2C_REQUEST_MULTI 0x15U
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#define CAMRTC_RPC_REQ_I2C_REINIT_DEV 0x21U
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#define CAMRTC_RPC_RSP_I2C_RESPONSE 0x31U
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/* Message limit */
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#define CAMRTC_I2C_REQUEST_MAX_LEN \
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(128U - TEGRA_IVC_RPC_MSG_HEADER_MAX)
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/* ADD_SINGLE_DEV */
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struct camrtc_rpc_i2c_add_single {
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uint32_t reg_base; /* I2C controller base address */
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uint32_t bus_clk_rate; /* I2C clock rate */
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};
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/* DEL_SINGLE_DEV */
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struct camrtc_rpc_i2c_del_single {
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uint32_t bus_id; /* I2C bus */
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};
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/* REQUEST_SINGLE
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* Header
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* +0: Bus ID
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* Followed by repetition of following
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* +0: Flag
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* +1: I2C address LSB
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* +2: I2C address MSB
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* +3: length of data
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* +4: data for write
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*/
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#define CAMRTC_I2C_SINGLE_HEADER_SIZE 1U
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#define CAMRTC_I2C_SINGLE_FLAG_OFFSET 0U
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#define CAMRTC_I2C_SINGLE_ADDR_OFFSET 1U
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#define CAMRTC_I2C_SINGLE_LENGTH_OFFSET 3U
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#define CAMRTC_I2C_SINGLE_DATA_OFFSET 4U
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#define CAMRTC_I2C_REQUEST_FLAG_READ 0x01U /* read transfer */
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#define CAMRTC_I2C_REQUEST_FLAG_TEN 0x40U /* 10 bit address */
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#define CAMRTC_I2C_REQUEST_FLAG_NOSTART 0x80U /* continue transfer */
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/* ADD_MULTI_DEV */
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struct camrtc_rpc_i2c_add_multi {
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uint32_t reg_base; /* I2C controller base address */
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};
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/* DEL_MULTI_DEV */
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struct camrtc_rpc_i2c_del_multi {
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uint32_t bus_id; /* I2C bus */
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};
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#define CAMRTC_I2C_MP_NONE 0x00U /* no multiplexer */
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#define CAMRTC_I2C_MP_TCA9548 0x01U /* TCA9548 */
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#define CAMRTC_I2C_SENSOR_FLAG_TEN 0x0001U /* 10 bit address */
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#define CAMRTC_I2C_SENSOR_FLAG_FM_PLUS 0x0002U /* fast mode plus */
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#define CAMRTC_I2C_SENSOR_FLAG_HS 0x0004U /* high speed */
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/* I2C_ADD_SENSOR */
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struct camrtc_rpc_i2c_add_sensor {
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uint32_t bus_id; /* I2C bus */
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uint32_t addr; /* slave address of the sensor */
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uint32_t flag; /* CAMRTC_I2C_SENSOR_FLAG_ */
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uint32_t mp_type; /* multiplexer type */
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uint32_t mp_addr; /* slave address of multiplexer */
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uint32_t mp_channel; /* channel in multiplexer */
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uint32_t reserved;
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};
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/* I2C_DEL_SENSOR */
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struct camrtc_rpc_i2c_del_sensor {
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uint16_t sensor_id; /* Sensor identifier */
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};
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/* I2C_REQUEST_MULTI
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* Header
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* +0: Sensor ID
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* +1: Flag
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* +2: Frame ID LSB
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* +3: Frame ID MSB
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* Followed by repetition of following
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* +0: Flag
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* +1: length of data
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* +2: data for write
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*/
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#define CAMRTC_I2C_MULTI_HEADER_SIZE 4U
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#define CAMRTC_I2C_MULTI_FLAG_OFFSET 0U
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#define CAMRTC_I2C_MULTI_LENGTH_OFFSET 1U
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#define CAMRTC_I2C_MULTI_DATA_OFFSET 2U
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#define CAMRTC_I2C_REQUEST_MULTI_FLAG_FRAMEID 0x01U /* frame ID is valid */
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/* REINIT_DEV */
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struct camrtc_rpc_i2c_reinit {
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uint32_t bus_id;
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};
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/* RESPONSE
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*/
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#define CAMRTC_I2C_RESPONSE_RESULT_SUCCESS 0
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#define CAMRTC_I2C_RESPONSE_RESULT_DROPPED 1
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#define CAMRTC_I2C_RESPONSE_RESULT_NO_ACK 2
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#define CAMRTC_I2C_RESPONSE_MAX_READ_LEN 64
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struct camrtc_rpc_i2c_response {
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uint32_t result;
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uint32_t read_len;
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uint8_t read_data[CAMRTC_I2C_RESPONSE_MAX_READ_LEN];
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};
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/*
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* Structures of shared memory
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*/
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struct camrtc_i2c_single_cmd_queue {
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uint8_t flag;
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};
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#endif /* LINUX_TEGRA_CAMRTC_I2C_COMMON_H */
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