782 lines
25 KiB
C
782 lines
25 KiB
C
/*
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* tegra210_mixer_alt.c - Tegra210 MIXER driver
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*
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* Copyright (c) 2014-2019 NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program. If not, see <http://www.gnu.org/licenses/>.
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*/
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#include <linux/clk.h>
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <linux/of_device.h>
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#include "tegra210_xbar_alt.h"
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#include "tegra210_mixer_alt.h"
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#define DRV_NAME "tegra210_mixer"
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#define MIXER_RX_REG(reg, id) (reg + (id * TEGRA210_MIXER_AXBAR_RX_STRIDE))
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#define MIXER_TX_REG(reg, id) (reg + (id * TEGRA210_MIXER_AXBAR_TX_STRIDE))
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#define MIXER_GAIN_CONFIG_RAM_ADDR(id) \
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(TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_ADDR_0 + \
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id*TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_ADDR_STRIDE)
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#define MIXER_RX_REG_DEFAULTS(id) \
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{ MIXER_RX_REG(TEGRA210_MIXER_AXBAR_RX1_CIF_CTRL, id), 0x00007700}, \
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{ MIXER_RX_REG(TEGRA210_MIXER_AXBAR_RX1_CTRL, id), 0x00010823}, \
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{ MIXER_RX_REG(TEGRA210_MIXER_AXBAR_RX1_PEAK_CTRL, id), 0x000012c0}
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#define MIXER_TX_REG_DEFAULTS(id) \
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{ MIXER_TX_REG(TEGRA210_MIXER_AXBAR_TX1_INT_MASK, id), 0x00000001}, \
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{ MIXER_TX_REG(TEGRA210_MIXER_AXBAR_TX1_CIF_CTRL, id), 0x00007700}
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static const struct reg_default tegra210_mixer_reg_defaults[] = {
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MIXER_RX_REG_DEFAULTS(0),
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MIXER_RX_REG_DEFAULTS(1),
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MIXER_RX_REG_DEFAULTS(2),
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MIXER_RX_REG_DEFAULTS(3),
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MIXER_RX_REG_DEFAULTS(4),
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MIXER_RX_REG_DEFAULTS(5),
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MIXER_RX_REG_DEFAULTS(6),
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MIXER_RX_REG_DEFAULTS(7),
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MIXER_RX_REG_DEFAULTS(8),
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MIXER_RX_REG_DEFAULTS(9),
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MIXER_TX_REG_DEFAULTS(0),
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MIXER_TX_REG_DEFAULTS(1),
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MIXER_TX_REG_DEFAULTS(2),
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MIXER_TX_REG_DEFAULTS(3),
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MIXER_TX_REG_DEFAULTS(4),
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{ TEGRA210_MIXER_CG, 0x00000001},
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{ TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL, 0x00004000},
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{ TEGRA210_MIXER_AHUBRAMCTL_PEAKM_RAM_CTRL, 0x00004000},
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};
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static int tegra210_mixer_runtime_suspend(struct device *dev)
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{
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struct tegra210_mixer *mixer = dev_get_drvdata(dev);
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regcache_cache_only(mixer->regmap, true);
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regcache_mark_dirty(mixer->regmap);
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return 0;
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}
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static int tegra210_mixer_runtime_resume(struct device *dev)
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{
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struct tegra210_mixer *mixer = dev_get_drvdata(dev);
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regcache_cache_only(mixer->regmap, false);
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regcache_sync(mixer->regmap);
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return 0;
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}
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static int tegra210_mixer_write_ram(struct tegra210_mixer *mixer,
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unsigned int addr,
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unsigned int val)
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{
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unsigned int reg, value, wait = 0xffff;
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/* check if busy */
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do {
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regmap_read(mixer->regmap,
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TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL, &value);
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wait--;
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if (!wait)
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return -EINVAL;
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} while (value & 0x80000000);
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value = 0;
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reg = (addr << TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_RAM_ADDR_SHIFT) &
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TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_RAM_ADDR_MASK;
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reg |= TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_ADDR_INIT_EN;
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reg |= TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_RW_WRITE;
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reg |= TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL_SEQ_ACCESS_EN;
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regmap_write(mixer->regmap,
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TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL, reg);
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regmap_write(mixer->regmap,
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TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_DATA, val);
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return 0;
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}
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static int tegra210_mixer_put_format(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct soc_mixer_control *mc =
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(struct soc_mixer_control *)kcontrol->private_value;
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struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
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struct tegra210_mixer *mixer = snd_soc_codec_get_drvdata(codec);
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int value = ucontrol->value.integer.value[0];
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if (strstr(kcontrol->id.name, "Channels")) {
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if (value >= 0 && value <= 8)
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mixer->channels_via_control[mc->reg - 1] = value;
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else
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return -EINVAL;
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}
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return 0;
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}
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static int tegra210_mixer_get_format(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct soc_mixer_control *mc =
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(struct soc_mixer_control *)kcontrol->private_value;
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struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
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struct tegra210_mixer *mixer = snd_soc_codec_get_drvdata(codec);
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if (strstr(kcontrol->id.name, "Channels"))
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ucontrol->value.integer.value[0] =
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mixer->channels_via_control[mc->reg - 1];
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return 0;
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}
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static int tegra210_mixer_get_gain(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct soc_mixer_control *mc =
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(struct soc_mixer_control *)kcontrol->private_value;
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struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
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struct tegra210_mixer *mixer = snd_soc_codec_get_drvdata(codec);
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unsigned int reg = mc->reg;
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unsigned int i;
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i = (reg - TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_ADDR_0) /
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TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_ADDR_STRIDE;
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ucontrol->value.integer.value[0] = mixer->gain_value[i];
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return 0;
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}
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static int tegra210_mixer_put_gain(struct snd_kcontrol *kcontrol,
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struct snd_ctl_elem_value *ucontrol)
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{
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struct soc_mixer_control *mc =
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(struct soc_mixer_control *)kcontrol->private_value;
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struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
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struct tegra210_mixer *mixer = snd_soc_codec_get_drvdata(codec);
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unsigned int reg = mc->reg;
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unsigned int ret, i;
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pm_runtime_get_sync(codec->dev);
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/* write default gain config poly coefficients */
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for (i = 0; i < 10; i++)
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tegra210_mixer_write_ram(mixer, reg + i, mixer->gain_coeff[i]);
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/* set duration parameter */
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if (strstr(kcontrol->id.name, "Instant")) {
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for (; i < 14; i++)
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tegra210_mixer_write_ram(mixer, reg + i, 1);
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} else {
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for (; i < 14; i++)
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tegra210_mixer_write_ram(mixer, reg + i,
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mixer->gain_coeff[i]);
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}
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/* write new gain and trigger config */
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ret = tegra210_mixer_write_ram(mixer, reg + 0x09,
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ucontrol->value.integer.value[0]);
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ret |= tegra210_mixer_write_ram(mixer, reg + 0x0f,
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ucontrol->value.integer.value[0]);
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pm_runtime_put(codec->dev);
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/* save gain */
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i = (reg - TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_ADDR_0) /
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TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_ADDR_STRIDE;
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mixer->gain_value[i] = ucontrol->value.integer.value[0];
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return ret;
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}
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static int tegra210_mixer_set_audio_cif(struct tegra210_mixer *mixer,
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struct snd_pcm_hw_params *params,
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unsigned int reg,
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unsigned int id)
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{
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int channels, audio_bits;
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struct tegra210_xbar_cif_conf cif_conf;
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memset(&cif_conf, 0, sizeof(struct tegra210_xbar_cif_conf));
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channels = params_channels(params);
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if (mixer->channels_via_control[id])
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channels = mixer->channels_via_control[id];
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switch (params_format(params)) {
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case SNDRV_PCM_FORMAT_S16_LE:
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audio_bits = TEGRA210_AUDIOCIF_BITS_16;
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break;
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case SNDRV_PCM_FORMAT_S32_LE:
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audio_bits = TEGRA210_AUDIOCIF_BITS_32;
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break;
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default:
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return -EINVAL;
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}
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cif_conf.audio_channels = channels;
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cif_conf.client_channels = channels;
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cif_conf.audio_bits = audio_bits;
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cif_conf.client_bits = audio_bits;
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tegra210_xbar_set_cif(mixer->regmap, reg, &cif_conf);
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return 0;
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}
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static int tegra210_mixer_in_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct tegra210_mixer *mixer = snd_soc_dai_get_drvdata(dai);
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int ret, i;
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ret = tegra210_mixer_set_audio_cif(mixer, params,
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TEGRA210_MIXER_AXBAR_RX1_CIF_CTRL +
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(dai->id * TEGRA210_MIXER_AXBAR_RX_STRIDE),
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dai->id);
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/* write the gain config poly coefficients */
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for (i = 0; i < 14; i++) {
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tegra210_mixer_write_ram(mixer,
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MIXER_GAIN_CONFIG_RAM_ADDR(dai->id) + i,
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mixer->gain_coeff[i]);
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}
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/* write saved gain */
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ret = tegra210_mixer_write_ram(mixer,
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MIXER_GAIN_CONFIG_RAM_ADDR(dai->id) + 0x09,
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mixer->gain_value[dai->id]);
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/* trigger the polynomial configuration */
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tegra210_mixer_write_ram(mixer,
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MIXER_GAIN_CONFIG_RAM_ADDR(dai->id) + 0xf,
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0x01);
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return ret;
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}
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static int tegra210_mixer_out_hw_params(struct snd_pcm_substream *substream,
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struct snd_pcm_hw_params *params,
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struct snd_soc_dai *dai)
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{
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struct tegra210_mixer *mixer = snd_soc_dai_get_drvdata(dai);
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int ret;
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ret = tegra210_mixer_set_audio_cif(mixer, params,
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TEGRA210_MIXER_AXBAR_TX1_CIF_CTRL +
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((dai->id-10) * TEGRA210_MIXER_AXBAR_TX_STRIDE),
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dai->id);
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return ret;
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}
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static struct snd_soc_dai_ops tegra210_mixer_out_dai_ops = {
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.hw_params = tegra210_mixer_out_hw_params,
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};
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static struct snd_soc_dai_ops tegra210_mixer_in_dai_ops = {
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.hw_params = tegra210_mixer_in_hw_params,
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};
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#define IN_DAI(sname, id, dai_ops) \
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{ \
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.name = #sname #id, \
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.playback = { \
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.stream_name = #sname #id " Receive", \
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.channels_min = 1, \
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.channels_max = 8, \
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.rates = SNDRV_PCM_RATE_8000_192000, \
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.formats = SNDRV_PCM_FMTBIT_S8 | \
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SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S24_LE | \
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SNDRV_PCM_FMTBIT_S32_LE, \
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}, \
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.ops = dai_ops, \
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}
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#define OUT_DAI(sname, id, dai_ops) \
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{ \
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.name = #sname #id, \
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.capture = { \
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.stream_name = #sname #id " Transmit", \
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.channels_min = 1, \
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.channels_max = 8, \
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.rates = SNDRV_PCM_RATE_8000_192000, \
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.formats = SNDRV_PCM_FMTBIT_S8 | \
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SNDRV_PCM_FMTBIT_S16_LE | \
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SNDRV_PCM_FMTBIT_S24_LE | \
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SNDRV_PCM_FMTBIT_S32_LE, \
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}, \
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.ops = dai_ops, \
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}
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static struct snd_soc_dai_driver tegra210_mixer_dais[] = {
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IN_DAI(RX, 1, &tegra210_mixer_in_dai_ops),
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IN_DAI(RX, 2, &tegra210_mixer_in_dai_ops),
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IN_DAI(RX, 3, &tegra210_mixer_in_dai_ops),
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IN_DAI(RX, 4, &tegra210_mixer_in_dai_ops),
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IN_DAI(RX, 5, &tegra210_mixer_in_dai_ops),
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IN_DAI(RX, 6, &tegra210_mixer_in_dai_ops),
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IN_DAI(RX, 7, &tegra210_mixer_in_dai_ops),
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IN_DAI(RX, 8, &tegra210_mixer_in_dai_ops),
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IN_DAI(RX, 9, &tegra210_mixer_in_dai_ops),
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IN_DAI(RX, 10, &tegra210_mixer_in_dai_ops),
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OUT_DAI(TX, 1, &tegra210_mixer_out_dai_ops),
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OUT_DAI(TX, 2, &tegra210_mixer_out_dai_ops),
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OUT_DAI(TX, 3, &tegra210_mixer_out_dai_ops),
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OUT_DAI(TX, 4, &tegra210_mixer_out_dai_ops),
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OUT_DAI(TX, 5, &tegra210_mixer_out_dai_ops),
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};
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#define ADDER_CTRL_DECL(name, reg) \
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static const struct snd_kcontrol_new name[] = { \
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SOC_DAPM_SINGLE("RX1", reg, 0, 1, 0), \
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SOC_DAPM_SINGLE("RX2", reg, 1, 1, 0), \
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SOC_DAPM_SINGLE("RX3", reg, 2, 1, 0), \
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SOC_DAPM_SINGLE("RX4", reg, 3, 1, 0), \
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SOC_DAPM_SINGLE("RX5", reg, 4, 1, 0), \
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SOC_DAPM_SINGLE("RX6", reg, 5, 1, 0), \
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SOC_DAPM_SINGLE("RX7", reg, 6, 1, 0), \
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SOC_DAPM_SINGLE("RX8", reg, 7, 1, 0), \
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SOC_DAPM_SINGLE("RX9", reg, 8, 1, 0), \
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SOC_DAPM_SINGLE("RX10", reg, 9, 1, 0), \
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}
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ADDER_CTRL_DECL(adder1, TEGRA210_MIXER_AXBAR_TX1_ADDER_CONFIG);
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ADDER_CTRL_DECL(adder2, TEGRA210_MIXER_AXBAR_TX2_ADDER_CONFIG);
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ADDER_CTRL_DECL(adder3, TEGRA210_MIXER_AXBAR_TX3_ADDER_CONFIG);
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ADDER_CTRL_DECL(adder4, TEGRA210_MIXER_AXBAR_TX4_ADDER_CONFIG);
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ADDER_CTRL_DECL(adder5, TEGRA210_MIXER_AXBAR_TX5_ADDER_CONFIG);
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static const struct snd_kcontrol_new tegra210_mixer_gain_ctls[] = { \
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SOC_SINGLE_EXT("RX1 Gain", MIXER_GAIN_CONFIG_RAM_ADDR(0), 0, 0x20000, 0,
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tegra210_mixer_get_gain, tegra210_mixer_put_gain),
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SOC_SINGLE_EXT("RX2 Gain", MIXER_GAIN_CONFIG_RAM_ADDR(1), 0, 0x20000, 0,
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tegra210_mixer_get_gain, tegra210_mixer_put_gain),
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SOC_SINGLE_EXT("RX3 Gain", MIXER_GAIN_CONFIG_RAM_ADDR(2), 0, 0x20000, 0,
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tegra210_mixer_get_gain, tegra210_mixer_put_gain),
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SOC_SINGLE_EXT("RX4 Gain", MIXER_GAIN_CONFIG_RAM_ADDR(3), 0, 0x20000, 0,
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tegra210_mixer_get_gain, tegra210_mixer_put_gain),
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SOC_SINGLE_EXT("RX5 Gain", MIXER_GAIN_CONFIG_RAM_ADDR(4), 0, 0x20000, 0,
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tegra210_mixer_get_gain, tegra210_mixer_put_gain),
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SOC_SINGLE_EXT("RX6 Gain", MIXER_GAIN_CONFIG_RAM_ADDR(5), 0, 0x20000, 0,
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tegra210_mixer_get_gain, tegra210_mixer_put_gain),
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SOC_SINGLE_EXT("RX7 Gain", MIXER_GAIN_CONFIG_RAM_ADDR(6), 0, 0x20000, 0,
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tegra210_mixer_get_gain, tegra210_mixer_put_gain),
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SOC_SINGLE_EXT("RX8 Gain", MIXER_GAIN_CONFIG_RAM_ADDR(7), 0, 0x20000, 0,
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tegra210_mixer_get_gain, tegra210_mixer_put_gain),
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SOC_SINGLE_EXT("RX9 Gain", MIXER_GAIN_CONFIG_RAM_ADDR(8), 0, 0x20000, 0,
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tegra210_mixer_get_gain, tegra210_mixer_put_gain),
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SOC_SINGLE_EXT("RX10 Gain", MIXER_GAIN_CONFIG_RAM_ADDR(9), 0, 0x20000, 0,
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tegra210_mixer_get_gain, tegra210_mixer_put_gain),
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SOC_SINGLE_EXT("RX1 Gain Instant", MIXER_GAIN_CONFIG_RAM_ADDR(0), 0,
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0x20000, 0, tegra210_mixer_get_gain, tegra210_mixer_put_gain),
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SOC_SINGLE_EXT("RX2 Gain Instant", MIXER_GAIN_CONFIG_RAM_ADDR(1), 0,
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0x20000, 0, tegra210_mixer_get_gain, tegra210_mixer_put_gain),
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SOC_SINGLE_EXT("RX3 Gain Instant", MIXER_GAIN_CONFIG_RAM_ADDR(2), 0,
|
|
0x20000, 0, tegra210_mixer_get_gain, tegra210_mixer_put_gain),
|
|
SOC_SINGLE_EXT("RX4 Gain Instant", MIXER_GAIN_CONFIG_RAM_ADDR(3), 0,
|
|
0x20000, 0, tegra210_mixer_get_gain, tegra210_mixer_put_gain),
|
|
SOC_SINGLE_EXT("RX5 Gain Instant", MIXER_GAIN_CONFIG_RAM_ADDR(4), 0,
|
|
0x20000, 0, tegra210_mixer_get_gain, tegra210_mixer_put_gain),
|
|
SOC_SINGLE_EXT("RX6 Gain Instant", MIXER_GAIN_CONFIG_RAM_ADDR(5), 0,
|
|
0x20000, 0, tegra210_mixer_get_gain, tegra210_mixer_put_gain),
|
|
SOC_SINGLE_EXT("RX7 Gain Instant", MIXER_GAIN_CONFIG_RAM_ADDR(6), 0,
|
|
0x20000, 0, tegra210_mixer_get_gain, tegra210_mixer_put_gain),
|
|
SOC_SINGLE_EXT("RX8 Gain Instant", MIXER_GAIN_CONFIG_RAM_ADDR(7), 0,
|
|
0x20000, 0, tegra210_mixer_get_gain, tegra210_mixer_put_gain),
|
|
SOC_SINGLE_EXT("RX9 Gain Instant", MIXER_GAIN_CONFIG_RAM_ADDR(8), 0,
|
|
0x20000, 0, tegra210_mixer_get_gain, tegra210_mixer_put_gain),
|
|
SOC_SINGLE_EXT("RX10 Gain Instant", MIXER_GAIN_CONFIG_RAM_ADDR(9), 0,
|
|
0x20000, 0, tegra210_mixer_get_gain, tegra210_mixer_put_gain),
|
|
SOC_SINGLE_EXT("RX1 Channels", 1, 0, 8, 0,
|
|
tegra210_mixer_get_format, tegra210_mixer_put_format),
|
|
SOC_SINGLE_EXT("RX2 Channels", 2, 0, 8, 0,
|
|
tegra210_mixer_get_format, tegra210_mixer_put_format),
|
|
SOC_SINGLE_EXT("RX3 Channels", 3, 0, 8, 0,
|
|
tegra210_mixer_get_format, tegra210_mixer_put_format),
|
|
SOC_SINGLE_EXT("RX4 Channels", 4, 0, 8, 0,
|
|
tegra210_mixer_get_format, tegra210_mixer_put_format),
|
|
SOC_SINGLE_EXT("RX5 Channels", 5, 0, 8, 0,
|
|
tegra210_mixer_get_format, tegra210_mixer_put_format),
|
|
SOC_SINGLE_EXT("RX6 Channels", 6, 0, 8, 0,
|
|
tegra210_mixer_get_format, tegra210_mixer_put_format),
|
|
SOC_SINGLE_EXT("RX7 Channels", 7, 0, 8, 0,
|
|
tegra210_mixer_get_format, tegra210_mixer_put_format),
|
|
SOC_SINGLE_EXT("RX8 Channels", 8, 0, 8, 0,
|
|
tegra210_mixer_get_format, tegra210_mixer_put_format),
|
|
SOC_SINGLE_EXT("RX9 Channels", 9, 0, 8, 0,
|
|
tegra210_mixer_get_format, tegra210_mixer_put_format),
|
|
SOC_SINGLE_EXT("RX10 Channels", 10, 0, 8, 0,
|
|
tegra210_mixer_get_format, tegra210_mixer_put_format),
|
|
SOC_SINGLE_EXT("TX1 Channels", 11, 0, 8, 0,
|
|
tegra210_mixer_get_format, tegra210_mixer_put_format),
|
|
SOC_SINGLE_EXT("TX2 Channels", 12, 0, 8, 0,
|
|
tegra210_mixer_get_format, tegra210_mixer_put_format),
|
|
SOC_SINGLE_EXT("TX3 Channels", 13, 0, 8, 0,
|
|
tegra210_mixer_get_format, tegra210_mixer_put_format),
|
|
SOC_SINGLE_EXT("TX4 Channels", 14, 0, 8, 0,
|
|
tegra210_mixer_get_format, tegra210_mixer_put_format),
|
|
SOC_SINGLE_EXT("TX5 Channels", 15, 0, 8, 0,
|
|
tegra210_mixer_get_format, tegra210_mixer_put_format),
|
|
SOC_SINGLE("Mixer Enable", TEGRA210_MIXER_ENABLE, 0, 1, 0),
|
|
};
|
|
|
|
static const struct snd_soc_dapm_widget tegra210_mixer_widgets[] = {
|
|
SND_SOC_DAPM_AIF_IN("RX1", NULL, 0, SND_SOC_NOPM, 0, 0),
|
|
SND_SOC_DAPM_AIF_IN("RX2", NULL, 0, SND_SOC_NOPM, 0, 0),
|
|
SND_SOC_DAPM_AIF_IN("RX3", NULL, 0, SND_SOC_NOPM, 0, 0),
|
|
SND_SOC_DAPM_AIF_IN("RX4", NULL, 0, SND_SOC_NOPM, 0, 0),
|
|
SND_SOC_DAPM_AIF_IN("RX5", NULL, 0, SND_SOC_NOPM, 0, 0),
|
|
SND_SOC_DAPM_AIF_IN("RX6", NULL, 0, SND_SOC_NOPM, 0, 0),
|
|
SND_SOC_DAPM_AIF_IN("RX7", NULL, 0, SND_SOC_NOPM, 0, 0),
|
|
SND_SOC_DAPM_AIF_IN("RX8", NULL, 0, SND_SOC_NOPM, 0, 0),
|
|
SND_SOC_DAPM_AIF_IN("RX9", NULL, 0, SND_SOC_NOPM, 0, 0),
|
|
SND_SOC_DAPM_AIF_IN("RX10", NULL, 0, SND_SOC_NOPM, 0, 0),
|
|
SND_SOC_DAPM_AIF_OUT("TX1", NULL, 0,
|
|
TEGRA210_MIXER_AXBAR_TX1_ENABLE, 0, 0),
|
|
SND_SOC_DAPM_AIF_OUT("TX2", NULL, 0,
|
|
TEGRA210_MIXER_AXBAR_TX2_ENABLE, 0, 0),
|
|
SND_SOC_DAPM_AIF_OUT("TX3", NULL, 0,
|
|
TEGRA210_MIXER_AXBAR_TX3_ENABLE, 0, 0),
|
|
SND_SOC_DAPM_AIF_OUT("TX4", NULL, 0,
|
|
TEGRA210_MIXER_AXBAR_TX4_ENABLE, 0, 0),
|
|
SND_SOC_DAPM_AIF_OUT("TX5", NULL, 0,
|
|
TEGRA210_MIXER_AXBAR_TX5_ENABLE, 0, 0),
|
|
SND_SOC_DAPM_MIXER("Adder1", SND_SOC_NOPM, 1, 0,
|
|
adder1, ARRAY_SIZE(adder1)),
|
|
SND_SOC_DAPM_MIXER("Adder2", SND_SOC_NOPM, 1, 0,
|
|
adder2, ARRAY_SIZE(adder2)),
|
|
SND_SOC_DAPM_MIXER("Adder3", SND_SOC_NOPM, 1, 0,
|
|
adder3, ARRAY_SIZE(adder3)),
|
|
SND_SOC_DAPM_MIXER("Adder4", SND_SOC_NOPM, 1, 0,
|
|
adder4, ARRAY_SIZE(adder4)),
|
|
SND_SOC_DAPM_MIXER("Adder5", SND_SOC_NOPM, 1, 0,
|
|
adder5, ARRAY_SIZE(adder5)),
|
|
};
|
|
|
|
#define MIXER_ROUTES(name, id) \
|
|
{name, "RX1", "RX1",}, \
|
|
{name, "RX2", "RX2",}, \
|
|
{name, "RX3", "RX3",}, \
|
|
{name, "RX4", "RX4",}, \
|
|
{name, "RX5", "RX5",}, \
|
|
{name, "RX6", "RX6",}, \
|
|
{name, "RX7", "RX7",}, \
|
|
{name, "RX8", "RX8",}, \
|
|
{name, "RX9", "RX9",}, \
|
|
{name, "RX10", "RX10"}, \
|
|
{"TX"#id, NULL, name}
|
|
|
|
static const struct snd_soc_dapm_route tegra210_mixer_routes[] = {
|
|
{ "RX1", NULL, "RX1 Receive" },
|
|
{ "RX2", NULL, "RX2 Receive" },
|
|
{ "RX3", NULL, "RX3 Receive" },
|
|
{ "RX4", NULL, "RX4 Receive" },
|
|
{ "RX5", NULL, "RX5 Receive" },
|
|
{ "RX6", NULL, "RX6 Receive" },
|
|
{ "RX7", NULL, "RX7 Receive" },
|
|
{ "RX8", NULL, "RX8 Receive" },
|
|
{ "RX9", NULL, "RX9 Receive" },
|
|
{ "RX10", NULL, "RX10 Receive" },
|
|
/* route between MIXER RXs and TXs */
|
|
MIXER_ROUTES("Adder1", 1),
|
|
MIXER_ROUTES("Adder2", 2),
|
|
MIXER_ROUTES("Adder3", 3),
|
|
MIXER_ROUTES("Adder4", 4),
|
|
MIXER_ROUTES("Adder5", 5),
|
|
{ "TX1 Transmit", NULL, "TX1" },
|
|
{ "TX2 Transmit", NULL, "TX2" },
|
|
{ "TX3 Transmit", NULL, "TX3" },
|
|
{ "TX4 Transmit", NULL, "TX4" },
|
|
{ "TX5 Transmit", NULL, "TX5" },
|
|
};
|
|
|
|
static struct snd_soc_codec_driver tegra210_mixer_codec = {
|
|
.idle_bias_off = 1,
|
|
.component_driver = {
|
|
.dapm_widgets = tegra210_mixer_widgets,
|
|
.num_dapm_widgets = ARRAY_SIZE(tegra210_mixer_widgets),
|
|
.dapm_routes = tegra210_mixer_routes,
|
|
.num_dapm_routes = ARRAY_SIZE(tegra210_mixer_routes),
|
|
.controls = tegra210_mixer_gain_ctls,
|
|
.num_controls = ARRAY_SIZE(tegra210_mixer_gain_ctls),
|
|
},
|
|
};
|
|
|
|
static bool tegra210_mixer_wr_reg(struct device *dev,
|
|
unsigned int reg)
|
|
{
|
|
if (reg < TEGRA210_MIXER_AXBAR_RX_LIMIT)
|
|
reg %= TEGRA210_MIXER_AXBAR_RX_STRIDE;
|
|
else if (reg < TEGRA210_MIXER_AXBAR_TX_LIMIT)
|
|
reg = (reg % TEGRA210_MIXER_AXBAR_TX_STRIDE) +
|
|
TEGRA210_MIXER_AXBAR_TX1_ENABLE;
|
|
|
|
switch (reg) {
|
|
case TEGRA210_MIXER_AXBAR_RX1_SOFT_RESET:
|
|
case TEGRA210_MIXER_AXBAR_RX1_STATUS:
|
|
case TEGRA210_MIXER_AXBAR_RX1_CIF_CTRL:
|
|
case TEGRA210_MIXER_AXBAR_RX1_CTRL:
|
|
case TEGRA210_MIXER_AXBAR_RX1_PEAK_CTRL:
|
|
|
|
case TEGRA210_MIXER_AXBAR_TX1_ENABLE:
|
|
case TEGRA210_MIXER_AXBAR_TX1_SOFT_RESET:
|
|
case TEGRA210_MIXER_AXBAR_TX1_INT_MASK:
|
|
case TEGRA210_MIXER_AXBAR_TX1_INT_SET:
|
|
case TEGRA210_MIXER_AXBAR_TX1_INT_CLEAR:
|
|
case TEGRA210_MIXER_AXBAR_TX1_CIF_CTRL:
|
|
case TEGRA210_MIXER_AXBAR_TX1_ADDER_CONFIG:
|
|
|
|
case TEGRA210_MIXER_ENABLE:
|
|
case TEGRA210_MIXER_SOFT_RESET:
|
|
case TEGRA210_MIXER_CG:
|
|
case TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL:
|
|
case TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_DATA:
|
|
case TEGRA210_MIXER_AHUBRAMCTL_PEAKM_RAM_CTRL:
|
|
case TEGRA210_MIXER_AHUBRAMCTL_PEAKM_RAM_DATA:
|
|
case TEGRA210_MIXER_CTRL:
|
|
return true;
|
|
default:
|
|
return false;
|
|
};
|
|
}
|
|
|
|
static bool tegra210_mixer_rd_reg(struct device *dev,
|
|
unsigned int reg)
|
|
{
|
|
if (reg < TEGRA210_MIXER_AXBAR_RX_LIMIT)
|
|
reg %= TEGRA210_MIXER_AXBAR_RX_STRIDE;
|
|
else if (reg < TEGRA210_MIXER_AXBAR_TX_LIMIT)
|
|
reg = (reg % TEGRA210_MIXER_AXBAR_TX_STRIDE) +
|
|
TEGRA210_MIXER_AXBAR_TX1_ENABLE;
|
|
|
|
switch (reg) {
|
|
case TEGRA210_MIXER_AXBAR_RX1_SOFT_RESET:
|
|
case TEGRA210_MIXER_AXBAR_RX1_STATUS:
|
|
case TEGRA210_MIXER_AXBAR_RX1_CIF_CTRL:
|
|
case TEGRA210_MIXER_AXBAR_RX1_CTRL:
|
|
case TEGRA210_MIXER_AXBAR_RX1_PEAK_CTRL:
|
|
case TEGRA210_MIXER_AXBAR_RX1_SAMPLE_COUNT:
|
|
|
|
case TEGRA210_MIXER_AXBAR_TX1_ENABLE:
|
|
case TEGRA210_MIXER_AXBAR_TX1_SOFT_RESET:
|
|
case TEGRA210_MIXER_AXBAR_TX1_STATUS:
|
|
case TEGRA210_MIXER_AXBAR_TX1_INT_STATUS:
|
|
case TEGRA210_MIXER_AXBAR_TX1_INT_MASK:
|
|
case TEGRA210_MIXER_AXBAR_TX1_INT_SET:
|
|
case TEGRA210_MIXER_AXBAR_TX1_INT_CLEAR:
|
|
case TEGRA210_MIXER_AXBAR_TX1_CIF_CTRL:
|
|
case TEGRA210_MIXER_AXBAR_TX1_ADDER_CONFIG:
|
|
|
|
case TEGRA210_MIXER_ENABLE:
|
|
case TEGRA210_MIXER_SOFT_RESET:
|
|
case TEGRA210_MIXER_CG:
|
|
case TEGRA210_MIXER_STATUS:
|
|
case TEGRA210_MIXER_INT_STATUS:
|
|
case TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL:
|
|
case TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_DATA:
|
|
case TEGRA210_MIXER_AHUBRAMCTL_PEAKM_RAM_CTRL:
|
|
case TEGRA210_MIXER_AHUBRAMCTL_PEAKM_RAM_DATA:
|
|
case TEGRA210_MIXER_CTRL:
|
|
return true;
|
|
default:
|
|
return false;
|
|
};
|
|
}
|
|
|
|
static bool tegra210_mixer_volatile_reg(struct device *dev,
|
|
unsigned int reg)
|
|
{
|
|
if (reg < TEGRA210_MIXER_AXBAR_RX_LIMIT)
|
|
reg %= TEGRA210_MIXER_AXBAR_RX_STRIDE;
|
|
else if (reg < TEGRA210_MIXER_AXBAR_TX_LIMIT)
|
|
reg = (reg % TEGRA210_MIXER_AXBAR_TX_STRIDE) +
|
|
TEGRA210_MIXER_AXBAR_TX1_ENABLE;
|
|
|
|
switch (reg) {
|
|
case TEGRA210_MIXER_AXBAR_RX1_SOFT_RESET:
|
|
case TEGRA210_MIXER_AXBAR_RX1_STATUS:
|
|
|
|
case TEGRA210_MIXER_AXBAR_TX1_SOFT_RESET:
|
|
case TEGRA210_MIXER_AXBAR_TX1_STATUS:
|
|
case TEGRA210_MIXER_AXBAR_TX1_INT_STATUS:
|
|
case TEGRA210_MIXER_AXBAR_TX1_INT_SET:
|
|
|
|
case TEGRA210_MIXER_SOFT_RESET:
|
|
case TEGRA210_MIXER_STATUS:
|
|
case TEGRA210_MIXER_INT_STATUS:
|
|
case TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_CTRL:
|
|
case TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_DATA:
|
|
case TEGRA210_MIXER_AHUBRAMCTL_PEAKM_RAM_CTRL:
|
|
case TEGRA210_MIXER_AHUBRAMCTL_PEAKM_RAM_DATA:
|
|
return true;
|
|
default:
|
|
return false;
|
|
};
|
|
}
|
|
|
|
static bool tegra210_mixer_precious_reg(struct device *dev,
|
|
unsigned int reg)
|
|
{
|
|
switch (reg) {
|
|
case TEGRA210_MIXER_AHUBRAMCTL_GAIN_CONFIG_RAM_DATA:
|
|
case TEGRA210_MIXER_AHUBRAMCTL_PEAKM_RAM_DATA:
|
|
return true;
|
|
default:
|
|
return false;
|
|
};
|
|
}
|
|
|
|
static const struct regmap_config tegra210_mixer_regmap_config = {
|
|
.reg_bits = 32,
|
|
.reg_stride = 4,
|
|
.val_bits = 32,
|
|
.max_register = TEGRA210_MIXER_CTRL,
|
|
.writeable_reg = tegra210_mixer_wr_reg,
|
|
.readable_reg = tegra210_mixer_rd_reg,
|
|
.volatile_reg = tegra210_mixer_volatile_reg,
|
|
.precious_reg = tegra210_mixer_precious_reg,
|
|
.reg_defaults = tegra210_mixer_reg_defaults,
|
|
.num_reg_defaults = ARRAY_SIZE(tegra210_mixer_reg_defaults),
|
|
.cache_type = REGCACHE_FLAT,
|
|
};
|
|
|
|
static const struct of_device_id tegra210_mixer_of_match[] = {
|
|
{ .compatible = "nvidia,tegra210-amixer" },
|
|
{},
|
|
};
|
|
|
|
static int tegra210_mixer_platform_probe(struct platform_device *pdev)
|
|
{
|
|
struct tegra210_mixer *mixer;
|
|
struct resource *mem;
|
|
void __iomem *regs;
|
|
int ret, i;
|
|
const struct of_device_id *match;
|
|
|
|
match = of_match_device(tegra210_mixer_of_match, &pdev->dev);
|
|
if (!match) {
|
|
dev_err(&pdev->dev, "Error: No device match found\n");
|
|
return -ENODEV;
|
|
}
|
|
|
|
mixer = devm_kzalloc(&pdev->dev, sizeof(*mixer), GFP_KERNEL);
|
|
if (!mixer)
|
|
return -ENOMEM;
|
|
|
|
mixer->gain_coeff[0] = 0;
|
|
mixer->gain_coeff[1] = 0;
|
|
mixer->gain_coeff[2] = 0;
|
|
mixer->gain_coeff[3] = 0;
|
|
mixer->gain_coeff[4] = 0;
|
|
mixer->gain_coeff[5] = 0;
|
|
mixer->gain_coeff[6] = 0;
|
|
mixer->gain_coeff[7] = 0x1000000;
|
|
mixer->gain_coeff[8] = 0;
|
|
mixer->gain_coeff[9] = 0x10000;
|
|
mixer->gain_coeff[10] = 0;
|
|
mixer->gain_coeff[11] = 0;
|
|
mixer->gain_coeff[12] = 0x400;
|
|
mixer->gain_coeff[13] = 0x8000000;
|
|
dev_set_drvdata(&pdev->dev, mixer);
|
|
|
|
for (i = 0; i < TEGRA210_MIXER_AXBAR_RX_MAX; i++)
|
|
mixer->gain_value[i] = 0x10000;
|
|
|
|
mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
regs = devm_ioremap_resource(&pdev->dev, mem);
|
|
if (IS_ERR(regs))
|
|
return PTR_ERR(regs);
|
|
mixer->regmap = devm_regmap_init_mmio(&pdev->dev, regs,
|
|
&tegra210_mixer_regmap_config);
|
|
if (IS_ERR(mixer->regmap)) {
|
|
dev_err(&pdev->dev, "regmap init failed\n");
|
|
return PTR_ERR(mixer->regmap);
|
|
}
|
|
regcache_cache_only(mixer->regmap, true);
|
|
|
|
ret = of_property_read_u32(pdev->dev.of_node,
|
|
"nvidia,ahub-amixer-id",
|
|
&pdev->dev.id);
|
|
if (ret < 0) {
|
|
dev_err(&pdev->dev, "Missing property nvidia,ahub-amixer-id\n");
|
|
return ret;
|
|
}
|
|
|
|
pm_runtime_enable(&pdev->dev);
|
|
ret = snd_soc_register_codec(&pdev->dev, &tegra210_mixer_codec,
|
|
tegra210_mixer_dais,
|
|
ARRAY_SIZE(tegra210_mixer_dais));
|
|
if (ret != 0) {
|
|
dev_err(&pdev->dev, "Could not register CODEC: %d\n", ret);
|
|
pm_runtime_disable(&pdev->dev);
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int tegra210_mixer_platform_remove(struct platform_device *pdev)
|
|
{
|
|
snd_soc_unregister_codec(&pdev->dev);
|
|
|
|
pm_runtime_disable(&pdev->dev);
|
|
if (!pm_runtime_status_suspended(&pdev->dev))
|
|
tegra210_mixer_runtime_suspend(&pdev->dev);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct dev_pm_ops tegra210_mixer_pm_ops = {
|
|
SET_RUNTIME_PM_OPS(tegra210_mixer_runtime_suspend,
|
|
tegra210_mixer_runtime_resume, NULL)
|
|
SET_LATE_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
|
|
pm_runtime_force_resume)
|
|
};
|
|
|
|
static struct platform_driver tegra210_mixer_driver = {
|
|
.driver = {
|
|
.name = DRV_NAME,
|
|
.owner = THIS_MODULE,
|
|
.of_match_table = tegra210_mixer_of_match,
|
|
.pm = &tegra210_mixer_pm_ops,
|
|
},
|
|
.probe = tegra210_mixer_platform_probe,
|
|
.remove = tegra210_mixer_platform_remove,
|
|
};
|
|
module_platform_driver(tegra210_mixer_driver);
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MODULE_AUTHOR("Arun Shamanna Lakshmi <aruns@nvidia.com>");
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MODULE_DESCRIPTION("Tegra210 MIXER ASoC driver");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("platform:" DRV_NAME);
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MODULE_DEVICE_TABLE(of, tegra210_mixer_of_match);
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