280 lines
7.4 KiB
Plaintext
280 lines
7.4 KiB
Plaintext
#include <dt-bindings/memory/tegra210-mc.h>
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/ {
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#if defined(LINUX_VERSION) && LINUX_VERSION >= 414
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pmc@7000e400 {
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powergates {
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pd_venc: venc {
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clocks = <&tegra_car TEGRA210_CLK_ISPA>,
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<&tegra_car TEGRA210_CLK_VI>,
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<&tegra_car TEGRA210_CLK_CSI>,
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<&tegra_car TEGRA210_CLK_VI_I2C>,
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<&tegra_car TEGRA210_CLK_CILAB>,
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<&tegra_car TEGRA210_CLK_CILCD>,
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<&tegra_car TEGRA210_CLK_CILE>;
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resets = <&tegra_mc TEGRA210_MC_RESET_ISP2>,
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<&tegra_mc TEGRA210_MC_RESET_VI>,
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<&tegra_car TEGRA210_CLK_ISPA>,
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<&tegra_car TEGRA210_RST_VI>,
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<&tegra_car TEGRA210_CLK_CSI>,
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<&tegra_car TEGRA210_CLK_VI_I2C>;
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#power-domain-cells = <0>;
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};
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pd_pcie: pcie {
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clocks = <&tegra_car TEGRA210_CLK_AFI>,
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<&tegra_car TEGRA210_CLK_PCIE>;
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resets = <&tegra_mc TEGRA210_MC_RESET_AFI>,
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<&tegra_car TEGRA210_CLK_AFI>,
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<&tegra_car TEGRA210_CLK_PCIE>,
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<&tegra_car 74>; /* PCIEX */
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#power-domain-cells = <0>;
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};
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pd_nvenc: mpe {
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clocks = <&tegra_car TEGRA210_CLK_NVENC>;
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resets = <&tegra_mc TEGRA210_MC_RESET_NVENC>,
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<&tegra_car TEGRA210_CLK_NVENC>;
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#power-domain-cells = <0>;
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};
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pd_sata: sata {
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clocks = <&tegra_car TEGRA210_CLK_SATA_OOB>,
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<&tegra_car TEGRA210_CLK_CML1>,
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<&tegra_car TEGRA210_CLK_SATA>;
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resets = <&tegra_mc TEGRA210_MC_RESET_SATA>,
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<&tegra_car TEGRA210_CLK_SATA_OOB>,
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<&tegra_car TEGRA210_CLK_SATA_COLD>,
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<&tegra_car TEGRA210_CLK_SATA>;
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#power-domain-cells = <0>;
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};
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pd_sor: sor {
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clocks = <&tegra_car TEGRA210_CLK_SOR0>,
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<&tegra_car TEGRA210_CLK_DSIA>,
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<&tegra_car TEGRA210_CLK_DSIB>,
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<&tegra_car TEGRA210_CLK_SOR1>,
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<&tegra_car TEGRA210_CLK_MIPI_CAL>,
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<&tegra_car TEGRA210_CLK_DPAUX>,
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<&tegra_car TEGRA210_CLK_DPAUX1>;
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resets = <&tegra_car TEGRA210_CLK_SOR0>,
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<&tegra_car TEGRA210_CLK_DISP1>,
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<&tegra_car TEGRA210_CLK_DSIB>,
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<&tegra_car TEGRA210_CLK_SOR1>,
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<&tegra_car TEGRA210_CLK_MIPI_CAL>;
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#power-domain-cells = <0>;
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};
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pd_dis: dis {
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clocks = <&tegra_car TEGRA210_CLK_DISP1>;
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resets = <&tegra_mc TEGRA210_MC_RESET_DC>,
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<&tegra_car TEGRA210_CLK_DISP1>;
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#power-domain-cells = <0>;
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};
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pd_disb: disb {
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clocks = <&tegra_car TEGRA210_CLK_DISP2>;
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resets = <&tegra_mc TEGRA210_MC_RESET_DCB>,
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<&tegra_car TEGRA210_CLK_DISP2>;
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#power-domain-cells = <0>;
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};
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pd_xusbss: xusba {
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clocks = <&tegra_car TEGRA210_CLK_XUSB_SS>,
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<&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>,
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<&tegra_car TEGRA210_CLK_XUSB_HS_SRC>,
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<&tegra_car TEGRA210_CLK_XUSB_FS_SRC>,
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<&tegra_car TEGRA210_CLK_XUSB_DEV_SRC>;
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resets = <&tegra_car TEGRA210_CLK_XUSB_SS>;
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#power-domain-cells = <0>;
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};
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pd_xusbdev: xusbb {
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clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>;
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resets = <&tegra_mc TEGRA210_MC_RESET_XUSB_DEV>,
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<&tegra_car 95>; /* bit affects xusb_dev and xusb_dev_src */
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#power-domain-cells = <0>;
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};
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pd_xusbhost: xusbc {
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clocks = <&tegra_car TEGRA210_CLK_XUSB_HOST>;
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resets = <&tegra_mc TEGRA210_MC_RESET_XUSB_HOST>,
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<&tegra_car TEGRA210_CLK_XUSB_HOST>;
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#power-domain-cells = <0>;
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};
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pd_vic: vic {
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clocks = <&tegra_car TEGRA210_CLK_VIC03>;
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resets = <&tegra_mc TEGRA210_MC_RESET_VIC>,
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<&tegra_car TEGRA210_CLK_VIC03>;
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#power-domain-cells = <0>;
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};
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pd_nvdec: nvdec {
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clocks = <&tegra_car TEGRA210_CLK_NVDEC>;
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resets = <&tegra_mc TEGRA210_MC_RESET_NVDEC>,
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<&tegra_car TEGRA210_CLK_NVDEC>;
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#power-domain-cells = <0>;
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};
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pd_nvjpg: nvjpg {
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clocks = <&tegra_car TEGRA210_CLK_NVJPG>;
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resets = <&tegra_mc TEGRA210_MC_RESET_NVJPG>,
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<&tegra_car TEGRA210_CLK_NVJPG>;
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#power-domain-cells = <0>;
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};
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pd_audio: aud {
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clocks = <&tegra_car TEGRA210_CLK_APE>,
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<&tegra_car TEGRA210_CLK_APB2APE>;
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resets = <&tegra_mc TEGRA210_MC_RESET_APE>,
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<&tegra_car TEGRA210_CLK_APE>;
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#power-domain-cells = <0>;
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};
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pd_ve2: ve2 {
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clocks = <&tegra_car TEGRA210_CLK_ISPB>;
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resets = <&tegra_mc TEGRA210_MC_RESET_ISP2B>,
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<&tegra_car TEGRA210_CLK_ISPB>;
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#power-domain-cells = <0>;
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};
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};
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};
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#endif
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power-domain {
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compatible = "tegra-power-domains";
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host1x_pd: host1x-pd {
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compatible = "nvidia,tegra210-host1x-pd";
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is_off;
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host1x;
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#power-domain-cells = <0>;
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};
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#if defined(LINUX_VERSION) && LINUX_VERSION < 414
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pd_audio: ape-pd {
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compatible = "nvidia,tegra210-ape-pd";
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is_off;
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#power-domain-cells = <0>;
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partition-id = <TEGRA210_POWER_DOMAIN_APE>;
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clocks = <&tegra_car TEGRA210_CLK_APE>,
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<&tegra_car TEGRA210_CLK_APB2APE>,
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<&tegra_car TEGRA210_CLK_ADSP >;
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clock-names = "ape", "apb2ape", "adsp";
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};
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adsp_pd: adsp-pd {
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compatible = "nvidia,tegra210-adsp-pd";
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is_off;
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#power-domain-cells = <0>;
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power-domains = <&pd_audio>;
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};
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tsec_pd: tsec-pd {
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compatible = "nvidia,tegra210-tsec-pd";
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is_off;
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#power-domain-cells = <0>;
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power-domains = <&host1x_pd>;
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};
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pd_nvdec: nvdec-pd {
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compatible = "nvidia,tegra210-nvdec-pd";
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is_off;
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#power-domain-cells = <0>;
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power-domains = <&host1x_pd>;
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partition-id = <TEGRA210_POWER_DOMAIN_NVDEC>;
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};
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pd_ve2: ve2-pd {
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compatible = "nvidia,tegra210-ve2-pd";
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is_off;
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#power-domain-cells = <0>;
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power-domains = <&host1x_pd>;
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partition-id = <TEGRA210_POWER_DOMAIN_VE2>;
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};
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pd_vic: vic03-pd {
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compatible = "nvidia,tegra210-vic03-pd";
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is_off;
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#power-domain-cells = <0>;
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power-domains = <&host1x_pd>;
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partition-id = <TEGRA210_POWER_DOMAIN_VIC>;
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};
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pd_nvenc: msenc-pd {
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compatible = "nvidia,tegra210-msenc-pd";
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is_off;
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#power-domain-cells = <0>;
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power-domains = <&host1x_pd>;
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partition-id = <TEGRA210_POWER_DOMAIN_MPE>;
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};
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pd_nvjpg: nvjpg-pd {
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compatible = "nvidia,tegra210-nvjpg-pd";
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is_off;
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#power-domain-cells = <0>;
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power-domains = <&host1x_pd>;
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partition-id = <TEGRA210_POWER_DOMAIN_NVJPG>;
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};
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pd_pcie: pcie-pd {
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compatible = "nvidia,tegra210-pcie-pd";
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is_off;
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#power-domain-cells = <0>;
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partition-id = <TEGRA210_POWER_DOMAIN_PCIE>;
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};
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#endif
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ve_pd: ve-pd {
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compatible = "nvidia,tegra210-ve-pd";
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is_off;
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#power-domain-cells = <0>;
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power-domains = <&host1x_pd>;
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partition-id = <TEGRA210_POWER_DOMAIN_VENC>;
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};
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sata_pd: sata-pd {
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compatible = "nvidia,tegra210-sata-pd";
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#power-domain-cells = <0>;
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partition-id = <TEGRA210_POWER_DOMAIN_SATA>;
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};
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sor_pd: sor-pd {
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compatible = "nvidia,tegra210-sor-pd";
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#power-domain-cells = <0>;
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partition-id = <TEGRA210_POWER_DOMAIN_SOR>;
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};
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disa_pd: disa-pd {
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compatible = "nvidia,tegra210-disa-pd";
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#power-domain-cells = <0>;
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partition-id = <TEGRA210_POWER_DOMAIN_DISA>;
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};
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disb_pd: disb-pd {
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compatible = "nvidia,tegra210-disb-pd";
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#power-domain-cells = <0>;
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partition-id = <TEGRA210_POWER_DOMAIN_DISB>;
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};
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xusba_pd: xusba-pd {
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compatible = "nvidia,tegra210-xusba-pd";
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#power-domain-cells = <0>;
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partition-id = <TEGRA210_POWER_DOMAIN_XUSBA>;
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};
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xusbb_pd: xusbb-pd {
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compatible = "nvidia,tegra210-xusbb-pd";
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#power-domain-cells = <0>;
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partition-id = <TEGRA210_POWER_DOMAIN_XUSBB>;
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};
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xusbc_pd: xusbc-pd {
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compatible = "nvidia,tegra210-xusbc-pd";
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#power-domain-cells = <0>;
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partition-id = <TEGRA210_POWER_DOMAIN_XUSBC>;
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};
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};
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};
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