181 lines
5.2 KiB
C
181 lines
5.2 KiB
C
/*
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* include/dt-bindings/display/tegra-panel.h
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*
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* Copyright (c) 2013-2017, NVIDIA CORPORATION. All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef __TEGRA_PANEL_H
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#define __TEGRA_PANEL_H
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#define DEFAULT_FPGA_FREQ_KHZ 160000
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#define DSI_VS_0 0
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#define DSI_VS_1 1
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#define TEGRA_DSI_VIDEO_NONE_BURST_MODE 0
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#define TEGRA_DSI_VIDEO_NONE_BURST_MODE_WITH_SYNC_END 1
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#define TEGRA_DSI_VIDEO_BURST_MODE_LOWEST_SPEED 2
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#define TEGRA_DSI_VIDEO_BURST_MODE_LOW_SPEED 3
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#define TEGRA_DSI_VIDEO_BURST_MODE_MEDIUM_SPEED 4
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#define TEGRA_DSI_VIDEO_BURST_MODE_FAST_SPEED 5
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#define TEGRA_DSI_VIDEO_BURST_MODE_FASTEST_SPEED 6
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#define TEGRA_DSI_GANGED_SYMMETRIC_LEFT_RIGHT 1
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#define TEGRA_DSI_GANGED_SYMMETRIC_EVEN_ODD 2
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#define TEGRA_DSI_GANGED_SYMMETRIC_LEFT_RIGHT_OVERLAP 3
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#define TEGRA_DSI_SPLIT_LINK_A_B 1
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#define TEGRA_DSI_SPLIT_LINK_C_D 2
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#define TEGRA_DSI_SPLIT_LINK_A_B_C_D 3
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#define TEGRA_DSI_PACKET_CMD 0
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#define TEGRA_DSI_DELAY_MS 1
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#define TEGRA_DSI_GPIO_SET 2
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#define TEGRA_DSI_SEND_FRAME 3
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#define TEGRA_DSI_PACKET_VIDEO_VBLANK_CMD 4
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#define TEGRA_DSI_DELAY_US 5
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#define TEGRA_DSI_LINK0 0
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#define TEGRA_DSI_LINK1 1
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#define TEGRA_DSI_PIXEL_FORMAT_16BIT_P 0
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#define TEGRA_DSI_PIXEL_FORMAT_18BIT_P 1
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#define TEGRA_DSI_PIXEL_FORMAT_18BIT_NP 2
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#define TEGRA_DSI_PIXEL_FORMAT_24BIT_P 3
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#define TEGRA_DSI_PIXEL_FORMAT_8BIT_DSC 4
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#define TEGRA_DSI_PIXEL_FORMAT_12BIT_DSC 5
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#define TEGRA_DSI_PIXEL_FORMAT_16BIT_DSC 6
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#define TEGRA_DSI_VIRTUAL_CHANNEL_0 0
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#define TEGRA_DSI_VIRTUAL_CHANNEL_1 1
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#define TEGRA_DSI_VIRTUAL_CHANNEL_2 2
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#define TEGRA_DSI_VIRTUAL_CHANNEL_3 3
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#define TEGRA_DSI_VIDEO_TYPE_VIDEO_MODE 0
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#define TEGRA_DSI_VIDEO_TYPE_COMMAND_MODE 1
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#define TEGRA_DSI_VIDEO_CLOCK_CONTINUOUS 0
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#define TEGRA_DSI_VIDEO_CLOCK_TX_ONLY 1
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#define CMD_NOT_CLUBBED 0
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#define CMD_CLUBBED 1
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#define DSI_GENERIC_LONG_WRITE 0x29
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#define DSI_DCS_LONG_WRITE 0x39
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#define DSI_GENERIC_SHORT_WRITE_1_PARAMS 0x13
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#define DSI_GENERIC_SHORT_WRITE_2_PARAMS 0x23
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#define DSI_DCS_WRITE_0_PARAM 0x05
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#define DSI_DCS_WRITE_1_PARAM 0x15
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#define DSI_DCS_SET_ADDR_MODE 0x36
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#define DSI_DCS_EXIT_SLEEP_MODE 0x11
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#define DSI_DCS_ENTER_SLEEP_MODE 0x10
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#define DSI_DCS_SET_DISPLAY_ON 0x29
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#define DSI_DCS_SET_DISPLAY_OFF 0x28
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#define DSI_DCS_SET_TEARING_EFFECT_OFF 0x34
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#define DSI_DCS_SET_TEARING_EFFECT_ON 0x35
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#define DSI_DCS_NO_OP 0x0
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#define DSI_NULL_PKT_NO_DATA 0x9
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#define DSI_BLANKING_PKT_NO_DATA 0x19
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#define PKT_LP 0x40000000
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#define CMD_VS 0x01
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#define CMD_VE 0x11
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#define CMD_HS 0x21
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#define CMD_HE 0x31
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#define CMD_EOT 0x08
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#define CMD_NULL 0x09
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#define CMD_SHORTW 0x15
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#define CMD_BLNK 0x19
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#define CMD_LONGW 0x39
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#define CMD_CMPR_PIXEL_STREAM 0x0B
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#define CMD_RGB 0x00
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#define CMD_RGB_16BPP 0x0E
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#define CMD_RGB_18BPP 0x1E
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#define CMD_RGB_18BPPNP 0x2E
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#define CMD_RGB_24BPP 0x3E
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#define LINE_STOP 0xff
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#define LEN_SHORT 0
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#define LEN_HSYNC 1
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#define LEN_HBP 2
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#define LEN_HACTIVE3 3
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#define LEN_HFP 4
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#define LEN_HACTIVE5 5
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#define TEGRA_DSI_DISABLE 0
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#define TEGRA_DSI_ENABLE 1
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#define TEGRA_HDMI_DISABLE 0
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#define TEGRA_HDMI_ENABLE 1
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#define NUMOF_PKT_SEQ 12
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#ifndef CONFIG_TEGRA_NVDISPLAY
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#define DSI_INSTANCE_0 0
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#define DSI_INSTANCE_1 1
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#else
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/* T186 has 4 controllers. DSI-A and DSI-C are the main controllers
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needed for ganged mode */
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#define DSI_INSTANCE_0 0
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#define DSI_INSTANCE_1 2
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#endif
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/* Aggressiveness level of DSI suspend. The higher, the more aggressive. */
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#define DSI_NO_SUSPEND 0
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#define DSI_HOST_SUSPEND_LV0 1
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#define DSI_HOST_SUSPEND_LV1 2
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#define DSI_HOST_SUSPEND_LV2 3
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/*
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* DPD (deep power down) mode for dsi pads.
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*/
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#define DSI_DPD_EN (1 << 0)
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#define DSIB_DPD_EN (1 << 1)
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#define DSIC_DPD_EN (1 << 2)
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#define DSID_DPD_EN (1 << 3)
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#define DRIVE_CURRENT_L0 0
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#define DRIVE_CURRENT_L1 1
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#define DRIVE_CURRENT_L2 2
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#define DRIVE_CURRENT_L3 3
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#define PRE_EMPHASIS_L0 0
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#define PRE_EMPHASIS_L1 1
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#define PRE_EMPHASIS_L2 2
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#define PRE_EMPHASIS_L3 3
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#define POST_CURSOR2_L0 0
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#define POST_CURSOR2_L1 1
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#define POST_CURSOR2_L2 2
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#define POST_CURSOR2_L3 3
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#define SOR_LINK_SPEED_G1_62 6
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#define SOR_LINK_SPEED_G2_7 10
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#define SOR_LINK_SPEED_G5_4 20
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#define SOR_LINK_SPEED_LVDS 7
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#endif /* __TEGRA_PANEL_H */
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