269 lines
7.4 KiB
Plaintext
269 lines
7.4 KiB
Plaintext
Hisilicon Platforms Device Tree Bindings
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----------------------------------------------------
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Hi4511 Board
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Required root node properties:
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- compatible = "hisilicon,hi3620-hi4511";
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Hi6220 SoC
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Required root node properties:
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- compatible = "hisilicon,hi6220";
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HiKey Board
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Required root node properties:
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- compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
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HiP01 ca9x2 Board
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Required root node properties:
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- compatible = "hisilicon,hip01-ca9x2";
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HiP04 D01 Board
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Required root node properties:
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- compatible = "hisilicon,hip04-d01";
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HiP05 D02 Board
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Required root node properties:
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- compatible = "hisilicon,hip05-d02";
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HiP06 D03 Board
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Required root node properties:
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- compatible = "hisilicon,hip06-d03";
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Hisilicon system controller
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Required properties:
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- compatible : "hisilicon,sysctrl"
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- reg : Register address and size
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Optional properties:
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- smp-offset : offset in sysctrl for notifying slave cpu booting
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cpu 1, reg;
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cpu 2, reg + 0x4;
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cpu 3, reg + 0x8;
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If reg value is not zero, cpun exit wfi and go
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- resume-offset : offset in sysctrl for notifying cpu0 when resume
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- reboot-offset : offset in sysctrl for system reboot
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Example:
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/* for Hi3620 */
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sysctrl: system-controller@fc802000 {
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compatible = "hisilicon,sysctrl";
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reg = <0xfc802000 0x1000>;
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smp-offset = <0x31c>;
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resume-offset = <0x308>;
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reboot-offset = <0x4>;
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};
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-----------------------------------------------------------------------
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Hisilicon Hi6220 system controller
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Required properties:
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- compatible : "hisilicon,hi6220-sysctrl"
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- reg : Register address and size
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- #clock-cells: should be set to 1, many clock registers are defined
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under this controller and this property must be present.
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Hisilicon designs this controller as one of the system controllers,
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its main functions are the same as Hisilicon system controller, but
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the register offset of some core modules are different.
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Example:
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/*for Hi6220*/
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sys_ctrl: sys_ctrl@f7030000 {
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compatible = "hisilicon,hi6220-sysctrl", "syscon";
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reg = <0x0 0xf7030000 0x0 0x2000>;
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#clock-cells = <1>;
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};
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Hisilicon Hi6220 Power Always ON domain controller
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Required properties:
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- compatible : "hisilicon,hi6220-aoctrl"
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- reg : Register address and size
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- #clock-cells: should be set to 1, many clock registers are defined
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under this controller and this property must be present.
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Hisilicon designs this system controller to control the power always
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on domain for mobile platform.
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Example:
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/*for Hi6220*/
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ao_ctrl: ao_ctrl@f7800000 {
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compatible = "hisilicon,hi6220-aoctrl", "syscon";
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reg = <0x0 0xf7800000 0x0 0x2000>;
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#clock-cells = <1>;
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};
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Hisilicon Hi6220 Media domain controller
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Required properties:
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- compatible : "hisilicon,hi6220-mediactrl"
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- reg : Register address and size
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- #clock-cells: should be set to 1, many clock registers are defined
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under this controller and this property must be present.
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Hisilicon designs this system controller to control the multimedia
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domain(e.g. codec, G3D ...) for mobile platform.
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Example:
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/*for Hi6220*/
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media_ctrl: media_ctrl@f4410000 {
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compatible = "hisilicon,hi6220-mediactrl", "syscon";
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reg = <0x0 0xf4410000 0x0 0x1000>;
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#clock-cells = <1>;
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};
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Hisilicon Hi6220 Power Management domain controller
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Required properties:
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- compatible : "hisilicon,hi6220-pmctrl"
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- reg : Register address and size
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- #clock-cells: should be set to 1, some clock registers are define
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under this controller and this property must be present.
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Hisilicon designs this system controller to control the power management
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domain for mobile platform.
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Example:
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/*for Hi6220*/
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pm_ctrl: pm_ctrl@f7032000 {
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compatible = "hisilicon,hi6220-pmctrl", "syscon";
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reg = <0x0 0xf7032000 0x0 0x1000>;
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#clock-cells = <1>;
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};
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Hisilicon Hi6220 SRAM controller
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Required properties:
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- compatible : "hisilicon,hi6220-sramctrl", "syscon"
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- reg : Register address and size
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Hisilicon's SoCs use sram for multiple purpose; on Hi6220 there have several
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SRAM banks for power management, modem, security, etc. Further, use "syscon"
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managing the common sram which can be shared by multiple modules.
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Example:
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/*for Hi6220*/
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sram: sram@fff80000 {
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compatible = "hisilicon,hi6220-sramctrl", "syscon";
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reg = <0x0 0xfff80000 0x0 0x12000>;
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};
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-----------------------------------------------------------------------
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Hisilicon HiP01 system controller
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Required properties:
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- compatible : "hisilicon,hip01-sysctrl"
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- reg : Register address and size
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The HiP01 system controller is mostly compatible with hisilicon
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system controller,but it has some specific control registers for
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HIP01 SoC family, such as slave core boot, and also some same
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registers located at different offset.
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Example:
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/* for hip01-ca9x2 */
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sysctrl: system-controller@10000000 {
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compatible = "hisilicon,hip01-sysctrl", "hisilicon,sysctrl";
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reg = <0x10000000 0x1000>;
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reboot-offset = <0x4>;
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};
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-----------------------------------------------------------------------
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Hisilicon HiP05/HiP06 PCIe-SAS sub system controller
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Required properties:
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- compatible : "hisilicon,pcie-sas-subctrl", "syscon";
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- reg : Register address and size
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The PCIe-SAS sub system controller is shared by PCIe and SAS controllers in
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HiP05 or HiP06 Soc to implement some basic configurations.
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Example:
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/* for HiP05 PCIe-SAS sub system */
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pcie_sas: system_controller@b0000000 {
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compatible = "hisilicon,pcie-sas-subctrl", "syscon";
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reg = <0xb0000000 0x10000>;
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};
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Hisilicon HiP05/HiP06 PERI sub system controller
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Required properties:
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- compatible : "hisilicon,peri-subctrl", "syscon";
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- reg : Register address and size
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The PERI sub system controller is shared by peripheral controllers in
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HiP05 or HiP06 Soc to implement some basic configurations. The peripheral
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controllers include mdio, ddr, iic, uart, timer and so on.
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Example:
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/* for HiP05 sub peri system */
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peri_c_subctrl: syscon@80000000 {
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compatible = "hisilicon,peri-subctrl", "syscon";
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reg = <0x0 0x80000000 0x0 0x10000>;
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};
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Hisilicon HiP05/HiP06 DSA sub system controller
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Required properties:
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- compatible : "hisilicon,dsa-subctrl", "syscon";
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- reg : Register address and size
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The DSA sub system controller is shared by peripheral controllers in
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HiP05 or HiP06 Soc to implement some basic configurations.
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Example:
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/* for HiP05 dsa sub system */
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pcie_sas: system_controller@a0000000 {
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compatible = "hisilicon,dsa-subctrl", "syscon";
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reg = <0xa0000000 0x10000>;
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};
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-----------------------------------------------------------------------
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Hisilicon CPU controller
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Required properties:
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- compatible : "hisilicon,cpuctrl"
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- reg : Register address and size
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The clock registers and power registers of secondary cores are defined
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in CPU controller, especially in HIX5HD2 SoC.
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-----------------------------------------------------------------------
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PCTRL: Peripheral misc control register
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Required Properties:
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- compatible: "hisilicon,pctrl"
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- reg: Address and size of pctrl.
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Example:
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/* for Hi3620 */
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pctrl: pctrl@fca09000 {
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compatible = "hisilicon,pctrl";
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reg = <0xfca09000 0x1000>;
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};
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-----------------------------------------------------------------------
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Fabric:
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Required Properties:
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- compatible: "hisilicon,hip04-fabric";
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- reg: Address and size of Fabric
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-----------------------------------------------------------------------
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Bootwrapper boot method (software protocol on SMP):
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Required Properties:
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- compatible: "hisilicon,hip04-bootwrapper";
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- boot-method: Address and size of boot method.
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[0]: bootwrapper physical address
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[1]: bootwrapper size
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[2]: relocation physical address
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[3]: relocation size
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