19 lines
558 B
Plaintext
19 lines
558 B
Plaintext
NVIDIA Tegra30 MC(Memory Controller)
|
|
|
|
Required properties:
|
|
- compatible : "nvidia,tegra30-mc"
|
|
- reg : Should contain 4 register ranges(address and length); see the
|
|
example below. Note that the MC registers are interleaved with the
|
|
SMMU registers, and hence must be represented as multiple ranges.
|
|
- interrupts : Should contain MC General interrupt.
|
|
|
|
Example:
|
|
memory-controller {
|
|
compatible = "nvidia,tegra30-mc";
|
|
reg = <0x7000f000 0x010
|
|
0x7000f03c 0x1b4
|
|
0x7000f200 0x028
|
|
0x7000f284 0x17c>;
|
|
interrupts = <0 77 0x04>;
|
|
};
|