71 lines
2.5 KiB
Plaintext
71 lines
2.5 KiB
Plaintext
ARM System Controller ICST clocks
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The ICS525 and ICS307 oscillators are produced by Integrated Devices
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Technology (IDT). ARM integrated these oscillators deeply into their
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reference designs by adding special control registers that manage such
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oscillators to their system controllers.
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The various ARM system controllers contain logic to serialize and initialize
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an ICST clock request after a write to the 32 bit register at an offset
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into the system controller. Furthermore, to even be able to alter one of
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these frequencies, the system controller must first be unlocked by
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writing a special token to another offset in the system controller.
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Some ARM hardware contain special versions of the serial interface that only
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connects the low 8 bits of the VDW (missing one bit), hardwires RDW to
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different values and sometimes also hardwire the output divider. They
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therefore have special compatible strings as per this table (the OD value is
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the value on the pins, not the resulting output divider):
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Hardware variant: RDW OD VDW
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Integrator/AP 22 1 Bit 8 0, rest variable
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integratorap-cm
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Integrator/AP 46 3 Bit 8 0, rest variable
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integratorap-sys
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Integrator/AP 22 or 1 17 or (33 or 25 MHz)
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integratorap-pci 14 1 14
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Integrator/CP 22 variable Bit 8 0, rest variable
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integratorcp-cm-core
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Integrator/CP 22 variable Bit 8 0, rest variable
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integratorcp-cm-mem
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The ICST oscillator must be provided inside a system controller node.
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Required properties:
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- compatible: must be one of
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"arm,syscon-icst525"
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"arm,syscon-icst307"
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"arm,syscon-icst525-integratorap-cm"
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"arm,syscon-icst525-integratorap-sys"
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"arm,syscon-icst525-integratorap-pci"
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"arm,syscon-icst525-integratorcp-cm-core"
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"arm,syscon-icst525-integratorcp-cm-mem"
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- lock-offset: the offset address into the system controller where the
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unlocking register is located
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- vco-offset: the offset address into the system controller where the
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ICST control register is located (even 32 bit address)
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- #clock-cells: must be <0>
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- clocks: parent clock, since the ICST needs a parent clock to derive its
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frequency from, this attribute is compulsory.
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Example:
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syscon: syscon@10000000 {
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compatible = "syscon";
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reg = <0x10000000 0x1000>;
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oscclk0: osc0@0c {
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compatible = "arm,syscon-icst307";
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#clock-cells = <0>;
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lock-offset = <0x20>;
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vco-offset = <0x0c>;
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clocks = <&xtal24mhz>;
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};
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(...)
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};
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