114 lines
3.7 KiB
Plaintext
114 lines
3.7 KiB
Plaintext
* STMicroelectronics sdhci-st MMC/SD controller
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This file documents the differences between the core properties in
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Documentation/devicetree/bindings/mmc/mmc.txt and the properties
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used by the sdhci-st driver.
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Required properties:
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- compatible: Must be "st,sdhci" and it can be compatible to "st,sdhci-stih407"
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to set the internal glue logic used for configuring the MMC
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subsystem (mmcss) inside the FlashSS (available in STiH407 SoC
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family).
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- clock-names: Should be "mmc" and "icn". (NB: The latter is not compulsory)
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See: Documentation/devicetree/bindings/resource-names.txt
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- clocks: Phandle to the clock.
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See: Documentation/devicetree/bindings/clock/clock-bindings.txt
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- interrupts: One mmc interrupt should be described here.
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- interrupt-names: Should be "mmcirq".
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- pinctrl-names: A pinctrl state names "default" must be defined.
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- pinctrl-0: Phandle referencing pin configuration of the sd/emmc controller.
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See: Documentation/devicetree/bindings/pinctrl/pinctrl-binding.txt
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- reg: This must provide the host controller base address and it can also
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contain the FlashSS Top register for TX/RX delay used by the driver
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to configure DLL inside the flashSS, if so reg-names must also be
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specified.
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Optional properties:
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- reg-names: Should be "mmc" and "top-mmc-delay". "top-mmc-delay" is optional
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for eMMC on stih407 family silicon to configure DLL inside FlashSS.
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- non-removable: Non-removable slot. Also used for configuring mmcss in STiH407 SoC
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family.
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See: Documentation/devicetree/bindings/mmc/mmc.txt.
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- bus-width: Number of data lines.
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See: Documentation/devicetree/bindings/mmc/mmc.txt.
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- max-frequency: Can be 200MHz, 100Mz or 50MHz (default) and used for
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configuring the CCONFIG3 in the mmcss.
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See: Documentation/devicetree/bindings/mmc/mmc.txt.
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- resets: Phandle and reset specifier pair to softreset line of HC IP.
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See: Documentation/devicetree/bindings/reset/reset.txt
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- vqmmc-supply: Phandle to the regulator dt node, mentioned as the vcc/vdd
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supply in eMMC/SD specs.
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- sd-uhs-sdr50: To enable the SDR50 in the mmcss.
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See: Documentation/devicetree/bindings/mmc/mmc.txt.
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- sd-uhs-sdr104: To enable the SDR104 in the mmcss.
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See: Documentation/devicetree/bindings/mmc/mmc.txt.
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- sd-uhs-ddr50: To enable the DDR50 in the mmcss.
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See: Documentation/devicetree/bindings/mmc/mmc.txt.
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Example:
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/* Example stih416e eMMC configuration */
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mmc0: sdhci@fe81e000 {
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compatible = "st,sdhci";
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status = "disabled";
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reg = <0xfe81e000 0x1000>;
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interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>;
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interrupt-names = "mmcirq";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_mmc0>;
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clock-names = "mmc";
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clocks = <&clk_s_a1_ls 1>;
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bus-width = <8>
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/* Example SD stih407 family configuration */
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mmc1: sdhci@09080000 {
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compatible = "st,sdhci-stih407", "st,sdhci";
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status = "disabled";
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reg = <0x09080000 0x7ff>;
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reg-names = "mmc";
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interrupts = <GIC_SPI 90 IRQ_TYPE_NONE>;
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interrupt-names = "mmcirq";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sd1>;
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clock-names = "mmc";
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clocks = <&clk_s_c0_flexgen CLK_MMC_1>;
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resets = <&softreset STIH407_MMC1_SOFTRESET>;
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bus-width = <4>;
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};
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/* Example eMMC stih407 family configuration */
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mmc0: sdhci@09060000 {
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compatible = "st,sdhci-stih407", "st,sdhci";
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status = "disabled";
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reg = <0x09060000 0x7ff>, <0x9061008 0x20>;
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reg-names = "mmc", "top-mmc-delay";
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interrupts = <GIC_SPI 92 IRQ_TYPE_NONE>;
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interrupt-names = "mmcirq";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_mmc0>;
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clock-names = "mmc";
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clocks = <&clk_s_c0_flexgen CLK_MMC_0>;
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vqmmc-supply = <&vmmc_reg>;
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max-frequency = <200000000>;
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bus-width = <8>;
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non-removable;
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sd-uhs-sdr50;
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sd-uhs-sdr104;
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sd-uhs-ddr50;
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};
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