38 lines
1.2 KiB
Plaintext
38 lines
1.2 KiB
Plaintext
NVIDIA Tegra20/Tegra30 high speed (DMA based) UART controller driver.
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Required properties:
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- compatible : should be "nvidia,tegra30-hsuart", "nvidia,tegra20-hsuart".
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- reg: Should contain UART controller registers location and length.
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- interrupts: Should contain UART controller interrupts.
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- clocks: Must contain one entry, for the module clock.
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See ../clocks/clock-bindings.txt for details.
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- resets : Must contain an entry for each entry in reset-names.
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See ../reset/reset.txt for details.
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- reset-names : Must include the following entries:
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- serial
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- dmas : Must contain an entry for each entry in clock-names.
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See ../dma/dma.txt for details.
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- dma-names : Must include the following entries:
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- rx
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- tx
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Optional properties:
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- nvidia,enable-modem-interrupt: Enable modem interrupts. Should be enable
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only if all 8 lines of UART controller are pinmuxed.
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Example:
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serial@70006000 {
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compatible = "nvidia,tegra30-hsuart", "nvidia,tegra20-hsuart";
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reg = <0x70006000 0x40>;
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reg-shift = <2>;
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interrupts = <0 36 0x04>;
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nvidia,enable-modem-interrupt;
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clocks = <&tegra_car 6>;
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resets = <&tegra_car 6>;
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reset-names = "serial";
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dmas = <&apbdma 8>, <&apbdma 8>;
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dma-names = "rx", "tx";
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status = "disabled";
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};
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