395 lines
6.5 KiB
Plaintext
395 lines
6.5 KiB
Plaintext
/*
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* Copyright (C) 2011 - 2014 Xilinx
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* Copyright (C) 2012 National Instruments Corp.
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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/dts-v1/;
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/include/ "zynq-7000.dtsi"
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/ {
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model = "Zynq ZC702 Development Board";
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compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000";
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aliases {
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ethernet0 = &gem0;
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i2c0 = &i2c0;
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serial0 = &uart1;
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};
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memory {
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device_type = "memory";
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reg = <0x0 0x40000000>;
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};
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chosen {
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bootargs = "earlycon";
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stdout-path = "serial0:115200n8";
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};
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gpio-keys {
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compatible = "gpio-keys";
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#address-cells = <1>;
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#size-cells = <0>;
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autorepeat;
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sw14 {
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label = "sw14";
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gpios = <&gpio0 12 0>;
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linux,code = <108>; /* down */
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wakeup-source;
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autorepeat;
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};
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sw13 {
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label = "sw13";
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gpios = <&gpio0 14 0>;
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linux,code = <103>; /* up */
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wakeup-source;
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autorepeat;
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};
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};
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leds {
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compatible = "gpio-leds";
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ds23 {
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label = "ds23";
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gpios = <&gpio0 10 0>;
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linux,default-trigger = "heartbeat";
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};
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};
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usb_phy0: phy0 {
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compatible = "usb-nop-xceiv";
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#phy-cells = <0>;
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};
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};
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&amba {
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ocm: sram@fffc0000 {
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compatible = "mmio-sram";
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reg = <0xfffc0000 0x10000>;
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};
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};
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&can0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_can0_default>;
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};
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&clkc {
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ps-clk-frequency = <33333333>;
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};
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&gem0 {
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status = "okay";
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phy-mode = "rgmii-id";
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phy-handle = <ðernet_phy>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gem0_default>;
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ethernet_phy: ethernet-phy@7 {
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reg = <7>;
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};
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};
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&gpio0 {
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_gpio0_default>;
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};
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&i2c0 {
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status = "okay";
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clock-frequency = <400000>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_i2c0_default>;
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i2cswitch@74 {
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compatible = "nxp,pca9548";
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0x74>;
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i2c@0 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <0>;
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si570: clock-generator@5d {
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#clock-cells = <0>;
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compatible = "silabs,si570";
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temperature-stability = <50>;
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reg = <0x5d>;
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factory-fout = <156250000>;
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clock-frequency = <148500000>;
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};
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};
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i2c@2 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <2>;
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eeprom@54 {
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compatible = "at,24c08";
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reg = <0x54>;
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};
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};
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i2c@3 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <3>;
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gpio@21 {
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compatible = "ti,tca6416";
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reg = <0x21>;
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gpio-controller;
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#gpio-cells = <2>;
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};
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};
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i2c@4 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <4>;
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rtc@51 {
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compatible = "nxp,pcf8563";
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reg = <0x51>;
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};
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};
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i2c@7 {
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#address-cells = <1>;
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#size-cells = <0>;
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reg = <7>;
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hwmon@52 {
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compatible = "ti,ucd9248";
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reg = <52>;
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};
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hwmon@53 {
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compatible = "ti,ucd9248";
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reg = <53>;
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};
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hwmon@54 {
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compatible = "ti,ucd9248";
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reg = <54>;
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};
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};
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};
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};
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&pinctrl0 {
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pinctrl_can0_default: can0-default {
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mux {
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function = "can0";
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groups = "can0_9_grp";
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};
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conf {
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groups = "can0_9_grp";
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slew-rate = <0>;
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io-standard = <1>;
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};
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conf-rx {
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pins = "MIO46";
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bias-high-impedance;
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};
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conf-tx {
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pins = "MIO47";
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bias-disable;
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};
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};
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pinctrl_gem0_default: gem0-default {
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mux {
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function = "ethernet0";
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groups = "ethernet0_0_grp";
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};
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conf {
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groups = "ethernet0_0_grp";
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slew-rate = <0>;
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io-standard = <4>;
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};
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conf-rx {
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pins = "MIO22", "MIO23", "MIO24", "MIO25", "MIO26", "MIO27";
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bias-high-impedance;
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low-power-disable;
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};
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conf-tx {
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pins = "MIO16", "MIO17", "MIO18", "MIO19", "MIO20", "MIO21";
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bias-disable;
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low-power-enable;
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};
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mux-mdio {
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function = "mdio0";
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groups = "mdio0_0_grp";
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};
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conf-mdio {
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groups = "mdio0_0_grp";
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slew-rate = <0>;
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io-standard = <1>;
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bias-disable;
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};
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};
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pinctrl_gpio0_default: gpio0-default {
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mux {
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function = "gpio0";
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groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
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"gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
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"gpio0_13_grp", "gpio0_14_grp";
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};
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conf {
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groups = "gpio0_7_grp", "gpio0_8_grp", "gpio0_9_grp",
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"gpio0_10_grp", "gpio0_11_grp", "gpio0_12_grp",
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"gpio0_13_grp", "gpio0_14_grp";
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slew-rate = <0>;
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io-standard = <1>;
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};
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conf-pull-up {
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pins = "MIO9", "MIO10", "MIO11", "MIO12", "MIO13", "MIO14";
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bias-pull-up;
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};
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conf-pull-none {
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pins = "MIO7", "MIO8";
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bias-disable;
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};
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};
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pinctrl_i2c0_default: i2c0-default {
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mux {
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groups = "i2c0_10_grp";
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function = "i2c0";
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};
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conf {
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groups = "i2c0_10_grp";
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bias-pull-up;
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slew-rate = <0>;
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io-standard = <1>;
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};
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};
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pinctrl_sdhci0_default: sdhci0-default {
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mux {
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groups = "sdio0_2_grp";
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function = "sdio0";
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};
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conf {
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groups = "sdio0_2_grp";
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slew-rate = <0>;
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io-standard = <1>;
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bias-disable;
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};
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mux-cd {
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groups = "gpio0_0_grp";
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function = "sdio0_cd";
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};
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conf-cd {
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groups = "gpio0_0_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <0>;
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io-standard = <1>;
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};
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mux-wp {
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groups = "gpio0_15_grp";
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function = "sdio0_wp";
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};
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conf-wp {
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groups = "gpio0_15_grp";
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bias-high-impedance;
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bias-pull-up;
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slew-rate = <0>;
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io-standard = <1>;
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};
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};
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pinctrl_uart1_default: uart1-default {
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mux {
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groups = "uart1_10_grp";
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function = "uart1";
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};
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conf {
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groups = "uart1_10_grp";
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slew-rate = <0>;
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io-standard = <1>;
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};
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conf-rx {
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pins = "MIO49";
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bias-high-impedance;
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};
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conf-tx {
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pins = "MIO48";
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bias-disable;
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};
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};
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pinctrl_usb0_default: usb0-default {
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mux {
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groups = "usb0_0_grp";
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function = "usb0";
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};
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conf {
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groups = "usb0_0_grp";
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slew-rate = <0>;
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io-standard = <1>;
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};
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conf-rx {
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pins = "MIO29", "MIO31", "MIO36";
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bias-high-impedance;
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};
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conf-tx {
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pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
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"MIO35", "MIO37", "MIO38", "MIO39";
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bias-disable;
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};
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};
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};
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&sdhci0 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_sdhci0_default>;
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};
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&uart1 {
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status = "okay";
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_uart1_default>;
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};
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&usb0 {
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status = "okay";
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dr_mode = "host";
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usb-phy = <&usb_phy0>;
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pinctrl-names = "default";
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pinctrl-0 = <&pinctrl_usb0_default>;
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};
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