190 lines
3.7 KiB
Plaintext
190 lines
3.7 KiB
Plaintext
/*
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* BSD LICENSE
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*
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* Copyright(c) 2015 Broadcom Corporation. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Broadcom Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/dts-v1/;
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#include "ns2.dtsi"
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/ {
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model = "Broadcom NS2 SVK";
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compatible = "brcm,ns2-svk", "brcm,ns2";
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aliases {
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serial0 = &uart3;
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serial1 = &uart0;
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serial2 = &uart1;
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serial3 = &uart2;
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};
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chosen {
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stdout-path = "serial0:115200n8";
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bootargs = "earlycon=uart8250,mmio32,0x66130000";
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};
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memory {
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device_type = "memory";
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reg = <0x000000000 0x80000000 0x00000000 0x40000000>;
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};
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};
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&pci_phy0 {
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status = "ok";
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};
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&pci_phy1 {
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status = "ok";
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};
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&pcie0 {
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status = "ok";
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};
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&pcie4 {
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status = "ok";
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};
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&i2c0 {
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status = "ok";
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};
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&i2c1 {
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status = "ok";
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};
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&uart0 {
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status = "ok";
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};
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&uart1 {
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status = "ok";
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};
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&uart2 {
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status = "ok";
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};
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&uart3 {
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status = "ok";
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};
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&ssp0 {
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status = "ok";
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slic@0 {
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compatible = "silabs,si3226x";
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reg = <0>;
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spi-max-frequency = <5000000>;
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spi-cpha = <1>;
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spi-cpol = <1>;
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pl022,hierarchy = <0>;
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pl022,interface = <0>;
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pl022,slave-tx-disable = <0>;
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pl022,com-mode = <0>;
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pl022,rx-level-trig = <1>;
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pl022,tx-level-trig = <1>;
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pl022,ctrl-len = <11>;
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pl022,wait-state = <0>;
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pl022,duplex = <0>;
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};
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};
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&ssp1 {
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status = "ok";
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at25@0 {
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compatible = "atmel,at25";
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reg = <0>;
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spi-max-frequency = <5000000>;
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at25,byte-len = <0x8000>;
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at25,addr-mode = <2>;
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at25,page-size = <64>;
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spi-cpha = <1>;
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spi-cpol = <1>;
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pl022,hierarchy = <0>;
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pl022,interface = <0>;
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pl022,slave-tx-disable = <0>;
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pl022,com-mode = <0>;
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pl022,rx-level-trig = <1>;
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pl022,tx-level-trig = <1>;
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pl022,ctrl-len = <11>;
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pl022,wait-state = <0>;
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pl022,duplex = <0>;
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};
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};
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&sata_phy0 {
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status = "ok";
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};
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&sata_phy1 {
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status = "ok";
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};
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&sata {
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status = "ok";
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};
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&sdio0 {
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status = "ok";
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};
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&nand {
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nandcs@0 {
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compatible = "brcm,nandcs";
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reg = <0>;
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nand-ecc-mode = "hw";
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nand-ecc-strength = <8>;
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nand-ecc-step-size = <512>;
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nand-bus-width = <16>;
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brcm,nand-oob-sector-size = <16>;
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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&mdio_mux_iproc {
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mdio@10 {
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gphy0: eth-phy@10 {
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reg = <0x10>;
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};
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};
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};
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&pinctrl {
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pinctrl-names = "default";
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pinctrl-0 = <&nand_sel>;
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nand_sel: nand_sel {
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function = "nand";
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groups = "nand_grp";
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};
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};
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