528 lines
16 KiB
C
528 lines
16 KiB
C
/* pgtable.h: FR-V page table mangling
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*
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* Copyright (C) 2004 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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* Derived from:
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* include/asm-m68knommu/pgtable.h
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* include/asm-i386/pgtable.h
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*/
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#ifndef _ASM_PGTABLE_H
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#define _ASM_PGTABLE_H
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#include <asm/mem-layout.h>
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#include <asm/setup.h>
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#include <asm/processor.h>
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#ifndef __ASSEMBLY__
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#include <linux/threads.h>
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#include <linux/slab.h>
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#include <linux/list.h>
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#include <linux/spinlock.h>
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#include <linux/sched.h>
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struct vm_area_struct;
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#endif
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#ifndef __ASSEMBLY__
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#if defined(CONFIG_HIGHPTE)
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typedef unsigned long pte_addr_t;
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#else
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typedef pte_t *pte_addr_t;
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#endif
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#endif
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/*****************************************************************************/
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/*
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* MMU-less operation case first
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*/
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#ifndef CONFIG_MMU
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#define pgd_present(pgd) (1) /* pages are always present on NO_MM */
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#define pgd_none(pgd) (0)
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#define pgd_bad(pgd) (0)
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#define pgd_clear(pgdp)
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#define kern_addr_valid(addr) (1)
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#define pmd_offset(a, b) ((void *) 0)
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#define PAGE_NONE __pgprot(0) /* these mean nothing to NO_MM */
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#define PAGE_SHARED __pgprot(0) /* these mean nothing to NO_MM */
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#define PAGE_COPY __pgprot(0) /* these mean nothing to NO_MM */
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#define PAGE_READONLY __pgprot(0) /* these mean nothing to NO_MM */
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#define PAGE_KERNEL __pgprot(0) /* these mean nothing to NO_MM */
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#define __swp_type(x) (0)
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#define __swp_offset(x) (0)
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#define __swp_entry(typ,off) ((swp_entry_t) { ((typ) | ((off) << 7)) })
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#define __pte_to_swp_entry(pte) ((swp_entry_t) { pte_val(pte) })
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#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
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#define ZERO_PAGE(vaddr) ({ BUG(); NULL; })
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#define swapper_pg_dir ((pgd_t *) NULL)
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#define pgtable_cache_init() do {} while (0)
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#include <asm-generic/pgtable.h>
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#else /* !CONFIG_MMU */
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/*****************************************************************************/
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/*
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* then MMU operation
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*/
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/*
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* ZERO_PAGE is a global shared page that is always zero: used
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* for zero-mapped memory areas etc..
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*/
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#ifndef __ASSEMBLY__
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extern unsigned long empty_zero_page;
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#define ZERO_PAGE(vaddr) virt_to_page(empty_zero_page)
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#endif
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/*
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* we use 2-level page tables, folding the PMD (mid-level table) into the PGE (top-level entry)
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* [see Documentation/frv/mmu-layout.txt]
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*
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* Page Directory:
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* - Size: 16KB
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* - 64 PGEs per PGD
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* - Each PGE holds 1 PUD and covers 64MB
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*
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* Page Upper Directory:
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* - Size: 256B
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* - 1 PUE per PUD
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* - Each PUE holds 1 PMD and covers 64MB
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*
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* Page Mid-Level Directory
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* - Size: 256B
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* - 1 PME per PMD
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* - Each PME holds 64 STEs, all of which point to separate chunks of the same Page Table
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* - All STEs are instantiated at the same time
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*
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* Page Table
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* - Size: 16KB
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* - 4096 PTEs per PT
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* - Each Linux PT is subdivided into 64 FR451 PT's, each of which holds 64 entries
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*
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* Pages
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* - Size: 4KB
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*
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* total PTEs
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* = 1 PML4E * 64 PGEs * 1 PUEs * 1 PMEs * 4096 PTEs
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* = 1 PML4E * 64 PGEs * 64 STEs * 64 PTEs/FR451-PT
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* = 262144 (or 256 * 1024)
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*/
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#define PGDIR_SHIFT 26
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#define PGDIR_SIZE (1UL << PGDIR_SHIFT)
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#define PGDIR_MASK (~(PGDIR_SIZE - 1))
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#define PTRS_PER_PGD 64
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#define __PAGETABLE_PUD_FOLDED
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#define PUD_SHIFT 26
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#define PTRS_PER_PUD 1
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#define PUD_SIZE (1UL << PUD_SHIFT)
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#define PUD_MASK (~(PUD_SIZE - 1))
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#define PUE_SIZE 256
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#define __PAGETABLE_PMD_FOLDED
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#define PMD_SHIFT 26
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#define PMD_SIZE (1UL << PMD_SHIFT)
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#define PMD_MASK (~(PMD_SIZE - 1))
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#define PTRS_PER_PMD 1
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#define PME_SIZE 256
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#define __frv_PT_SIZE 256
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#define PTRS_PER_PTE 4096
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#define USER_PGDS_IN_LAST_PML4 (TASK_SIZE / PGDIR_SIZE)
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#define FIRST_USER_ADDRESS 0UL
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#define USER_PGD_PTRS (PAGE_OFFSET >> PGDIR_SHIFT)
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#define KERNEL_PGD_PTRS (PTRS_PER_PGD - USER_PGD_PTRS)
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#define TWOLEVEL_PGDIR_SHIFT 26
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#define BOOT_USER_PGD_PTRS (__PAGE_OFFSET >> TWOLEVEL_PGDIR_SHIFT)
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#define BOOT_KERNEL_PGD_PTRS (PTRS_PER_PGD - BOOT_USER_PGD_PTRS)
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#ifndef __ASSEMBLY__
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extern pgd_t swapper_pg_dir[PTRS_PER_PGD];
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#define pte_ERROR(e) \
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printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, (e).pte)
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#define pmd_ERROR(e) \
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printk("%s:%d: bad pmd %08lx.\n", __FILE__, __LINE__, pmd_val(e))
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#define pud_ERROR(e) \
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printk("%s:%d: bad pud %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(e)))
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#define pgd_ERROR(e) \
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printk("%s:%d: bad pgd %08lx.\n", __FILE__, __LINE__, pmd_val(pud_val(pgd_val(e))))
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/*
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* Certain architectures need to do special things when PTEs
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* within a page table are directly modified. Thus, the following
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* hook is made available.
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*/
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#define set_pte(pteptr, pteval) \
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do { \
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*(pteptr) = (pteval); \
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asm volatile("dcf %M0" :: "U"(*pteptr)); \
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} while(0)
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#define set_pte_at(mm,addr,ptep,pteval) set_pte(ptep,pteval)
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/*
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* pgd_offset() returns a (pgd_t *)
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* pgd_index() is used get the offset into the pgd page's array of pgd_t's;
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*/
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#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
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/*
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* a shortcut which implies the use of the kernel's pgd, instead
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* of a process's
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*/
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#define pgd_offset_k(address) pgd_offset(&init_mm, address)
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/*
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* The "pgd_xxx()" functions here are trivial for a folded two-level
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* setup: the pud is never bad, and a pud always exists (as it's folded
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* into the pgd entry)
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*/
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static inline int pgd_none(pgd_t pgd) { return 0; }
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static inline int pgd_bad(pgd_t pgd) { return 0; }
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static inline int pgd_present(pgd_t pgd) { return 1; }
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static inline void pgd_clear(pgd_t *pgd) { }
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#define pgd_populate(mm, pgd, pud) do { } while (0)
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/*
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* (puds are folded into pgds so this doesn't get actually called,
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* but the define is needed for a generic inline function.)
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*/
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#define set_pgd(pgdptr, pgdval) \
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do { \
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memcpy((pgdptr), &(pgdval), sizeof(pgd_t)); \
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asm volatile("dcf %M0" :: "U"(*(pgdptr))); \
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} while(0)
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static inline pud_t *pud_offset(pgd_t *pgd, unsigned long address)
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{
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return (pud_t *) pgd;
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}
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#define pgd_page(pgd) (pud_page((pud_t){ pgd }))
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#define pgd_page_vaddr(pgd) (pud_page_vaddr((pud_t){ pgd }))
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/*
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* allocating and freeing a pud is trivial: the 1-entry pud is
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* inside the pgd, so has no extra memory associated with it.
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*/
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#define pud_alloc_one(mm, address) NULL
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#define pud_free(mm, x) do { } while (0)
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#define __pud_free_tlb(tlb, x, address) do { } while (0)
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/*
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* The "pud_xxx()" functions here are trivial for a folded two-level
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* setup: the pmd is never bad, and a pmd always exists (as it's folded
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* into the pud entry)
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*/
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static inline int pud_none(pud_t pud) { return 0; }
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static inline int pud_bad(pud_t pud) { return 0; }
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static inline int pud_present(pud_t pud) { return 1; }
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static inline void pud_clear(pud_t *pud) { }
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#define pud_populate(mm, pmd, pte) do { } while (0)
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/*
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* (pmds are folded into puds so this doesn't get actually called,
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* but the define is needed for a generic inline function.)
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*/
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#define set_pud(pudptr, pudval) set_pmd((pmd_t *)(pudptr), (pmd_t) { pudval })
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#define pud_page(pud) (pmd_page((pmd_t){ pud }))
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#define pud_page_vaddr(pud) (pmd_page_vaddr((pmd_t){ pud }))
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/*
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* (pmds are folded into pgds so this doesn't get actually called,
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* but the define is needed for a generic inline function.)
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*/
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extern void __set_pmd(pmd_t *pmdptr, unsigned long __pmd);
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#define set_pmd(pmdptr, pmdval) \
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do { \
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__set_pmd((pmdptr), (pmdval).ste[0]); \
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} while(0)
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#define __pmd_index(address) 0
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static inline pmd_t *pmd_offset(pud_t *dir, unsigned long address)
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{
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return (pmd_t *) dir + __pmd_index(address);
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}
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#define pte_same(a, b) ((a).pte == (b).pte)
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#define pte_page(x) (mem_map + ((unsigned long)(((x).pte >> PAGE_SHIFT))))
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#define pte_none(x) (!(x).pte)
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#define pte_pfn(x) ((unsigned long)(((x).pte >> PAGE_SHIFT)))
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#define pfn_pte(pfn, prot) __pte(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
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#define pfn_pmd(pfn, prot) __pmd(((pfn) << PAGE_SHIFT) | pgprot_val(prot))
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#define VMALLOC_VMADDR(x) ((unsigned long) (x))
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#endif /* !__ASSEMBLY__ */
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/*
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* control flags in AMPR registers and TLB entries
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*/
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#define _PAGE_BIT_PRESENT xAMPRx_V_BIT
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#define _PAGE_BIT_WP DAMPRx_WP_BIT
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#define _PAGE_BIT_NOCACHE xAMPRx_C_BIT
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#define _PAGE_BIT_SUPER xAMPRx_S_BIT
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#define _PAGE_BIT_ACCESSED xAMPRx_RESERVED8_BIT
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#define _PAGE_BIT_DIRTY xAMPRx_M_BIT
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#define _PAGE_BIT_NOTGLOBAL xAMPRx_NG_BIT
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#define _PAGE_PRESENT xAMPRx_V
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#define _PAGE_WP DAMPRx_WP
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#define _PAGE_NOCACHE xAMPRx_C
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#define _PAGE_SUPER xAMPRx_S
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#define _PAGE_ACCESSED xAMPRx_RESERVED8 /* accessed if set */
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#define _PAGE_DIRTY xAMPRx_M
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#define _PAGE_NOTGLOBAL xAMPRx_NG
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#define _PAGE_RESERVED_MASK (xAMPRx_RESERVED8 | xAMPRx_RESERVED13)
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#define _PAGE_PROTNONE 0x000 /* If not present */
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#define _PAGE_CHG_MASK (PTE_MASK | _PAGE_ACCESSED | _PAGE_DIRTY)
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#define __PGPROT_BASE \
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(_PAGE_PRESENT | xAMPRx_SS_16Kb | xAMPRx_D | _PAGE_NOTGLOBAL | _PAGE_ACCESSED)
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#define PAGE_NONE __pgprot(_PAGE_PROTNONE | _PAGE_ACCESSED)
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#define PAGE_SHARED __pgprot(__PGPROT_BASE)
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#define PAGE_COPY __pgprot(__PGPROT_BASE | _PAGE_WP)
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#define PAGE_READONLY __pgprot(__PGPROT_BASE | _PAGE_WP)
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#define __PAGE_KERNEL (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY)
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#define __PAGE_KERNEL_NOCACHE (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY | _PAGE_NOCACHE)
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#define __PAGE_KERNEL_RO (__PGPROT_BASE | _PAGE_SUPER | _PAGE_DIRTY | _PAGE_WP)
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#define MAKE_GLOBAL(x) __pgprot((x) & ~_PAGE_NOTGLOBAL)
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#define PAGE_KERNEL MAKE_GLOBAL(__PAGE_KERNEL)
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#define PAGE_KERNEL_RO MAKE_GLOBAL(__PAGE_KERNEL_RO)
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#define PAGE_KERNEL_NOCACHE MAKE_GLOBAL(__PAGE_KERNEL_NOCACHE)
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#define _PAGE_TABLE (_PAGE_PRESENT | xAMPRx_SS_16Kb)
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#ifndef __ASSEMBLY__
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/*
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* The FR451 can do execute protection by virtue of having separate TLB miss handlers for
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* instruction access and for data access. However, we don't have enough reserved bits to say
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* "execute only", so we don't bother. If you can read it, you can execute it and vice versa.
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*/
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#define __P000 PAGE_NONE
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#define __P001 PAGE_READONLY
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#define __P010 PAGE_COPY
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#define __P011 PAGE_COPY
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#define __P100 PAGE_READONLY
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#define __P101 PAGE_READONLY
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#define __P110 PAGE_COPY
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#define __P111 PAGE_COPY
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#define __S000 PAGE_NONE
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#define __S001 PAGE_READONLY
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#define __S010 PAGE_SHARED
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#define __S011 PAGE_SHARED
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#define __S100 PAGE_READONLY
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#define __S101 PAGE_READONLY
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#define __S110 PAGE_SHARED
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#define __S111 PAGE_SHARED
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/*
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* Define this to warn about kernel memory accesses that are
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* done without a 'access_ok(VERIFY_WRITE,..)'
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*/
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#undef TEST_ACCESS_OK
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#define pte_present(x) (pte_val(x) & _PAGE_PRESENT)
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#define pte_clear(mm,addr,xp) do { set_pte_at(mm, addr, xp, __pte(0)); } while (0)
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#define pmd_none(x) (!pmd_val(x))
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#define pmd_present(x) (pmd_val(x) & _PAGE_PRESENT)
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#define pmd_bad(x) (pmd_val(x) & xAMPRx_SS)
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#define pmd_clear(xp) do { __set_pmd(xp, 0); } while(0)
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#define pmd_page_vaddr(pmd) \
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((unsigned long) __va(pmd_val(pmd) & PAGE_MASK))
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#ifndef CONFIG_DISCONTIGMEM
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#define pmd_page(pmd) (pfn_to_page(pmd_val(pmd) >> PAGE_SHIFT))
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#endif
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#define pages_to_mb(x) ((x) >> (20-PAGE_SHIFT))
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/*
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* The following only work if pte_present() is true.
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* Undefined behaviour if not..
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*/
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static inline int pte_dirty(pte_t pte) { return (pte).pte & _PAGE_DIRTY; }
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static inline int pte_young(pte_t pte) { return (pte).pte & _PAGE_ACCESSED; }
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static inline int pte_write(pte_t pte) { return !((pte).pte & _PAGE_WP); }
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static inline int pte_special(pte_t pte) { return 0; }
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static inline pte_t pte_mkclean(pte_t pte) { (pte).pte &= ~_PAGE_DIRTY; return pte; }
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static inline pte_t pte_mkold(pte_t pte) { (pte).pte &= ~_PAGE_ACCESSED; return pte; }
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static inline pte_t pte_wrprotect(pte_t pte) { (pte).pte |= _PAGE_WP; return pte; }
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static inline pte_t pte_mkdirty(pte_t pte) { (pte).pte |= _PAGE_DIRTY; return pte; }
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static inline pte_t pte_mkyoung(pte_t pte) { (pte).pte |= _PAGE_ACCESSED; return pte; }
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static inline pte_t pte_mkwrite(pte_t pte) { (pte).pte &= ~_PAGE_WP; return pte; }
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static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
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static inline int ptep_test_and_clear_young(struct vm_area_struct *vma, unsigned long addr, pte_t *ptep)
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{
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int i = test_and_clear_bit(_PAGE_BIT_ACCESSED, ptep);
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asm volatile("dcf %M0" :: "U"(*ptep));
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return i;
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}
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static inline pte_t ptep_get_and_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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{
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unsigned long x = xchg(&ptep->pte, 0);
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asm volatile("dcf %M0" :: "U"(*ptep));
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return __pte(x);
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}
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static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
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{
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set_bit(_PAGE_BIT_WP, ptep);
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asm volatile("dcf %M0" :: "U"(*ptep));
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}
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/*
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* Macro to mark a page protection value as "uncacheable"
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*/
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#define pgprot_noncached(prot) (__pgprot(pgprot_val(prot) | _PAGE_NOCACHE))
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/*
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* Conversion functions: convert a page and protection to a page entry,
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* and a page entry and page directory to the page they refer to.
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*/
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#define mk_pte(page, pgprot) pfn_pte(page_to_pfn(page), (pgprot))
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#define mk_pte_huge(entry) ((entry).pte_low |= _PAGE_PRESENT | _PAGE_PSE)
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/* This takes a physical page address that is used by the remapping functions */
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#define mk_pte_phys(physpage, pgprot) pfn_pte((physpage) >> PAGE_SHIFT, pgprot)
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static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
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{
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pte.pte &= _PAGE_CHG_MASK;
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pte.pte |= pgprot_val(newprot);
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return pte;
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}
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/* to find an entry in a page-table-directory. */
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#define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1))
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#define pgd_index_k(addr) pgd_index(addr)
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/* Find an entry in the bottom-level page table.. */
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#define __pte_index(address) (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
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/*
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* the pte page can be thought of an array like this: pte_t[PTRS_PER_PTE]
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*
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* this macro returns the index of the entry in the pte page which would
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* control the given virtual address
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*/
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#define pte_index(address) \
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(((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
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#define pte_offset_kernel(dir, address) \
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((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(address))
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#if defined(CONFIG_HIGHPTE)
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#define pte_offset_map(dir, address) \
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((pte_t *)kmap_atomic(pmd_page(*(dir))) + pte_index(address))
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#define pte_unmap(pte) kunmap_atomic(pte)
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#else
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#define pte_offset_map(dir, address) \
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((pte_t *)page_address(pmd_page(*(dir))) + pte_index(address))
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#define pte_unmap(pte) do { } while (0)
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#endif
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/*
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* Handle swap and file entries
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* - the PTE is encoded in the following format:
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* bit 0: Must be 0 (!_PAGE_PRESENT)
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* bits 1-6: Swap type
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* bits 7-31: Swap offset
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*/
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#define __swp_type(x) (((x).val >> 1) & 0x1f)
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#define __swp_offset(x) ((x).val >> 7)
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#define __swp_entry(type, offset) ((swp_entry_t) { ((type) << 1) | ((offset) << 7) })
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#define __pte_to_swp_entry(_pte) ((swp_entry_t) { (_pte).pte })
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#define __swp_entry_to_pte(x) ((pte_t) { (x).val })
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/* Needs to be defined here and not in linux/mm.h, as it is arch dependent */
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#define PageSkip(page) (0)
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#define kern_addr_valid(addr) (1)
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#define __HAVE_ARCH_PTEP_TEST_AND_CLEAR_YOUNG
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#define __HAVE_ARCH_PTEP_GET_AND_CLEAR
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#define __HAVE_ARCH_PTEP_SET_WRPROTECT
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#define __HAVE_ARCH_PTE_SAME
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#include <asm-generic/pgtable.h>
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/*
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* preload information about a newly instantiated PTE into the SCR0/SCR1 PGE cache
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*/
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static inline void update_mmu_cache(struct vm_area_struct *vma, unsigned long address, pte_t *ptep)
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{
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struct mm_struct *mm;
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unsigned long ampr;
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mm = current->mm;
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if (mm) {
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pgd_t *pge = pgd_offset(mm, address);
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pud_t *pue = pud_offset(pge, address);
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pmd_t *pme = pmd_offset(pue, address);
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ampr = pme->ste[0] & 0xffffff00;
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ampr |= xAMPRx_L | xAMPRx_SS_16Kb | xAMPRx_S | xAMPRx_C |
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xAMPRx_V;
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} else {
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address = ULONG_MAX;
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ampr = 0;
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}
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asm volatile("movgs %0,scr0\n"
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"movgs %0,scr1\n"
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"movgs %1,dampr4\n"
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"movgs %1,dampr5\n"
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:
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: "r"(address), "r"(ampr)
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);
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}
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#ifdef CONFIG_PROC_FS
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extern char *proc_pid_status_frv_cxnr(struct mm_struct *mm, char *buffer);
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#endif
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extern void __init pgtable_cache_init(void);
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#endif /* !__ASSEMBLY__ */
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#endif /* !CONFIG_MMU */
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|
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#ifndef __ASSEMBLY__
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extern void __init paging_init(void);
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#endif /* !__ASSEMBLY__ */
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#define HAVE_ARCH_UNMAPPED_AREA
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|
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#endif /* _ASM_PGTABLE_H */
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