30 lines
732 B
C
30 lines
732 B
C
#ifndef _ASM_IA64_CACHE_H
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#define _ASM_IA64_CACHE_H
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/*
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* Copyright (C) 1998-2000 Hewlett-Packard Co
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* David Mosberger-Tang <davidm@hpl.hp.com>
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*/
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/* Bytes per L1 (data) cache line. */
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#define L1_CACHE_SHIFT CONFIG_IA64_L1_CACHE_SHIFT
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#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
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#ifdef CONFIG_SMP
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# define SMP_CACHE_SHIFT L1_CACHE_SHIFT
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# define SMP_CACHE_BYTES L1_CACHE_BYTES
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#else
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/*
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* The "aligned" directive can only _increase_ alignment, so this is
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* safe and provides an easy way to avoid wasting space on a
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* uni-processor:
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*/
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# define SMP_CACHE_SHIFT 3
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# define SMP_CACHE_BYTES (1 << 3)
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#endif
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#define __read_mostly __attribute__((__section__(".data..read_mostly")))
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#endif /* _ASM_IA64_CACHE_H */
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