806 lines
23 KiB
C
806 lines
23 KiB
C
#include <linux/gfp.h>
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#include <linux/initrd.h>
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#include <linux/ioport.h>
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#include <linux/swap.h>
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#include <linux/memblock.h>
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#include <linux/bootmem.h> /* for max_low_pfn */
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#include <linux/swapfile.h>
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#include <linux/swapops.h>
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#include <asm/cacheflush.h>
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#include <asm/e820.h>
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#include <asm/init.h>
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#include <asm/page.h>
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#include <asm/page_types.h>
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#include <asm/sections.h>
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#include <asm/setup.h>
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#include <asm/tlbflush.h>
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#include <asm/tlb.h>
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#include <asm/proto.h>
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#include <asm/dma.h> /* for MAX_DMA_PFN */
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#include <asm/microcode.h>
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#include <asm/kaslr.h>
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/*
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* We need to define the tracepoints somewhere, and tlb.c
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* is only compied when SMP=y.
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*/
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#define CREATE_TRACE_POINTS
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#include <trace/events/tlb.h>
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#include "mm_internal.h"
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/*
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* Tables translating between page_cache_type_t and pte encoding.
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*
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* The default values are defined statically as minimal supported mode;
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* WC and WT fall back to UC-. pat_init() updates these values to support
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* more cache modes, WC and WT, when it is safe to do so. See pat_init()
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* for the details. Note, __early_ioremap() used during early boot-time
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* takes pgprot_t (pte encoding) and does not use these tables.
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*
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* Index into __cachemode2pte_tbl[] is the cachemode.
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*
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* Index into __pte2cachemode_tbl[] are the caching attribute bits of the pte
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* (_PAGE_PWT, _PAGE_PCD, _PAGE_PAT) at index bit positions 0, 1, 2.
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*/
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uint16_t __cachemode2pte_tbl[_PAGE_CACHE_MODE_NUM] = {
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[_PAGE_CACHE_MODE_WB ] = 0 | 0 ,
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[_PAGE_CACHE_MODE_WC ] = 0 | _PAGE_PCD,
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[_PAGE_CACHE_MODE_UC_MINUS] = 0 | _PAGE_PCD,
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[_PAGE_CACHE_MODE_UC ] = _PAGE_PWT | _PAGE_PCD,
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[_PAGE_CACHE_MODE_WT ] = 0 | _PAGE_PCD,
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[_PAGE_CACHE_MODE_WP ] = 0 | _PAGE_PCD,
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};
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EXPORT_SYMBOL(__cachemode2pte_tbl);
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uint8_t __pte2cachemode_tbl[8] = {
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[__pte2cm_idx( 0 | 0 | 0 )] = _PAGE_CACHE_MODE_WB,
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[__pte2cm_idx(_PAGE_PWT | 0 | 0 )] = _PAGE_CACHE_MODE_UC_MINUS,
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[__pte2cm_idx( 0 | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC_MINUS,
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[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | 0 )] = _PAGE_CACHE_MODE_UC,
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[__pte2cm_idx( 0 | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_WB,
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[__pte2cm_idx(_PAGE_PWT | 0 | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
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[__pte2cm_idx(0 | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC_MINUS,
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[__pte2cm_idx(_PAGE_PWT | _PAGE_PCD | _PAGE_PAT)] = _PAGE_CACHE_MODE_UC,
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};
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EXPORT_SYMBOL(__pte2cachemode_tbl);
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static unsigned long __initdata pgt_buf_start;
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static unsigned long __initdata pgt_buf_end;
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static unsigned long __initdata pgt_buf_top;
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static unsigned long min_pfn_mapped;
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static bool __initdata can_use_brk_pgt = true;
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/*
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* Pages returned are already directly mapped.
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*
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* Changing that is likely to break Xen, see commit:
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*
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* 279b706 x86,xen: introduce x86_init.mapping.pagetable_reserve
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*
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* for detailed information.
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*/
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__ref void *alloc_low_pages(unsigned int num)
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{
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unsigned long pfn;
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int i;
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if (after_bootmem) {
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unsigned int order;
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order = get_order((unsigned long)num << PAGE_SHIFT);
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return (void *)__get_free_pages(GFP_ATOMIC | __GFP_NOTRACK |
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__GFP_ZERO, order);
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}
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if ((pgt_buf_end + num) > pgt_buf_top || !can_use_brk_pgt) {
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unsigned long ret;
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if (min_pfn_mapped >= max_pfn_mapped)
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panic("alloc_low_pages: ran out of memory");
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ret = memblock_find_in_range(min_pfn_mapped << PAGE_SHIFT,
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max_pfn_mapped << PAGE_SHIFT,
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PAGE_SIZE * num , PAGE_SIZE);
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if (!ret)
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panic("alloc_low_pages: can not alloc memory");
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memblock_reserve(ret, PAGE_SIZE * num);
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pfn = ret >> PAGE_SHIFT;
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} else {
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pfn = pgt_buf_end;
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pgt_buf_end += num;
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}
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for (i = 0; i < num; i++) {
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void *adr;
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adr = __va((pfn + i) << PAGE_SHIFT);
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clear_page(adr);
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}
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return __va(pfn << PAGE_SHIFT);
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}
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/*
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* By default need 3 4k for initial PMD_SIZE, 3 4k for 0-ISA_END_ADDRESS.
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* With KASLR memory randomization, depending on the machine e820 memory
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* and the PUD alignment. We may need twice more pages when KASLR memory
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* randomization is enabled.
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*/
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#ifndef CONFIG_RANDOMIZE_MEMORY
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#define INIT_PGD_PAGE_COUNT 6
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#else
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#define INIT_PGD_PAGE_COUNT 12
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#endif
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#define INIT_PGT_BUF_SIZE (INIT_PGD_PAGE_COUNT * PAGE_SIZE)
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RESERVE_BRK(early_pgt_alloc, INIT_PGT_BUF_SIZE);
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void __init early_alloc_pgt_buf(void)
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{
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unsigned long tables = INIT_PGT_BUF_SIZE;
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phys_addr_t base;
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base = __pa(extend_brk(tables, PAGE_SIZE));
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pgt_buf_start = base >> PAGE_SHIFT;
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pgt_buf_end = pgt_buf_start;
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pgt_buf_top = pgt_buf_start + (tables >> PAGE_SHIFT);
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}
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int after_bootmem;
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early_param_on_off("gbpages", "nogbpages", direct_gbpages, CONFIG_X86_DIRECT_GBPAGES);
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struct map_range {
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unsigned long start;
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unsigned long end;
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unsigned page_size_mask;
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};
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static int page_size_mask;
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static void __init probe_page_size_mask(void)
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{
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#if !defined(CONFIG_KMEMCHECK)
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/*
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* For CONFIG_KMEMCHECK or pagealloc debugging, identity mapping will
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* use small pages.
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* This will simplify cpa(), which otherwise needs to support splitting
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* large pages into small in interrupt context, etc.
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*/
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if (boot_cpu_has(X86_FEATURE_PSE) && !debug_pagealloc_enabled())
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page_size_mask |= 1 << PG_LEVEL_2M;
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#endif
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/* Enable PSE if available */
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if (boot_cpu_has(X86_FEATURE_PSE))
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cr4_set_bits_and_update_boot(X86_CR4_PSE);
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/* Enable PGE if available */
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if (boot_cpu_has(X86_FEATURE_PGE) && !kaiser_enabled) {
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cr4_set_bits_and_update_boot(X86_CR4_PGE);
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__supported_pte_mask |= _PAGE_GLOBAL;
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} else
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__supported_pte_mask &= ~_PAGE_GLOBAL;
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/* Enable 1 GB linear kernel mappings if available: */
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if (direct_gbpages && boot_cpu_has(X86_FEATURE_GBPAGES)) {
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printk(KERN_INFO "Using GB pages for direct mapping\n");
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page_size_mask |= 1 << PG_LEVEL_1G;
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} else {
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direct_gbpages = 0;
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}
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}
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#ifdef CONFIG_X86_32
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#define NR_RANGE_MR 3
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#else /* CONFIG_X86_64 */
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#define NR_RANGE_MR 5
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#endif
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static int __meminit save_mr(struct map_range *mr, int nr_range,
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unsigned long start_pfn, unsigned long end_pfn,
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unsigned long page_size_mask)
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{
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if (start_pfn < end_pfn) {
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if (nr_range >= NR_RANGE_MR)
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panic("run out of range for init_memory_mapping\n");
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mr[nr_range].start = start_pfn<<PAGE_SHIFT;
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mr[nr_range].end = end_pfn<<PAGE_SHIFT;
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mr[nr_range].page_size_mask = page_size_mask;
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nr_range++;
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}
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return nr_range;
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}
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/*
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* adjust the page_size_mask for small range to go with
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* big page size instead small one if nearby are ram too.
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*/
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static void __ref adjust_range_page_size_mask(struct map_range *mr,
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int nr_range)
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{
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int i;
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for (i = 0; i < nr_range; i++) {
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if ((page_size_mask & (1<<PG_LEVEL_2M)) &&
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!(mr[i].page_size_mask & (1<<PG_LEVEL_2M))) {
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unsigned long start = round_down(mr[i].start, PMD_SIZE);
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unsigned long end = round_up(mr[i].end, PMD_SIZE);
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#ifdef CONFIG_X86_32
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if ((end >> PAGE_SHIFT) > max_low_pfn)
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continue;
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#endif
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if (memblock_is_region_memory(start, end - start))
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mr[i].page_size_mask |= 1<<PG_LEVEL_2M;
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}
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if ((page_size_mask & (1<<PG_LEVEL_1G)) &&
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!(mr[i].page_size_mask & (1<<PG_LEVEL_1G))) {
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unsigned long start = round_down(mr[i].start, PUD_SIZE);
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unsigned long end = round_up(mr[i].end, PUD_SIZE);
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if (memblock_is_region_memory(start, end - start))
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mr[i].page_size_mask |= 1<<PG_LEVEL_1G;
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}
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}
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}
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static const char *page_size_string(struct map_range *mr)
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{
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static const char str_1g[] = "1G";
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static const char str_2m[] = "2M";
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static const char str_4m[] = "4M";
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static const char str_4k[] = "4k";
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if (mr->page_size_mask & (1<<PG_LEVEL_1G))
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return str_1g;
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/*
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* 32-bit without PAE has a 4M large page size.
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* PG_LEVEL_2M is misnamed, but we can at least
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* print out the right size in the string.
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*/
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if (IS_ENABLED(CONFIG_X86_32) &&
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!IS_ENABLED(CONFIG_X86_PAE) &&
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mr->page_size_mask & (1<<PG_LEVEL_2M))
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return str_4m;
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if (mr->page_size_mask & (1<<PG_LEVEL_2M))
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return str_2m;
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return str_4k;
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}
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static int __meminit split_mem_range(struct map_range *mr, int nr_range,
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unsigned long start,
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unsigned long end)
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{
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unsigned long start_pfn, end_pfn, limit_pfn;
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unsigned long pfn;
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int i;
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limit_pfn = PFN_DOWN(end);
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/* head if not big page alignment ? */
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pfn = start_pfn = PFN_DOWN(start);
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#ifdef CONFIG_X86_32
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/*
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* Don't use a large page for the first 2/4MB of memory
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* because there are often fixed size MTRRs in there
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* and overlapping MTRRs into large pages can cause
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* slowdowns.
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*/
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if (pfn == 0)
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end_pfn = PFN_DOWN(PMD_SIZE);
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else
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end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
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#else /* CONFIG_X86_64 */
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end_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
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#endif
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if (end_pfn > limit_pfn)
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end_pfn = limit_pfn;
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if (start_pfn < end_pfn) {
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nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
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pfn = end_pfn;
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}
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/* big page (2M) range */
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start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
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#ifdef CONFIG_X86_32
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end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
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#else /* CONFIG_X86_64 */
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end_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
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if (end_pfn > round_down(limit_pfn, PFN_DOWN(PMD_SIZE)))
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end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
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#endif
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if (start_pfn < end_pfn) {
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nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
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page_size_mask & (1<<PG_LEVEL_2M));
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pfn = end_pfn;
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}
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#ifdef CONFIG_X86_64
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/* big page (1G) range */
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start_pfn = round_up(pfn, PFN_DOWN(PUD_SIZE));
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end_pfn = round_down(limit_pfn, PFN_DOWN(PUD_SIZE));
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if (start_pfn < end_pfn) {
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nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
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page_size_mask &
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((1<<PG_LEVEL_2M)|(1<<PG_LEVEL_1G)));
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pfn = end_pfn;
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}
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/* tail is not big page (1G) alignment */
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start_pfn = round_up(pfn, PFN_DOWN(PMD_SIZE));
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end_pfn = round_down(limit_pfn, PFN_DOWN(PMD_SIZE));
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if (start_pfn < end_pfn) {
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nr_range = save_mr(mr, nr_range, start_pfn, end_pfn,
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page_size_mask & (1<<PG_LEVEL_2M));
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pfn = end_pfn;
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}
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#endif
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/* tail is not big page (2M) alignment */
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start_pfn = pfn;
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end_pfn = limit_pfn;
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nr_range = save_mr(mr, nr_range, start_pfn, end_pfn, 0);
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if (!after_bootmem)
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adjust_range_page_size_mask(mr, nr_range);
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/* try to merge same page size and continuous */
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for (i = 0; nr_range > 1 && i < nr_range - 1; i++) {
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unsigned long old_start;
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if (mr[i].end != mr[i+1].start ||
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mr[i].page_size_mask != mr[i+1].page_size_mask)
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continue;
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/* move it */
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old_start = mr[i].start;
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memmove(&mr[i], &mr[i+1],
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(nr_range - 1 - i) * sizeof(struct map_range));
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mr[i--].start = old_start;
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nr_range--;
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}
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for (i = 0; i < nr_range; i++)
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pr_debug(" [mem %#010lx-%#010lx] page %s\n",
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mr[i].start, mr[i].end - 1,
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page_size_string(&mr[i]));
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return nr_range;
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}
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struct range pfn_mapped[E820_X_MAX];
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int nr_pfn_mapped;
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static void add_pfn_range_mapped(unsigned long start_pfn, unsigned long end_pfn)
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{
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nr_pfn_mapped = add_range_with_merge(pfn_mapped, E820_X_MAX,
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nr_pfn_mapped, start_pfn, end_pfn);
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nr_pfn_mapped = clean_sort_range(pfn_mapped, E820_X_MAX);
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max_pfn_mapped = max(max_pfn_mapped, end_pfn);
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if (start_pfn < (1UL<<(32-PAGE_SHIFT)))
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max_low_pfn_mapped = max(max_low_pfn_mapped,
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min(end_pfn, 1UL<<(32-PAGE_SHIFT)));
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}
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bool pfn_range_is_mapped(unsigned long start_pfn, unsigned long end_pfn)
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{
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int i;
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for (i = 0; i < nr_pfn_mapped; i++)
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if ((start_pfn >= pfn_mapped[i].start) &&
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(end_pfn <= pfn_mapped[i].end))
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return true;
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return false;
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}
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/*
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* Setup the direct mapping of the physical memory at PAGE_OFFSET.
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* This runs before bootmem is initialized and gets pages directly from
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* the physical memory. To access them they are temporarily mapped.
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*/
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unsigned long __ref init_memory_mapping(unsigned long start,
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unsigned long end)
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{
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struct map_range mr[NR_RANGE_MR];
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unsigned long ret = 0;
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int nr_range, i;
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pr_debug("init_memory_mapping: [mem %#010lx-%#010lx]\n",
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start, end - 1);
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memset(mr, 0, sizeof(mr));
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nr_range = split_mem_range(mr, 0, start, end);
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for (i = 0; i < nr_range; i++)
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ret = kernel_physical_mapping_init(mr[i].start, mr[i].end,
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mr[i].page_size_mask);
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add_pfn_range_mapped(start >> PAGE_SHIFT, ret >> PAGE_SHIFT);
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return ret >> PAGE_SHIFT;
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}
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/*
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* We need to iterate through the E820 memory map and create direct mappings
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* for only E820_RAM and E820_KERN_RESERVED regions. We cannot simply
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* create direct mappings for all pfns from [0 to max_low_pfn) and
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* [4GB to max_pfn) because of possible memory holes in high addresses
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* that cannot be marked as UC by fixed/variable range MTRRs.
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* Depending on the alignment of E820 ranges, this may possibly result
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* in using smaller size (i.e. 4K instead of 2M or 1G) page tables.
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*
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* init_mem_mapping() calls init_range_memory_mapping() with big range.
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* That range would have hole in the middle or ends, and only ram parts
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* will be mapped in init_range_memory_mapping().
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*/
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static unsigned long __init init_range_memory_mapping(
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unsigned long r_start,
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unsigned long r_end)
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{
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unsigned long start_pfn, end_pfn;
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unsigned long mapped_ram_size = 0;
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int i;
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for_each_mem_pfn_range(i, MAX_NUMNODES, &start_pfn, &end_pfn, NULL) {
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u64 start = clamp_val(PFN_PHYS(start_pfn), r_start, r_end);
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u64 end = clamp_val(PFN_PHYS(end_pfn), r_start, r_end);
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if (start >= end)
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continue;
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/*
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* if it is overlapping with brk pgt, we need to
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* alloc pgt buf from memblock instead.
|
|
*/
|
|
can_use_brk_pgt = max(start, (u64)pgt_buf_end<<PAGE_SHIFT) >=
|
|
min(end, (u64)pgt_buf_top<<PAGE_SHIFT);
|
|
init_memory_mapping(start, end);
|
|
mapped_ram_size += end - start;
|
|
can_use_brk_pgt = true;
|
|
}
|
|
|
|
return mapped_ram_size;
|
|
}
|
|
|
|
static unsigned long __init get_new_step_size(unsigned long step_size)
|
|
{
|
|
/*
|
|
* Initial mapped size is PMD_SIZE (2M).
|
|
* We can not set step_size to be PUD_SIZE (1G) yet.
|
|
* In worse case, when we cross the 1G boundary, and
|
|
* PG_LEVEL_2M is not set, we will need 1+1+512 pages (2M + 8k)
|
|
* to map 1G range with PTE. Hence we use one less than the
|
|
* difference of page table level shifts.
|
|
*
|
|
* Don't need to worry about overflow in the top-down case, on 32bit,
|
|
* when step_size is 0, round_down() returns 0 for start, and that
|
|
* turns it into 0x100000000ULL.
|
|
* In the bottom-up case, round_up(x, 0) returns 0 though too, which
|
|
* needs to be taken into consideration by the code below.
|
|
*/
|
|
return step_size << (PMD_SHIFT - PAGE_SHIFT - 1);
|
|
}
|
|
|
|
/**
|
|
* memory_map_top_down - Map [map_start, map_end) top down
|
|
* @map_start: start address of the target memory range
|
|
* @map_end: end address of the target memory range
|
|
*
|
|
* This function will setup direct mapping for memory range
|
|
* [map_start, map_end) in top-down. That said, the page tables
|
|
* will be allocated at the end of the memory, and we map the
|
|
* memory in top-down.
|
|
*/
|
|
static void __init memory_map_top_down(unsigned long map_start,
|
|
unsigned long map_end)
|
|
{
|
|
unsigned long real_end, start, last_start;
|
|
unsigned long step_size;
|
|
unsigned long addr;
|
|
unsigned long mapped_ram_size = 0;
|
|
|
|
/* xen has big range in reserved near end of ram, skip it at first.*/
|
|
addr = memblock_find_in_range(map_start, map_end, PMD_SIZE, PMD_SIZE);
|
|
real_end = addr + PMD_SIZE;
|
|
|
|
/* step_size need to be small so pgt_buf from BRK could cover it */
|
|
step_size = PMD_SIZE;
|
|
max_pfn_mapped = 0; /* will get exact value next */
|
|
min_pfn_mapped = real_end >> PAGE_SHIFT;
|
|
last_start = start = real_end;
|
|
|
|
/*
|
|
* We start from the top (end of memory) and go to the bottom.
|
|
* The memblock_find_in_range() gets us a block of RAM from the
|
|
* end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
|
|
* for page table.
|
|
*/
|
|
while (last_start > map_start) {
|
|
if (last_start > step_size) {
|
|
start = round_down(last_start - 1, step_size);
|
|
if (start < map_start)
|
|
start = map_start;
|
|
} else
|
|
start = map_start;
|
|
mapped_ram_size += init_range_memory_mapping(start,
|
|
last_start);
|
|
last_start = start;
|
|
min_pfn_mapped = last_start >> PAGE_SHIFT;
|
|
if (mapped_ram_size >= step_size)
|
|
step_size = get_new_step_size(step_size);
|
|
}
|
|
|
|
if (real_end < map_end)
|
|
init_range_memory_mapping(real_end, map_end);
|
|
}
|
|
|
|
/**
|
|
* memory_map_bottom_up - Map [map_start, map_end) bottom up
|
|
* @map_start: start address of the target memory range
|
|
* @map_end: end address of the target memory range
|
|
*
|
|
* This function will setup direct mapping for memory range
|
|
* [map_start, map_end) in bottom-up. Since we have limited the
|
|
* bottom-up allocation above the kernel, the page tables will
|
|
* be allocated just above the kernel and we map the memory
|
|
* in [map_start, map_end) in bottom-up.
|
|
*/
|
|
static void __init memory_map_bottom_up(unsigned long map_start,
|
|
unsigned long map_end)
|
|
{
|
|
unsigned long next, start;
|
|
unsigned long mapped_ram_size = 0;
|
|
/* step_size need to be small so pgt_buf from BRK could cover it */
|
|
unsigned long step_size = PMD_SIZE;
|
|
|
|
start = map_start;
|
|
min_pfn_mapped = start >> PAGE_SHIFT;
|
|
|
|
/*
|
|
* We start from the bottom (@map_start) and go to the top (@map_end).
|
|
* The memblock_find_in_range() gets us a block of RAM from the
|
|
* end of RAM in [min_pfn_mapped, max_pfn_mapped) used as new pages
|
|
* for page table.
|
|
*/
|
|
while (start < map_end) {
|
|
if (step_size && map_end - start > step_size) {
|
|
next = round_up(start + 1, step_size);
|
|
if (next > map_end)
|
|
next = map_end;
|
|
} else {
|
|
next = map_end;
|
|
}
|
|
|
|
mapped_ram_size += init_range_memory_mapping(start, next);
|
|
start = next;
|
|
|
|
if (mapped_ram_size >= step_size)
|
|
step_size = get_new_step_size(step_size);
|
|
}
|
|
}
|
|
|
|
void __init init_mem_mapping(void)
|
|
{
|
|
unsigned long end;
|
|
|
|
probe_page_size_mask();
|
|
|
|
#ifdef CONFIG_X86_64
|
|
end = max_pfn << PAGE_SHIFT;
|
|
#else
|
|
end = max_low_pfn << PAGE_SHIFT;
|
|
#endif
|
|
|
|
/* the ISA range is always mapped regardless of memory holes */
|
|
init_memory_mapping(0, ISA_END_ADDRESS);
|
|
|
|
/* Init the trampoline, possibly with KASLR memory offset */
|
|
init_trampoline();
|
|
|
|
/*
|
|
* If the allocation is in bottom-up direction, we setup direct mapping
|
|
* in bottom-up, otherwise we setup direct mapping in top-down.
|
|
*/
|
|
if (memblock_bottom_up()) {
|
|
unsigned long kernel_end = __pa_symbol(_end);
|
|
|
|
/*
|
|
* we need two separate calls here. This is because we want to
|
|
* allocate page tables above the kernel. So we first map
|
|
* [kernel_end, end) to make memory above the kernel be mapped
|
|
* as soon as possible. And then use page tables allocated above
|
|
* the kernel to map [ISA_END_ADDRESS, kernel_end).
|
|
*/
|
|
memory_map_bottom_up(kernel_end, end);
|
|
memory_map_bottom_up(ISA_END_ADDRESS, kernel_end);
|
|
} else {
|
|
memory_map_top_down(ISA_END_ADDRESS, end);
|
|
}
|
|
|
|
#ifdef CONFIG_X86_64
|
|
if (max_pfn > max_low_pfn) {
|
|
/* can we preseve max_low_pfn ?*/
|
|
max_low_pfn = max_pfn;
|
|
}
|
|
#else
|
|
early_ioremap_page_table_range_init();
|
|
#endif
|
|
|
|
load_cr3(swapper_pg_dir);
|
|
__flush_tlb_all();
|
|
|
|
early_memtest(0, max_pfn_mapped << PAGE_SHIFT);
|
|
}
|
|
|
|
/*
|
|
* devmem_is_allowed() checks to see if /dev/mem access to a certain address
|
|
* is valid. The argument is a physical page number.
|
|
*
|
|
* On x86, access has to be given to the first megabyte of RAM because that
|
|
* area traditionally contains BIOS code and data regions used by X, dosemu,
|
|
* and similar apps. Since they map the entire memory range, the whole range
|
|
* must be allowed (for mapping), but any areas that would otherwise be
|
|
* disallowed are flagged as being "zero filled" instead of rejected.
|
|
* Access has to be given to non-kernel-ram areas as well, these contain the
|
|
* PCI mmio resources as well as potential bios/acpi data regions.
|
|
*/
|
|
int devmem_is_allowed(unsigned long pagenr)
|
|
{
|
|
if (region_intersects(PFN_PHYS(pagenr), PAGE_SIZE,
|
|
IORESOURCE_SYSTEM_RAM, IORES_DESC_NONE)
|
|
!= REGION_DISJOINT) {
|
|
/*
|
|
* For disallowed memory regions in the low 1MB range,
|
|
* request that the page be shown as all zeros.
|
|
*/
|
|
if (pagenr < 256)
|
|
return 2;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* This must follow RAM test, since System RAM is considered a
|
|
* restricted resource under CONFIG_STRICT_IOMEM.
|
|
*/
|
|
if (iomem_is_exclusive(pagenr << PAGE_SHIFT)) {
|
|
/* Low 1MB bypasses iomem restrictions. */
|
|
if (pagenr < 256)
|
|
return 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
return 1;
|
|
}
|
|
|
|
void free_init_pages(char *what, unsigned long begin, unsigned long end)
|
|
{
|
|
unsigned long begin_aligned, end_aligned;
|
|
|
|
/* Make sure boundaries are page aligned */
|
|
begin_aligned = PAGE_ALIGN(begin);
|
|
end_aligned = end & PAGE_MASK;
|
|
|
|
if (WARN_ON(begin_aligned != begin || end_aligned != end)) {
|
|
begin = begin_aligned;
|
|
end = end_aligned;
|
|
}
|
|
|
|
if (begin >= end)
|
|
return;
|
|
|
|
/*
|
|
* If debugging page accesses then do not free this memory but
|
|
* mark them not present - any buggy init-section access will
|
|
* create a kernel page fault:
|
|
*/
|
|
if (debug_pagealloc_enabled()) {
|
|
pr_info("debug: unmapping init [mem %#010lx-%#010lx]\n",
|
|
begin, end - 1);
|
|
set_memory_np(begin, (end - begin) >> PAGE_SHIFT);
|
|
} else {
|
|
/*
|
|
* We just marked the kernel text read only above, now that
|
|
* we are going to free part of that, we need to make that
|
|
* writeable and non-executable first.
|
|
*/
|
|
set_memory_nx(begin, (end - begin) >> PAGE_SHIFT);
|
|
set_memory_rw(begin, (end - begin) >> PAGE_SHIFT);
|
|
|
|
free_reserved_area((void *)begin, (void *)end,
|
|
POISON_FREE_INITMEM, what);
|
|
}
|
|
}
|
|
|
|
void __ref free_initmem(void)
|
|
{
|
|
e820_reallocate_tables();
|
|
|
|
free_init_pages("unused kernel",
|
|
(unsigned long)(&__init_begin),
|
|
(unsigned long)(&__init_end));
|
|
}
|
|
|
|
#ifdef CONFIG_BLK_DEV_INITRD
|
|
void __init free_initrd_mem(unsigned long start, unsigned long end)
|
|
{
|
|
/*
|
|
* end could be not aligned, and We can not align that,
|
|
* decompresser could be confused by aligned initrd_end
|
|
* We already reserve the end partial page before in
|
|
* - i386_start_kernel()
|
|
* - x86_64_start_kernel()
|
|
* - relocate_initrd()
|
|
* So here We can do PAGE_ALIGN() safely to get partial page to be freed
|
|
*/
|
|
free_init_pages("initrd", start, PAGE_ALIGN(end));
|
|
}
|
|
#endif
|
|
|
|
void __init zone_sizes_init(void)
|
|
{
|
|
unsigned long max_zone_pfns[MAX_NR_ZONES];
|
|
|
|
memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
|
|
|
|
#ifdef CONFIG_ZONE_DMA
|
|
max_zone_pfns[ZONE_DMA] = min(MAX_DMA_PFN, max_low_pfn);
|
|
#endif
|
|
#ifdef CONFIG_ZONE_DMA32
|
|
max_zone_pfns[ZONE_DMA32] = min(MAX_DMA32_PFN, max_low_pfn);
|
|
#endif
|
|
max_zone_pfns[ZONE_NORMAL] = max_low_pfn;
|
|
#ifdef CONFIG_HIGHMEM
|
|
max_zone_pfns[ZONE_HIGHMEM] = max_pfn;
|
|
#endif
|
|
|
|
free_area_init_nodes(max_zone_pfns);
|
|
}
|
|
|
|
DEFINE_PER_CPU_SHARED_ALIGNED(struct tlb_state, cpu_tlbstate) = {
|
|
.active_mm = &init_mm,
|
|
.state = 0,
|
|
.cr4 = ~0UL, /* fail hard if we screw up cr4 shadow initialization */
|
|
};
|
|
EXPORT_PER_CPU_SYMBOL(cpu_tlbstate);
|
|
|
|
void update_cache_mode_entry(unsigned entry, enum page_cache_mode cache)
|
|
{
|
|
/* entry 0 MUST be WB (hardwired to speed up translations) */
|
|
BUG_ON(!entry && cache != _PAGE_CACHE_MODE_WB);
|
|
|
|
__cachemode2pte_tbl[cache] = __cm_idx2pte(entry);
|
|
__pte2cachemode_tbl[entry] = cache;
|
|
}
|
|
|
|
#ifdef CONFIG_SWAP
|
|
unsigned long max_swapfile_size(void)
|
|
{
|
|
unsigned long pages;
|
|
|
|
pages = generic_max_swapfile_size();
|
|
|
|
if (boot_cpu_has_bug(X86_BUG_L1TF) && l1tf_mitigation != L1TF_MITIGATION_OFF) {
|
|
/* Limit the swap file size to MAX_PA/2 for L1TF workaround */
|
|
unsigned long long l1tf_limit = l1tf_pfn_limit();
|
|
/*
|
|
* We encode swap offsets also with 3 bits below those for pfn
|
|
* which makes the usable limit higher.
|
|
*/
|
|
#if CONFIG_PGTABLE_LEVELS > 2
|
|
l1tf_limit <<= PAGE_SHIFT - SWP_OFFSET_FIRST_BIT;
|
|
#endif
|
|
pages = min_t(unsigned long long, l1tf_limit, pages);
|
|
}
|
|
return pages;
|
|
}
|
|
#endif
|