159 lines
3.8 KiB
C
159 lines
3.8 KiB
C
/*
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* Marvell Armada 37xx SoC Time Base Generator clocks
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*
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* Copyright (C) 2016 Marvell
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*
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* Gregory CLEMENT <gregory.clement@free-electrons.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2 or later. This program is licensed "as is"
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* without any warranty of any kind, whether express or implied.
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*/
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#include <linux/clk-provider.h>
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#include <linux/clk.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#define NUM_TBG 4
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#define TBG_CTRL0 0x4
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#define TBG_CTRL1 0x8
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#define TBG_CTRL7 0x20
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#define TBG_CTRL8 0x30
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#define TBG_DIV_MASK 0x1FF
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#define TBG_A_REFDIV 0
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#define TBG_B_REFDIV 16
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#define TBG_A_FBDIV 2
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#define TBG_B_FBDIV 18
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#define TBG_A_VCODIV_SE 0
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#define TBG_B_VCODIV_SE 16
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#define TBG_A_VCODIV_DIFF 1
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#define TBG_B_VCODIV_DIFF 17
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struct tbg_def {
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char *name;
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u32 refdiv_offset;
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u32 fbdiv_offset;
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u32 vcodiv_reg;
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u32 vcodiv_offset;
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};
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static const struct tbg_def tbg[NUM_TBG] = {
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{"TBG-A-P", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL8, TBG_A_VCODIV_DIFF},
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{"TBG-B-P", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL8, TBG_B_VCODIV_DIFF},
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{"TBG-A-S", TBG_A_REFDIV, TBG_A_FBDIV, TBG_CTRL1, TBG_A_VCODIV_SE},
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{"TBG-B-S", TBG_B_REFDIV, TBG_B_FBDIV, TBG_CTRL1, TBG_B_VCODIV_SE},
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};
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static unsigned int tbg_get_mult(void __iomem *reg, const struct tbg_def *ptbg)
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{
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u32 val;
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val = readl(reg + TBG_CTRL0);
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return ((val >> ptbg->fbdiv_offset) & TBG_DIV_MASK) << 2;
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}
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static unsigned int tbg_get_div(void __iomem *reg, const struct tbg_def *ptbg)
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{
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u32 val;
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unsigned int div;
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val = readl(reg + TBG_CTRL7);
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div = (val >> ptbg->refdiv_offset) & TBG_DIV_MASK;
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if (div == 0)
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div = 1;
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val = readl(reg + ptbg->vcodiv_reg);
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div *= 1 << ((val >> ptbg->vcodiv_offset) & TBG_DIV_MASK);
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return div;
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}
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static int armada_3700_tbg_clock_probe(struct platform_device *pdev)
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{
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struct device_node *np = pdev->dev.of_node;
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struct clk_hw_onecell_data *hw_tbg_data;
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struct device *dev = &pdev->dev;
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const char *parent_name;
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struct resource *res;
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struct clk *parent;
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void __iomem *reg;
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int i, ret;
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hw_tbg_data = devm_kzalloc(&pdev->dev, sizeof(*hw_tbg_data)
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+ sizeof(*hw_tbg_data->hws) * NUM_TBG,
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GFP_KERNEL);
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if (!hw_tbg_data)
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return -ENOMEM;
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hw_tbg_data->num = NUM_TBG;
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platform_set_drvdata(pdev, hw_tbg_data);
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parent = devm_clk_get(dev, NULL);
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if (IS_ERR(parent)) {
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dev_err(dev, "Could get the clock parent\n");
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return -EINVAL;
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}
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parent_name = __clk_get_name(parent);
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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reg = devm_ioremap_resource(dev, res);
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if (IS_ERR(reg))
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return PTR_ERR(reg);
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for (i = 0; i < NUM_TBG; i++) {
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const char *name;
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unsigned int mult, div;
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name = tbg[i].name;
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mult = tbg_get_mult(reg, &tbg[i]);
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div = tbg_get_div(reg, &tbg[i]);
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hw_tbg_data->hws[i] = clk_hw_register_fixed_factor(NULL, name,
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parent_name, 0, mult, div);
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if (IS_ERR(hw_tbg_data->hws[i]))
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dev_err(dev, "Can't register TBG clock %s\n", name);
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}
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ret = of_clk_add_hw_provider(np, of_clk_hw_onecell_get, hw_tbg_data);
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return ret;
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}
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static int armada_3700_tbg_clock_remove(struct platform_device *pdev)
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{
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int i;
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struct clk_hw_onecell_data *hw_tbg_data = platform_get_drvdata(pdev);
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of_clk_del_provider(pdev->dev.of_node);
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for (i = 0; i < hw_tbg_data->num; i++)
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clk_hw_unregister_fixed_factor(hw_tbg_data->hws[i]);
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return 0;
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}
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static const struct of_device_id armada_3700_tbg_clock_of_match[] = {
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{ .compatible = "marvell,armada-3700-tbg-clock", },
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{ }
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};
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static struct platform_driver armada_3700_tbg_clock_driver = {
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.probe = armada_3700_tbg_clock_probe,
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.remove = armada_3700_tbg_clock_remove,
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.driver = {
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.name = "marvell-armada-3700-tbg-clock",
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.of_match_table = armada_3700_tbg_clock_of_match,
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},
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};
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builtin_platform_driver(armada_3700_tbg_clock_driver);
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