691 lines
18 KiB
C
691 lines
18 KiB
C
/*
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* Copyright (C) 2002 - 2005 Benjamin Herrenschmidt <benh@kernel.crashing.org>
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* Copyright (C) 2004 John Steele Scott <toojays@toojays.net>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* TODO: Need a big cleanup here. Basically, we need to have different
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* cpufreq_driver structures for the different type of HW instead of the
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* current mess. We also need to better deal with the detection of the
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* type of machine.
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*
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/errno.h>
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#include <linux/kernel.h>
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#include <linux/delay.h>
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#include <linux/sched.h>
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#include <linux/adb.h>
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#include <linux/pmu.h>
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#include <linux/cpufreq.h>
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#include <linux/init.h>
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#include <linux/device.h>
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#include <linux/hardirq.h>
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#include <linux/of_device.h>
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#include <asm/prom.h>
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#include <asm/machdep.h>
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#include <asm/irq.h>
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#include <asm/pmac_feature.h>
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#include <asm/mmu_context.h>
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#include <asm/sections.h>
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#include <asm/cputable.h>
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#include <asm/time.h>
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#include <asm/mpic.h>
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#include <asm/keylargo.h>
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#include <asm/switch_to.h>
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/* WARNING !!! This will cause calibrate_delay() to be called,
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* but this is an __init function ! So you MUST go edit
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* init/main.c to make it non-init before enabling DEBUG_FREQ
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*/
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#undef DEBUG_FREQ
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extern void low_choose_7447a_dfs(int dfs);
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extern void low_choose_750fx_pll(int pll);
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extern void low_sleep_handler(void);
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/*
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* Currently, PowerMac cpufreq supports only high & low frequencies
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* that are set by the firmware
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*/
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static unsigned int low_freq;
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static unsigned int hi_freq;
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static unsigned int cur_freq;
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static unsigned int sleep_freq;
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static unsigned long transition_latency;
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/*
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* Different models uses different mechanisms to switch the frequency
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*/
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static int (*set_speed_proc)(int low_speed);
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static unsigned int (*get_speed_proc)(void);
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/*
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* Some definitions used by the various speedprocs
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*/
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static u32 voltage_gpio;
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static u32 frequency_gpio;
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static u32 slew_done_gpio;
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static int no_schedule;
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static int has_cpu_l2lve;
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static int is_pmu_based;
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/* There are only two frequency states for each processor. Values
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* are in kHz for the time being.
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*/
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#define CPUFREQ_HIGH 0
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#define CPUFREQ_LOW 1
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static struct cpufreq_frequency_table pmac_cpu_freqs[] = {
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{0, CPUFREQ_HIGH, 0},
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{0, CPUFREQ_LOW, 0},
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{0, 0, CPUFREQ_TABLE_END},
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};
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static inline void local_delay(unsigned long ms)
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{
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if (no_schedule)
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mdelay(ms);
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else
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msleep(ms);
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}
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#ifdef DEBUG_FREQ
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static inline void debug_calc_bogomips(void)
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{
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/* This will cause a recalc of bogomips and display the
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* result. We backup/restore the value to avoid affecting the
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* core cpufreq framework's own calculation.
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*/
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unsigned long save_lpj = loops_per_jiffy;
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calibrate_delay();
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loops_per_jiffy = save_lpj;
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}
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#endif /* DEBUG_FREQ */
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/* Switch CPU speed under 750FX CPU control
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*/
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static int cpu_750fx_cpu_speed(int low_speed)
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{
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u32 hid2;
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if (low_speed == 0) {
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/* ramping up, set voltage first */
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pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
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/* Make sure we sleep for at least 1ms */
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local_delay(10);
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/* tweak L2 for high voltage */
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if (has_cpu_l2lve) {
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hid2 = mfspr(SPRN_HID2);
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hid2 &= ~0x2000;
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mtspr(SPRN_HID2, hid2);
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}
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}
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#ifdef CONFIG_6xx
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low_choose_750fx_pll(low_speed);
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#endif
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if (low_speed == 1) {
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/* tweak L2 for low voltage */
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if (has_cpu_l2lve) {
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hid2 = mfspr(SPRN_HID2);
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hid2 |= 0x2000;
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mtspr(SPRN_HID2, hid2);
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}
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/* ramping down, set voltage last */
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pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
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local_delay(10);
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}
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return 0;
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}
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static unsigned int cpu_750fx_get_cpu_speed(void)
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{
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if (mfspr(SPRN_HID1) & HID1_PS)
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return low_freq;
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else
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return hi_freq;
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}
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/* Switch CPU speed using DFS */
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static int dfs_set_cpu_speed(int low_speed)
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{
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if (low_speed == 0) {
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/* ramping up, set voltage first */
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pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
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/* Make sure we sleep for at least 1ms */
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local_delay(1);
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}
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/* set frequency */
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#ifdef CONFIG_6xx
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low_choose_7447a_dfs(low_speed);
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#endif
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udelay(100);
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if (low_speed == 1) {
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/* ramping down, set voltage last */
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pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
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local_delay(1);
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}
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return 0;
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}
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static unsigned int dfs_get_cpu_speed(void)
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{
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if (mfspr(SPRN_HID1) & HID1_DFS)
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return low_freq;
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else
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return hi_freq;
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}
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/* Switch CPU speed using slewing GPIOs
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*/
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static int gpios_set_cpu_speed(int low_speed)
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{
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int gpio, timeout = 0;
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/* If ramping up, set voltage first */
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if (low_speed == 0) {
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pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x05);
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/* Delay is way too big but it's ok, we schedule */
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local_delay(10);
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}
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/* Set frequency */
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gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
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if (low_speed == ((gpio & 0x01) == 0))
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goto skip;
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pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, frequency_gpio,
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low_speed ? 0x04 : 0x05);
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udelay(200);
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do {
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if (++timeout > 100)
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break;
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local_delay(1);
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gpio = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, slew_done_gpio, 0);
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} while((gpio & 0x02) == 0);
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skip:
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/* If ramping down, set voltage last */
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if (low_speed == 1) {
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pmac_call_feature(PMAC_FTR_WRITE_GPIO, NULL, voltage_gpio, 0x04);
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/* Delay is way too big but it's ok, we schedule */
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local_delay(10);
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}
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#ifdef DEBUG_FREQ
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debug_calc_bogomips();
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#endif
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return 0;
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}
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/* Switch CPU speed under PMU control
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*/
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static int pmu_set_cpu_speed(int low_speed)
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{
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struct adb_request req;
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unsigned long save_l2cr;
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unsigned long save_l3cr;
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unsigned int pic_prio;
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unsigned long flags;
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preempt_disable();
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#ifdef DEBUG_FREQ
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printk(KERN_DEBUG "HID1, before: %x\n", mfspr(SPRN_HID1));
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#endif
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pmu_suspend();
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/* Disable all interrupt sources on openpic */
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pic_prio = mpic_cpu_get_priority();
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mpic_cpu_set_priority(0xf);
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/* Make sure the decrementer won't interrupt us */
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asm volatile("mtdec %0" : : "r" (0x7fffffff));
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/* Make sure any pending DEC interrupt occurring while we did
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* the above didn't re-enable the DEC */
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mb();
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asm volatile("mtdec %0" : : "r" (0x7fffffff));
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/* We can now disable MSR_EE */
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local_irq_save(flags);
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/* Giveup the FPU & vec */
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enable_kernel_fp();
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#ifdef CONFIG_ALTIVEC
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if (cpu_has_feature(CPU_FTR_ALTIVEC))
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enable_kernel_altivec();
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#endif /* CONFIG_ALTIVEC */
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/* Save & disable L2 and L3 caches */
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save_l3cr = _get_L3CR(); /* (returns -1 if not available) */
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save_l2cr = _get_L2CR(); /* (returns -1 if not available) */
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/* Send the new speed command. My assumption is that this command
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* will cause PLL_CFG[0..3] to be changed next time CPU goes to sleep
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*/
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pmu_request(&req, NULL, 6, PMU_CPU_SPEED, 'W', 'O', 'O', 'F', low_speed);
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while (!req.complete)
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pmu_poll();
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/* Prepare the northbridge for the speed transition */
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pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,1);
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/* Call low level code to backup CPU state and recover from
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* hardware reset
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*/
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low_sleep_handler();
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/* Restore the northbridge */
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pmac_call_feature(PMAC_FTR_SLEEP_STATE,NULL,1,0);
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/* Restore L2 cache */
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if (save_l2cr != 0xffffffff && (save_l2cr & L2CR_L2E) != 0)
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_set_L2CR(save_l2cr);
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/* Restore L3 cache */
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if (save_l3cr != 0xffffffff && (save_l3cr & L3CR_L3E) != 0)
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_set_L3CR(save_l3cr);
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/* Restore userland MMU context */
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switch_mmu_context(NULL, current->active_mm, NULL);
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#ifdef DEBUG_FREQ
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printk(KERN_DEBUG "HID1, after: %x\n", mfspr(SPRN_HID1));
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#endif
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/* Restore low level PMU operations */
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pmu_unlock();
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/*
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* Restore decrementer; we'll take a decrementer interrupt
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* as soon as interrupts are re-enabled and the generic
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* clockevents code will reprogram it with the right value.
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*/
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set_dec(1);
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/* Restore interrupts */
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mpic_cpu_set_priority(pic_prio);
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/* Let interrupts flow again ... */
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local_irq_restore(flags);
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#ifdef DEBUG_FREQ
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debug_calc_bogomips();
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#endif
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pmu_resume();
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preempt_enable();
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return 0;
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}
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static int do_set_cpu_speed(struct cpufreq_policy *policy, int speed_mode)
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{
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unsigned long l3cr;
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static unsigned long prev_l3cr;
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if (speed_mode == CPUFREQ_LOW &&
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cpu_has_feature(CPU_FTR_L3CR)) {
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l3cr = _get_L3CR();
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if (l3cr & L3CR_L3E) {
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prev_l3cr = l3cr;
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_set_L3CR(0);
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}
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}
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set_speed_proc(speed_mode == CPUFREQ_LOW);
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if (speed_mode == CPUFREQ_HIGH &&
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cpu_has_feature(CPU_FTR_L3CR)) {
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l3cr = _get_L3CR();
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if ((prev_l3cr & L3CR_L3E) && l3cr != prev_l3cr)
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_set_L3CR(prev_l3cr);
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}
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cur_freq = (speed_mode == CPUFREQ_HIGH) ? hi_freq : low_freq;
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return 0;
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}
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static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
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{
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return cur_freq;
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}
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static int pmac_cpufreq_target( struct cpufreq_policy *policy,
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unsigned int index)
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{
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int rc;
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rc = do_set_cpu_speed(policy, index);
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ppc_proc_freq = cur_freq * 1000ul;
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return rc;
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}
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static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
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{
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return cpufreq_generic_init(policy, pmac_cpu_freqs, transition_latency);
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}
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static u32 read_gpio(struct device_node *np)
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{
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const u32 *reg = of_get_property(np, "reg", NULL);
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u32 offset;
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if (reg == NULL)
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return 0;
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/* That works for all keylargos but shall be fixed properly
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* some day... The problem is that it seems we can't rely
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* on the "reg" property of the GPIO nodes, they are either
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* relative to the base of KeyLargo or to the base of the
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* GPIO space, and the device-tree doesn't help.
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*/
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offset = *reg;
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if (offset < KEYLARGO_GPIO_LEVELS0)
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offset += KEYLARGO_GPIO_LEVELS0;
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return offset;
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}
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static int pmac_cpufreq_suspend(struct cpufreq_policy *policy)
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{
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/* Ok, this could be made a bit smarter, but let's be robust for now. We
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* always force a speed change to high speed before sleep, to make sure
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* we have appropriate voltage and/or bus speed for the wakeup process,
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* and to make sure our loops_per_jiffies are "good enough", that is will
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* not cause too short delays if we sleep in low speed and wake in high
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* speed..
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*/
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no_schedule = 1;
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sleep_freq = cur_freq;
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if (cur_freq == low_freq && !is_pmu_based)
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do_set_cpu_speed(policy, CPUFREQ_HIGH);
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return 0;
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}
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static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
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{
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/* If we resume, first check if we have a get() function */
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if (get_speed_proc)
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cur_freq = get_speed_proc();
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else
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cur_freq = 0;
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/* We don't, hrm... we don't really know our speed here, best
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* is that we force a switch to whatever it was, which is
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* probably high speed due to our suspend() routine
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*/
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do_set_cpu_speed(policy, sleep_freq == low_freq ?
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CPUFREQ_LOW : CPUFREQ_HIGH);
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ppc_proc_freq = cur_freq * 1000ul;
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no_schedule = 0;
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return 0;
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}
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static struct cpufreq_driver pmac_cpufreq_driver = {
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.verify = cpufreq_generic_frequency_table_verify,
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.target_index = pmac_cpufreq_target,
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.get = pmac_cpufreq_get_speed,
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.init = pmac_cpufreq_cpu_init,
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.suspend = pmac_cpufreq_suspend,
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.resume = pmac_cpufreq_resume,
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.flags = CPUFREQ_PM_NO_WARN,
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.attr = cpufreq_generic_attr,
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.name = "powermac",
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};
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static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
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{
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struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
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"voltage-gpio");
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struct device_node *freq_gpio_np = of_find_node_by_name(NULL,
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"frequency-gpio");
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struct device_node *slew_done_gpio_np = of_find_node_by_name(NULL,
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"slewing-done");
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const u32 *value;
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/*
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* Check to see if it's GPIO driven or PMU only
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*
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* The way we extract the GPIO address is slightly hackish, but it
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* works well enough for now. We need to abstract the whole GPIO
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* stuff sooner or later anyway
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*/
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if (volt_gpio_np)
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voltage_gpio = read_gpio(volt_gpio_np);
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if (freq_gpio_np)
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frequency_gpio = read_gpio(freq_gpio_np);
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if (slew_done_gpio_np)
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slew_done_gpio = read_gpio(slew_done_gpio_np);
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/* If we use the frequency GPIOs, calculate the min/max speeds based
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* on the bus frequencies
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*/
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if (frequency_gpio && slew_done_gpio) {
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int lenp, rc;
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const u32 *freqs, *ratio;
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freqs = of_get_property(cpunode, "bus-frequencies", &lenp);
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lenp /= sizeof(u32);
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if (freqs == NULL || lenp != 2) {
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pr_err("bus-frequencies incorrect or missing\n");
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return 1;
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}
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ratio = of_get_property(cpunode, "processor-to-bus-ratio*2",
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NULL);
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if (ratio == NULL) {
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pr_err("processor-to-bus-ratio*2 missing\n");
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return 1;
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}
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/* Get the min/max bus frequencies */
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low_freq = min(freqs[0], freqs[1]);
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hi_freq = max(freqs[0], freqs[1]);
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/* Grrrr.. It _seems_ that the device-tree is lying on the low bus
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* frequency, it claims it to be around 84Mhz on some models while
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* it appears to be approx. 101Mhz on all. Let's hack around here...
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* fortunately, we don't need to be too precise
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*/
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if (low_freq < 98000000)
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low_freq = 101000000;
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/* Convert those to CPU core clocks */
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low_freq = (low_freq * (*ratio)) / 2000;
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hi_freq = (hi_freq * (*ratio)) / 2000;
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/* Now we get the frequencies, we read the GPIO to see what is out current
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* speed
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*/
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rc = pmac_call_feature(PMAC_FTR_READ_GPIO, NULL, frequency_gpio, 0);
|
|
cur_freq = (rc & 0x01) ? hi_freq : low_freq;
|
|
|
|
set_speed_proc = gpios_set_cpu_speed;
|
|
return 1;
|
|
}
|
|
|
|
/* If we use the PMU, look for the min & max frequencies in the
|
|
* device-tree
|
|
*/
|
|
value = of_get_property(cpunode, "min-clock-frequency", NULL);
|
|
if (!value)
|
|
return 1;
|
|
low_freq = (*value) / 1000;
|
|
/* The PowerBook G4 12" (PowerBook6,1) has an error in the device-tree
|
|
* here */
|
|
if (low_freq < 100000)
|
|
low_freq *= 10;
|
|
|
|
value = of_get_property(cpunode, "max-clock-frequency", NULL);
|
|
if (!value)
|
|
return 1;
|
|
hi_freq = (*value) / 1000;
|
|
set_speed_proc = pmu_set_cpu_speed;
|
|
is_pmu_based = 1;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
|
|
{
|
|
struct device_node *volt_gpio_np;
|
|
|
|
if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
|
|
return 1;
|
|
|
|
volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
|
|
if (volt_gpio_np)
|
|
voltage_gpio = read_gpio(volt_gpio_np);
|
|
of_node_put(volt_gpio_np);
|
|
if (!voltage_gpio){
|
|
pr_err("missing cpu-vcore-select gpio\n");
|
|
return 1;
|
|
}
|
|
|
|
/* OF only reports the high frequency */
|
|
hi_freq = cur_freq;
|
|
low_freq = cur_freq/2;
|
|
|
|
/* Read actual frequency from CPU */
|
|
cur_freq = dfs_get_cpu_speed();
|
|
set_speed_proc = dfs_set_cpu_speed;
|
|
get_speed_proc = dfs_get_cpu_speed;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
|
|
{
|
|
struct device_node *volt_gpio_np;
|
|
u32 pvr;
|
|
const u32 *value;
|
|
|
|
if (of_get_property(cpunode, "dynamic-power-step", NULL) == NULL)
|
|
return 1;
|
|
|
|
hi_freq = cur_freq;
|
|
value = of_get_property(cpunode, "reduced-clock-frequency", NULL);
|
|
if (!value)
|
|
return 1;
|
|
low_freq = (*value) / 1000;
|
|
|
|
volt_gpio_np = of_find_node_by_name(NULL, "cpu-vcore-select");
|
|
if (volt_gpio_np)
|
|
voltage_gpio = read_gpio(volt_gpio_np);
|
|
|
|
of_node_put(volt_gpio_np);
|
|
pvr = mfspr(SPRN_PVR);
|
|
has_cpu_l2lve = !((pvr & 0xf00) == 0x100);
|
|
|
|
set_speed_proc = cpu_750fx_cpu_speed;
|
|
get_speed_proc = cpu_750fx_get_cpu_speed;
|
|
cur_freq = cpu_750fx_get_cpu_speed();
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Currently, we support the following machines:
|
|
*
|
|
* - Titanium PowerBook 1Ghz (PMU based, 667Mhz & 1Ghz)
|
|
* - Titanium PowerBook 800 (PMU based, 667Mhz & 800Mhz)
|
|
* - Titanium PowerBook 400 (PMU based, 300Mhz & 400Mhz)
|
|
* - Titanium PowerBook 500 (PMU based, 300Mhz & 500Mhz)
|
|
* - iBook2 500/600 (PMU based, 400Mhz & 500/600Mhz)
|
|
* - iBook2 700 (CPU based, 400Mhz & 700Mhz, support low voltage)
|
|
* - Recent MacRISC3 laptops
|
|
* - All new machines with 7447A CPUs
|
|
*/
|
|
static int __init pmac_cpufreq_setup(void)
|
|
{
|
|
struct device_node *cpunode;
|
|
const u32 *value;
|
|
|
|
if (strstr(boot_command_line, "nocpufreq"))
|
|
return 0;
|
|
|
|
/* Get first CPU node */
|
|
cpunode = of_cpu_device_node_get(0);
|
|
if (!cpunode)
|
|
goto out;
|
|
|
|
/* Get current cpu clock freq */
|
|
value = of_get_property(cpunode, "clock-frequency", NULL);
|
|
if (!value)
|
|
goto out;
|
|
cur_freq = (*value) / 1000;
|
|
transition_latency = CPUFREQ_ETERNAL;
|
|
|
|
/* Check for 7447A based MacRISC3 */
|
|
if (of_machine_is_compatible("MacRISC3") &&
|
|
of_get_property(cpunode, "dynamic-power-step", NULL) &&
|
|
PVR_VER(mfspr(SPRN_PVR)) == 0x8003) {
|
|
pmac_cpufreq_init_7447A(cpunode);
|
|
transition_latency = 8000000;
|
|
/* Check for other MacRISC3 machines */
|
|
} else if (of_machine_is_compatible("PowerBook3,4") ||
|
|
of_machine_is_compatible("PowerBook3,5") ||
|
|
of_machine_is_compatible("MacRISC3")) {
|
|
pmac_cpufreq_init_MacRISC3(cpunode);
|
|
/* Else check for iBook2 500/600 */
|
|
} else if (of_machine_is_compatible("PowerBook4,1")) {
|
|
hi_freq = cur_freq;
|
|
low_freq = 400000;
|
|
set_speed_proc = pmu_set_cpu_speed;
|
|
is_pmu_based = 1;
|
|
}
|
|
/* Else check for TiPb 550 */
|
|
else if (of_machine_is_compatible("PowerBook3,3") && cur_freq == 550000) {
|
|
hi_freq = cur_freq;
|
|
low_freq = 500000;
|
|
set_speed_proc = pmu_set_cpu_speed;
|
|
is_pmu_based = 1;
|
|
}
|
|
/* Else check for TiPb 400 & 500 */
|
|
else if (of_machine_is_compatible("PowerBook3,2")) {
|
|
/* We only know about the 400 MHz and the 500Mhz model
|
|
* they both have 300 MHz as low frequency
|
|
*/
|
|
if (cur_freq < 350000 || cur_freq > 550000)
|
|
goto out;
|
|
hi_freq = cur_freq;
|
|
low_freq = 300000;
|
|
set_speed_proc = pmu_set_cpu_speed;
|
|
is_pmu_based = 1;
|
|
}
|
|
/* Else check for 750FX */
|
|
else if (PVR_VER(mfspr(SPRN_PVR)) == 0x7000)
|
|
pmac_cpufreq_init_750FX(cpunode);
|
|
out:
|
|
of_node_put(cpunode);
|
|
if (set_speed_proc == NULL)
|
|
return -ENODEV;
|
|
|
|
pmac_cpu_freqs[CPUFREQ_LOW].frequency = low_freq;
|
|
pmac_cpu_freqs[CPUFREQ_HIGH].frequency = hi_freq;
|
|
ppc_proc_freq = cur_freq * 1000ul;
|
|
|
|
pr_info("Registering PowerMac CPU frequency driver\n");
|
|
pr_info("Low: %d Mhz, High: %d Mhz, Boot: %d Mhz\n",
|
|
low_freq/1000, hi_freq/1000, cur_freq/1000);
|
|
|
|
return cpufreq_register_driver(&pmac_cpufreq_driver);
|
|
}
|
|
|
|
module_init(pmac_cpufreq_setup);
|
|
|