438 lines
12 KiB
C
438 lines
12 KiB
C
/*
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* Copyright 2015 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include "eventmgr.h"
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#include "eventinit.h"
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#include "eventmanagement.h"
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#include "eventmanager.h"
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#include "hardwaremanager.h"
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#include "eventtasks.h"
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#include "power_state.h"
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#include "hwmgr.h"
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#include "amd_powerplay.h"
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#include "psm.h"
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#define TEMP_RANGE_MIN (90 * 1000)
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#define TEMP_RANGE_MAX (120 * 1000)
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int pem_task_update_allowed_performance_levels(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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if (pem_is_hw_access_blocked(eventmgr))
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return 0;
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phm_force_dpm_levels(eventmgr->hwmgr, AMD_DPM_FORCED_LEVEL_AUTO);
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return 0;
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}
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/* eventtasks_generic.c */
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int pem_task_adjust_power_state(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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struct pp_hwmgr *hwmgr;
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if (pem_is_hw_access_blocked(eventmgr))
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return 0;
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hwmgr = eventmgr->hwmgr;
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if (event_data->pnew_power_state != NULL)
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hwmgr->request_ps = event_data->pnew_power_state;
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if (phm_cap_enabled(eventmgr->platform_descriptor->platformCaps, PHM_PlatformCaps_DynamicPatchPowerState))
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psm_adjust_power_state_dynamic(eventmgr, event_data->skip_state_adjust_rules);
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else
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psm_adjust_power_state_static(eventmgr, event_data->skip_state_adjust_rules);
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return 0;
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}
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int pem_task_power_down_asic(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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return phm_power_down_asic(eventmgr->hwmgr);
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}
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int pem_task_set_boot_state(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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if (pem_is_event_data_valid(event_data->valid_fields, PEM_EventDataValid_RequestedStateID))
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return psm_set_states(eventmgr, &(event_data->requested_state_id));
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return 0;
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}
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int pem_task_reset_boot_state(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_update_new_power_state_clocks(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_system_shutdown(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_register_interrupts(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_unregister_interrupts(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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return pem_unregister_interrupts(eventmgr);
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}
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int pem_task_get_boot_state_id(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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int result;
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result = psm_get_state_by_classification(eventmgr,
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PP_StateClassificationFlag_Boot,
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&(event_data->requested_state_id)
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);
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if (0 == result)
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pem_set_event_data_valid(event_data->valid_fields, PEM_EventDataValid_RequestedStateID);
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else
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pem_unset_event_data_valid(event_data->valid_fields, PEM_EventDataValid_RequestedStateID);
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return result;
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}
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int pem_task_enable_dynamic_state_management(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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return phm_enable_dynamic_state_management(eventmgr->hwmgr);
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}
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int pem_task_disable_dynamic_state_management(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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return phm_disable_dynamic_state_management(eventmgr->hwmgr);
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}
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int pem_task_enable_clock_power_gatings_tasks(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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return phm_enable_clock_power_gatings(eventmgr->hwmgr);
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}
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int pem_task_powerdown_uvd_tasks(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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return phm_powerdown_uvd(eventmgr->hwmgr);
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}
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int pem_task_powerdown_vce_tasks(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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phm_powergate_uvd(eventmgr->hwmgr, true);
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phm_powergate_vce(eventmgr->hwmgr, true);
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return 0;
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}
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int pem_task_disable_clock_power_gatings_tasks(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_start_asic_block_usage(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_stop_asic_block_usage(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_setup_asic(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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return phm_setup_asic(eventmgr->hwmgr);
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}
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int pem_task_cleanup_asic(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_store_dal_configuration(struct pp_eventmgr *eventmgr, const struct amd_display_configuration *display_config)
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{
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/* TODO */
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return 0;
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/*phm_store_dal_configuration_data(eventmgr->hwmgr, display_config) */
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}
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int pem_task_notify_hw_mgr_display_configuration_change(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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if (pem_is_hw_access_blocked(eventmgr))
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return 0;
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return phm_display_configuration_changed(eventmgr->hwmgr);
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}
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int pem_task_notify_hw_mgr_pre_display_configuration_change(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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return 0;
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}
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int pem_task_notify_smc_display_config_after_power_state_adjustment(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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if (pem_is_hw_access_blocked(eventmgr))
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return 0;
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return phm_notify_smc_display_config_after_ps_adjustment(eventmgr->hwmgr);
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}
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int pem_task_block_adjust_power_state(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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eventmgr->block_adjust_power_state = true;
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/* to do PHM_ResetIPSCounter(pEventMgr->pHwMgr);*/
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return 0;
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}
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int pem_task_unblock_adjust_power_state(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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eventmgr->block_adjust_power_state = false;
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return 0;
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}
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int pem_task_notify_power_state_change(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_block_hw_access(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_un_block_hw_access(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_reset_display_phys_access(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_set_cpu_power_state(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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return phm_set_cpu_power_state(eventmgr->hwmgr);
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}
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/*powersaving*/
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int pem_task_set_power_source(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_notify_hw_of_power_source(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_get_power_saving_state(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_reset_power_saving_state(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_set_power_saving_state(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_set_screen_state_on(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_set_screen_state_off(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_enable_voltage_island_power_gating(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_disable_voltage_island_power_gating(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_enable_cgpg(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_disable_cgpg(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_enable_clock_power_gating(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_enable_gfx_clock_gating(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_disable_gfx_clock_gating(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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/* performance */
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int pem_task_set_performance_state(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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if (pem_is_event_data_valid(event_data->valid_fields, PEM_EventDataValid_RequestedStateID))
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return psm_set_states(eventmgr, &(event_data->requested_state_id));
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return 0;
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}
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int pem_task_conditionally_force_3d_performance_state(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_enable_stutter_mode(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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/* TODO */
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return 0;
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}
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int pem_task_get_2D_performance_state_id(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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int result;
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if (eventmgr->features[PP_Feature_PowerPlay].supported &&
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!(eventmgr->features[PP_Feature_PowerPlay].enabled))
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result = psm_get_state_by_classification(eventmgr,
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PP_StateClassificationFlag_Boot,
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&(event_data->requested_state_id));
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else if (eventmgr->features[PP_Feature_User2DPerformance].enabled)
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result = psm_get_state_by_classification(eventmgr,
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PP_StateClassificationFlag_User2DPerformance,
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&(event_data->requested_state_id));
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else
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result = psm_get_ui_state(eventmgr, PP_StateUILabel_Performance,
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&(event_data->requested_state_id));
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if (0 == result)
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pem_set_event_data_valid(event_data->valid_fields, PEM_EventDataValid_RequestedStateID);
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else
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pem_unset_event_data_valid(event_data->valid_fields, PEM_EventDataValid_RequestedStateID);
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return result;
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}
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int pem_task_create_user_performance_state(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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struct pp_power_state *state;
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int table_entries;
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struct pp_hwmgr *hwmgr = eventmgr->hwmgr;
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int i;
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table_entries = hwmgr->num_ps;
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state = hwmgr->ps;
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restart_search:
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for (i = 0; i < table_entries; i++) {
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if (state->classification.ui_label & event_data->requested_ui_label) {
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event_data->pnew_power_state = state;
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return 0;
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}
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state = (struct pp_power_state *)((unsigned long)state + hwmgr->ps_size);
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}
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switch (event_data->requested_ui_label) {
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case PP_StateUILabel_Battery:
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case PP_StateUILabel_Balanced:
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event_data->requested_ui_label = PP_StateUILabel_Performance;
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goto restart_search;
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default:
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break;
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}
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return -1;
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}
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int pem_task_initialize_thermal_controller(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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struct PP_TemperatureRange range;
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range.max = TEMP_RANGE_MAX;
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range.min = TEMP_RANGE_MIN;
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if (eventmgr == NULL || eventmgr->platform_descriptor == NULL)
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return -EINVAL;
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if (phm_cap_enabled(eventmgr->platform_descriptor->platformCaps, PHM_PlatformCaps_ThermalController))
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return phm_start_thermal_controller(eventmgr->hwmgr, &range);
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return 0;
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}
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int pem_task_uninitialize_thermal_controller(struct pp_eventmgr *eventmgr, struct pem_event_data *event_data)
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{
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return phm_stop_thermal_controller(eventmgr->hwmgr);
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}
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