246 lines
7.5 KiB
C
246 lines
7.5 KiB
C
/* i810_drv.h -- Private header for the Matrox g200/g400 driver -*- linux-c -*-
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* Created: Mon Dec 13 01:50:01 1999 by jhartmann@precisioninsight.com
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*
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* Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
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* Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
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* All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice (including the next
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* paragraph) shall be included in all copies or substantial portions of the
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* Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* Authors: Rickard E. (Rik) Faith <faith@valinux.com>
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* Jeff Hartmann <jhartmann@valinux.com>
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*
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*/
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#ifndef _I810_DRV_H_
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#define _I810_DRV_H_
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#include <drm/drm_legacy.h>
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/* General customization:
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*/
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#define DRIVER_AUTHOR "VA Linux Systems Inc."
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#define DRIVER_NAME "i810"
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#define DRIVER_DESC "Intel i810"
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#define DRIVER_DATE "20030605"
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/* Interface history
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*
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* 1.1 - XFree86 4.1
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* 1.2 - XvMC interfaces
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* - XFree86 4.2
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* 1.2.1 - Disable copying code (leave stub ioctls for backwards compatibility)
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* - Remove requirement for interrupt (leave stubs again)
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* 1.3 - Add page flipping.
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* 1.4 - fix DRM interface
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*/
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#define DRIVER_MAJOR 1
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#define DRIVER_MINOR 4
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#define DRIVER_PATCHLEVEL 0
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typedef struct drm_i810_buf_priv {
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u32 *in_use;
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int my_use_idx;
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int currently_mapped;
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void *virtual;
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void *kernel_virtual;
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drm_local_map_t map;
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} drm_i810_buf_priv_t;
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typedef struct _drm_i810_ring_buffer {
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int tail_mask;
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unsigned long Start;
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unsigned long End;
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unsigned long Size;
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u8 *virtual_start;
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int head;
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int tail;
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int space;
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drm_local_map_t map;
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} drm_i810_ring_buffer_t;
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typedef struct drm_i810_private {
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struct drm_local_map *sarea_map;
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struct drm_local_map *mmio_map;
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drm_i810_sarea_t *sarea_priv;
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drm_i810_ring_buffer_t ring;
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void *hw_status_page;
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unsigned long counter;
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dma_addr_t dma_status_page;
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struct drm_buf *mmap_buffer;
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u32 front_di1, back_di1, zi1;
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int back_offset;
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int depth_offset;
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int overlay_offset;
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int overlay_physical;
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int w, h;
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int pitch;
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int back_pitch;
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int depth_pitch;
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int do_boxes;
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int dma_used;
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int current_page;
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int page_flipping;
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wait_queue_head_t irq_queue;
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atomic_t irq_received;
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atomic_t irq_emitted;
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int front_offset;
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} drm_i810_private_t;
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/* i810_dma.c */
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extern int i810_driver_dma_quiescent(struct drm_device *dev);
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void i810_driver_reclaim_buffers(struct drm_device *dev,
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struct drm_file *file_priv);
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extern int i810_driver_load(struct drm_device *, unsigned long flags);
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extern void i810_driver_lastclose(struct drm_device *dev);
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extern void i810_driver_preclose(struct drm_device *dev,
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struct drm_file *file_priv);
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extern int i810_driver_device_is_agp(struct drm_device *dev);
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extern long i810_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
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extern const struct drm_ioctl_desc i810_ioctls[];
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extern int i810_max_ioctl;
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#define I810_BASE(reg) ((unsigned long) \
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dev_priv->mmio_map->handle)
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#define I810_ADDR(reg) (I810_BASE(reg) + reg)
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#define I810_DEREF(reg) (*(__volatile__ int *)I810_ADDR(reg))
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#define I810_READ(reg) I810_DEREF(reg)
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#define I810_WRITE(reg, val) do { I810_DEREF(reg) = val; } while (0)
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#define I810_DEREF16(reg) (*(__volatile__ u16 *)I810_ADDR(reg))
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#define I810_READ16(reg) I810_DEREF16(reg)
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#define I810_WRITE16(reg, val) do { I810_DEREF16(reg) = val; } while (0)
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#define I810_VERBOSE 0
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#define RING_LOCALS unsigned int outring, ringmask; \
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volatile char *virt;
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#define BEGIN_LP_RING(n) do { \
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if (I810_VERBOSE) \
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DRM_DEBUG("BEGIN_LP_RING(%d)\n", n); \
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if (dev_priv->ring.space < n*4) \
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i810_wait_ring(dev, n*4); \
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dev_priv->ring.space -= n*4; \
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outring = dev_priv->ring.tail; \
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ringmask = dev_priv->ring.tail_mask; \
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virt = dev_priv->ring.virtual_start; \
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} while (0)
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#define ADVANCE_LP_RING() do { \
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if (I810_VERBOSE) \
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DRM_DEBUG("ADVANCE_LP_RING\n"); \
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dev_priv->ring.tail = outring; \
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I810_WRITE(LP_RING + RING_TAIL, outring); \
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} while (0)
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#define OUT_RING(n) do { \
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if (I810_VERBOSE) \
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DRM_DEBUG(" OUT_RING %x\n", (int)(n)); \
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*(volatile unsigned int *)(virt + outring) = n; \
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outring += 4; \
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outring &= ringmask; \
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} while (0)
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#define GFX_OP_USER_INTERRUPT ((0<<29)|(2<<23))
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#define GFX_OP_BREAKPOINT_INTERRUPT ((0<<29)|(1<<23))
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#define CMD_REPORT_HEAD (7<<23)
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#define CMD_STORE_DWORD_IDX ((0x21<<23) | 0x1)
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#define CMD_OP_BATCH_BUFFER ((0x0<<29)|(0x30<<23)|0x1)
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#define INST_PARSER_CLIENT 0x00000000
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#define INST_OP_FLUSH 0x02000000
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#define INST_FLUSH_MAP_CACHE 0x00000001
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#define BB1_START_ADDR_MASK (~0x7)
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#define BB1_PROTECTED (1<<0)
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#define BB1_UNPROTECTED (0<<0)
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#define BB2_END_ADDR_MASK (~0x7)
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#define I810REG_HWSTAM 0x02098
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#define I810REG_INT_IDENTITY_R 0x020a4
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#define I810REG_INT_MASK_R 0x020a8
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#define I810REG_INT_ENABLE_R 0x020a0
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#define LP_RING 0x2030
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#define HP_RING 0x2040
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#define RING_TAIL 0x00
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#define TAIL_ADDR 0x000FFFF8
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#define RING_HEAD 0x04
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#define HEAD_WRAP_COUNT 0xFFE00000
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#define HEAD_WRAP_ONE 0x00200000
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#define HEAD_ADDR 0x001FFFFC
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#define RING_START 0x08
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#define START_ADDR 0x00FFFFF8
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#define RING_LEN 0x0C
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#define RING_NR_PAGES 0x000FF000
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#define RING_REPORT_MASK 0x00000006
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#define RING_REPORT_64K 0x00000002
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#define RING_REPORT_128K 0x00000004
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#define RING_NO_REPORT 0x00000000
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#define RING_VALID_MASK 0x00000001
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#define RING_VALID 0x00000001
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#define RING_INVALID 0x00000000
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#define GFX_OP_SCISSOR ((0x3<<29)|(0x1c<<24)|(0x10<<19))
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#define SC_UPDATE_SCISSOR (0x1<<1)
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#define SC_ENABLE_MASK (0x1<<0)
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#define SC_ENABLE (0x1<<0)
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#define GFX_OP_SCISSOR_INFO ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1))
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#define SCI_YMIN_MASK (0xffff<<16)
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#define SCI_XMIN_MASK (0xffff<<0)
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#define SCI_YMAX_MASK (0xffff<<16)
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#define SCI_XMAX_MASK (0xffff<<0)
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#define GFX_OP_COLOR_FACTOR ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0)
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#define GFX_OP_STIPPLE ((0x3<<29)|(0x1d<<24)|(0x83<<16))
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#define GFX_OP_MAP_INFO ((0x3<<29)|(0x1d<<24)|0x2)
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#define GFX_OP_DESTBUFFER_VARS ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0)
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#define GFX_OP_DRAWRECT_INFO ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3))
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#define GFX_OP_PRIMITIVE ((0x3<<29)|(0x1f<<24))
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#define CMD_OP_Z_BUFFER_INFO ((0x0<<29)|(0x16<<23))
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#define CMD_OP_DESTBUFFER_INFO ((0x0<<29)|(0x15<<23))
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#define CMD_OP_FRONTBUFFER_INFO ((0x0<<29)|(0x14<<23))
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#define CMD_OP_WAIT_FOR_EVENT ((0x0<<29)|(0x03<<23))
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#define BR00_BITBLT_CLIENT 0x40000000
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#define BR00_OP_COLOR_BLT 0x10000000
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#define BR00_OP_SRC_COPY_BLT 0x10C00000
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#define BR13_SOLID_PATTERN 0x80000000
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#define WAIT_FOR_PLANE_A_SCANLINES (1<<1)
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#define WAIT_FOR_PLANE_A_FLIP (1<<2)
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#define WAIT_FOR_VBLANK (1<<3)
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#endif
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