433 lines
13 KiB
C
433 lines
13 KiB
C
/*
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* Copyright(c) 2015, 2016 Intel Corporation.
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* BSD LICENSE
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* - Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* - Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* - Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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#ifndef _HFI1_MAD_H
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#define _HFI1_MAD_H
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#include <rdma/ib_pma.h>
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#include <rdma/opa_smi.h>
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#include <rdma/opa_port_info.h>
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#include "opa_compat.h"
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/*
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* OPA Traps
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*/
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#define OPA_TRAP_GID_NOW_IN_SERVICE cpu_to_be16(64)
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#define OPA_TRAP_GID_OUT_OF_SERVICE cpu_to_be16(65)
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#define OPA_TRAP_ADD_MULTICAST_GROUP cpu_to_be16(66)
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#define OPA_TRAL_DEL_MULTICAST_GROUP cpu_to_be16(67)
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#define OPA_TRAP_UNPATH cpu_to_be16(68)
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#define OPA_TRAP_REPATH cpu_to_be16(69)
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#define OPA_TRAP_PORT_CHANGE_STATE cpu_to_be16(128)
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#define OPA_TRAP_LINK_INTEGRITY cpu_to_be16(129)
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#define OPA_TRAP_EXCESSIVE_BUFFER_OVERRUN cpu_to_be16(130)
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#define OPA_TRAP_FLOW_WATCHDOG cpu_to_be16(131)
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#define OPA_TRAP_CHANGE_CAPABILITY cpu_to_be16(144)
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#define OPA_TRAP_CHANGE_SYSGUID cpu_to_be16(145)
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#define OPA_TRAP_BAD_M_KEY cpu_to_be16(256)
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#define OPA_TRAP_BAD_P_KEY cpu_to_be16(257)
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#define OPA_TRAP_BAD_Q_KEY cpu_to_be16(258)
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#define OPA_TRAP_SWITCH_BAD_PKEY cpu_to_be16(259)
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#define OPA_SMA_TRAP_DATA_LINK_WIDTH cpu_to_be16(2048)
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/*
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* Generic trap/notice other local changes flags (trap 144).
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*/
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#define OPA_NOTICE_TRAP_LWDE_CHG 0x08 /* Link Width Downgrade Enable
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* changed
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*/
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#define OPA_NOTICE_TRAP_LSE_CHG 0x04 /* Link Speed Enable changed */
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#define OPA_NOTICE_TRAP_LWE_CHG 0x02 /* Link Width Enable changed */
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#define OPA_NOTICE_TRAP_NODE_DESC_CHG 0x01
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struct opa_mad_notice_attr {
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u8 generic_type;
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u8 prod_type_msb;
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__be16 prod_type_lsb;
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__be16 trap_num;
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__be16 toggle_count;
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__be32 issuer_lid;
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__be32 reserved1;
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union ib_gid issuer_gid;
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union {
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struct {
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u8 details[64];
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} raw_data;
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struct {
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union ib_gid gid;
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} __packed ntc_64_65_66_67;
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struct {
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__be32 lid;
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} __packed ntc_128;
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struct {
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__be32 lid; /* where violation happened */
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u8 port_num; /* where violation happened */
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} __packed ntc_129_130_131;
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struct {
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__be32 lid; /* LID where change occurred */
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__be32 new_cap_mask; /* new capability mask */
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__be16 reserved2;
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__be16 cap_mask;
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__be16 change_flags; /* low 4 bits only */
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} __packed ntc_144;
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struct {
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__be64 new_sys_guid;
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__be32 lid; /* lid where sys guid changed */
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} __packed ntc_145;
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struct {
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__be32 lid;
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__be32 dr_slid;
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u8 method;
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u8 dr_trunc_hop;
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__be16 attr_id;
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__be32 attr_mod;
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__be64 mkey;
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u8 dr_rtn_path[30];
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} __packed ntc_256;
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struct {
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__be32 lid1;
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__be32 lid2;
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__be32 key;
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u8 sl; /* SL: high 5 bits */
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u8 reserved3[3];
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union ib_gid gid1;
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union ib_gid gid2;
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__be32 qp1; /* high 8 bits reserved */
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__be32 qp2; /* high 8 bits reserved */
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} __packed ntc_257_258;
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struct {
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__be16 flags; /* low 8 bits reserved */
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__be16 pkey;
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__be32 lid1;
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__be32 lid2;
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u8 sl; /* SL: high 5 bits */
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u8 reserved4[3];
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union ib_gid gid1;
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union ib_gid gid2;
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__be32 qp1; /* high 8 bits reserved */
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__be32 qp2; /* high 8 bits reserved */
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} __packed ntc_259;
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struct {
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__be32 lid;
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} __packed ntc_2048;
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};
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u8 class_data[0];
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};
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#define IB_VLARB_LOWPRI_0_31 1
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#define IB_VLARB_LOWPRI_32_63 2
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#define IB_VLARB_HIGHPRI_0_31 3
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#define IB_VLARB_HIGHPRI_32_63 4
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#define OPA_MAX_PREEMPT_CAP 32
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#define OPA_VLARB_LOW_ELEMENTS 0
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#define OPA_VLARB_HIGH_ELEMENTS 1
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#define OPA_VLARB_PREEMPT_ELEMENTS 2
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#define OPA_VLARB_PREEMPT_MATRIX 3
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#define IB_PMA_PORT_COUNTERS_CONG cpu_to_be16(0xFF00)
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struct ib_pma_portcounters_cong {
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u8 reserved;
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u8 reserved1;
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__be16 port_check_rate;
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__be16 symbol_error_counter;
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u8 link_error_recovery_counter;
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u8 link_downed_counter;
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__be16 port_rcv_errors;
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__be16 port_rcv_remphys_errors;
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__be16 port_rcv_switch_relay_errors;
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__be16 port_xmit_discards;
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u8 port_xmit_constraint_errors;
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u8 port_rcv_constraint_errors;
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u8 reserved2;
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u8 link_overrun_errors; /* LocalLink: 7:4, BufferOverrun: 3:0 */
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__be16 reserved3;
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__be16 vl15_dropped;
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__be64 port_xmit_data;
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__be64 port_rcv_data;
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__be64 port_xmit_packets;
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__be64 port_rcv_packets;
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__be64 port_xmit_wait;
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__be64 port_adr_events;
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} __packed;
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#define IB_SMP_UNSUP_VERSION cpu_to_be16(0x0004)
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#define IB_SMP_UNSUP_METHOD cpu_to_be16(0x0008)
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#define IB_SMP_UNSUP_METH_ATTR cpu_to_be16(0x000C)
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#define IB_SMP_INVALID_FIELD cpu_to_be16(0x001C)
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#define OPA_MAX_PREEMPT_CAP 32
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#define OPA_VLARB_LOW_ELEMENTS 0
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#define OPA_VLARB_HIGH_ELEMENTS 1
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#define OPA_VLARB_PREEMPT_ELEMENTS 2
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#define OPA_VLARB_PREEMPT_MATRIX 3
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#define HFI1_XMIT_RATE_UNSUPPORTED 0x0
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#define HFI1_XMIT_RATE_PICO 0x7
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/* number of 4nsec cycles equaling 2secs */
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#define HFI1_CONG_TIMER_PSINTERVAL 0x1DCD64EC
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#define IB_CC_SVCTYPE_RC 0x0
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#define IB_CC_SVCTYPE_UC 0x1
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#define IB_CC_SVCTYPE_RD 0x2
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#define IB_CC_SVCTYPE_UD 0x3
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/*
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* There should be an equivalent IB #define for the following, but
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* I cannot find it.
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*/
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#define OPA_CC_LOG_TYPE_HFI 2
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struct opa_hfi1_cong_log_event_internal {
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u32 lqpn;
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u32 rqpn;
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u8 sl;
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u8 svc_type;
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u32 rlid;
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s64 timestamp; /* wider than 32 bits to detect 32 bit rollover */
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};
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struct opa_hfi1_cong_log_event {
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u8 local_qp_cn_entry[3];
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u8 remote_qp_number_cn_entry[3];
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u8 sl_svc_type_cn_entry; /* 5 bits SL, 3 bits svc type */
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u8 reserved;
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__be32 remote_lid_cn_entry;
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__be32 timestamp_cn_entry;
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} __packed;
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#define OPA_CONG_LOG_ELEMS 96
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struct opa_hfi1_cong_log {
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u8 log_type;
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u8 congestion_flags;
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__be16 threshold_event_counter;
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__be32 current_time_stamp;
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u8 threshold_cong_event_map[OPA_MAX_SLS / 8];
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struct opa_hfi1_cong_log_event events[OPA_CONG_LOG_ELEMS];
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} __packed;
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#define IB_CC_TABLE_CAP_DEFAULT 31
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/* Port control flags */
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#define IB_CC_CCS_PC_SL_BASED 0x01
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struct opa_congestion_setting_entry {
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u8 ccti_increase;
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u8 reserved;
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__be16 ccti_timer;
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u8 trigger_threshold;
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u8 ccti_min; /* min CCTI for cc table */
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} __packed;
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struct opa_congestion_setting_entry_shadow {
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u8 ccti_increase;
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u8 reserved;
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u16 ccti_timer;
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u8 trigger_threshold;
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u8 ccti_min; /* min CCTI for cc table */
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} __packed;
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struct opa_congestion_setting_attr {
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__be32 control_map;
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__be16 port_control;
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struct opa_congestion_setting_entry entries[OPA_MAX_SLS];
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} __packed;
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struct opa_congestion_setting_attr_shadow {
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u32 control_map;
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u16 port_control;
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struct opa_congestion_setting_entry_shadow entries[OPA_MAX_SLS];
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} __packed;
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#define IB_CC_TABLE_ENTRY_INCREASE_DEFAULT 1
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#define IB_CC_TABLE_ENTRY_TIMER_DEFAULT 1
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/* 64 Congestion Control table entries in a single MAD */
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#define IB_CCT_ENTRIES 64
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#define IB_CCT_MIN_ENTRIES (IB_CCT_ENTRIES * 2)
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struct ib_cc_table_entry {
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__be16 entry; /* shift:2, multiplier:14 */
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};
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struct ib_cc_table_entry_shadow {
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u16 entry; /* shift:2, multiplier:14 */
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};
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struct ib_cc_table_attr {
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__be16 ccti_limit; /* max CCTI for cc table */
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struct ib_cc_table_entry ccti_entries[IB_CCT_ENTRIES];
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} __packed;
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struct ib_cc_table_attr_shadow {
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u16 ccti_limit; /* max CCTI for cc table */
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struct ib_cc_table_entry_shadow ccti_entries[IB_CCT_ENTRIES];
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} __packed;
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#define CC_TABLE_SHADOW_MAX \
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(IB_CC_TABLE_CAP_DEFAULT * IB_CCT_ENTRIES)
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struct cc_table_shadow {
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u16 ccti_limit; /* max CCTI for cc table */
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struct ib_cc_table_entry_shadow entries[CC_TABLE_SHADOW_MAX];
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} __packed;
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/*
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* struct cc_state combines the (active) per-port congestion control
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* table, and the (active) per-SL congestion settings. cc_state data
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* may need to be read in code paths that we want to be fast, so it
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* is an RCU protected structure.
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*/
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struct cc_state {
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struct rcu_head rcu;
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struct cc_table_shadow cct;
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struct opa_congestion_setting_attr_shadow cong_setting;
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};
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/*
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* OPA BufferControl MAD
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*/
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/* attribute modifier macros */
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#define OPA_AM_NPORT_SHIFT 24
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#define OPA_AM_NPORT_MASK 0xff
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#define OPA_AM_NPORT_SMASK (OPA_AM_NPORT_MASK << OPA_AM_NPORT_SHIFT)
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#define OPA_AM_NPORT(am) (((am) >> OPA_AM_NPORT_SHIFT) & \
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OPA_AM_NPORT_MASK)
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#define OPA_AM_NBLK_SHIFT 24
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#define OPA_AM_NBLK_MASK 0xff
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#define OPA_AM_NBLK_SMASK (OPA_AM_NBLK_MASK << OPA_AM_NBLK_SHIFT)
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#define OPA_AM_NBLK(am) (((am) >> OPA_AM_NBLK_SHIFT) & \
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OPA_AM_NBLK_MASK)
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#define OPA_AM_START_BLK_SHIFT 0
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#define OPA_AM_START_BLK_MASK 0xff
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#define OPA_AM_START_BLK_SMASK (OPA_AM_START_BLK_MASK << \
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OPA_AM_START_BLK_SHIFT)
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#define OPA_AM_START_BLK(am) (((am) >> OPA_AM_START_BLK_SHIFT) & \
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OPA_AM_START_BLK_MASK)
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#define OPA_AM_PORTNUM_SHIFT 0
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#define OPA_AM_PORTNUM_MASK 0xff
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#define OPA_AM_PORTNUM_SMASK (OPA_AM_PORTNUM_MASK << OPA_AM_PORTNUM_SHIFT)
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#define OPA_AM_PORTNUM(am) (((am) >> OPA_AM_PORTNUM_SHIFT) & \
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OPA_AM_PORTNUM_MASK)
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#define OPA_AM_ASYNC_SHIFT 12
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#define OPA_AM_ASYNC_MASK 0x1
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#define OPA_AM_ASYNC_SMASK (OPA_AM_ASYNC_MASK << OPA_AM_ASYNC_SHIFT)
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#define OPA_AM_ASYNC(am) (((am) >> OPA_AM_ASYNC_SHIFT) & \
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OPA_AM_ASYNC_MASK)
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#define OPA_AM_START_SM_CFG_SHIFT 9
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#define OPA_AM_START_SM_CFG_MASK 0x1
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#define OPA_AM_START_SM_CFG_SMASK (OPA_AM_START_SM_CFG_MASK << \
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OPA_AM_START_SM_CFG_SHIFT)
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#define OPA_AM_START_SM_CFG(am) (((am) >> OPA_AM_START_SM_CFG_SHIFT) \
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& OPA_AM_START_SM_CFG_MASK)
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#define OPA_AM_CI_ADDR_SHIFT 19
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#define OPA_AM_CI_ADDR_MASK 0xfff
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#define OPA_AM_CI_ADDR_SMASK (OPA_AM_CI_ADDR_MASK << OPA_CI_ADDR_SHIFT)
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#define OPA_AM_CI_ADDR(am) (((am) >> OPA_AM_CI_ADDR_SHIFT) & \
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OPA_AM_CI_ADDR_MASK)
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#define OPA_AM_CI_LEN_SHIFT 13
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#define OPA_AM_CI_LEN_MASK 0x3f
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#define OPA_AM_CI_LEN_SMASK (OPA_AM_CI_LEN_MASK << OPA_CI_LEN_SHIFT)
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#define OPA_AM_CI_LEN(am) (((am) >> OPA_AM_CI_LEN_SHIFT) & \
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OPA_AM_CI_LEN_MASK)
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/* error info macros */
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#define OPA_EI_STATUS_SMASK 0x80
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#define OPA_EI_CODE_SMASK 0x0f
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struct vl_limit {
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__be16 dedicated;
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__be16 shared;
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};
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struct buffer_control {
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__be16 reserved;
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__be16 overall_shared_limit;
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struct vl_limit vl[OPA_MAX_VLS];
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};
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struct sc2vlnt {
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u8 vlnt[32]; /* 5 bit VL, 3 bits reserved */
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};
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/*
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* The PortSamplesControl.CounterMasks field is an array of 3 bit fields
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* which specify the N'th counter's capabilities. See ch. 16.1.3.2.
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* We support 5 counters which only count the mandatory quantities.
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*/
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#define COUNTER_MASK(q, n) (q << ((9 - n) * 3))
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#define COUNTER_MASK0_9 \
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cpu_to_be32(COUNTER_MASK(1, 0) | \
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COUNTER_MASK(1, 1) | \
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COUNTER_MASK(1, 2) | \
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COUNTER_MASK(1, 3) | \
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COUNTER_MASK(1, 4))
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void hfi1_event_pkey_change(struct hfi1_devdata *dd, u8 port);
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#endif /* _HFI1_MAD_H */
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