233 lines
6.3 KiB
C
233 lines
6.3 KiB
C
/*
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/init.h>
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#include "cx88.h"
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static unsigned int vbi_debug;
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module_param(vbi_debug,int,0644);
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MODULE_PARM_DESC(vbi_debug,"enable debug messages [vbi]");
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#define dprintk(level,fmt, arg...) if (vbi_debug >= level) \
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printk(KERN_DEBUG "%s: " fmt, dev->core->name , ## arg)
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/* ------------------------------------------------------------------ */
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int cx8800_vbi_fmt (struct file *file, void *priv,
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struct v4l2_format *f)
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{
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struct cx8800_dev *dev = video_drvdata(file);
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f->fmt.vbi.samples_per_line = VBI_LINE_LENGTH;
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f->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY;
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f->fmt.vbi.offset = 244;
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if (dev->core->tvnorm & V4L2_STD_525_60) {
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/* ntsc */
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f->fmt.vbi.sampling_rate = 28636363;
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f->fmt.vbi.start[0] = 10;
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f->fmt.vbi.start[1] = 273;
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f->fmt.vbi.count[0] = VBI_LINE_NTSC_COUNT;
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f->fmt.vbi.count[1] = VBI_LINE_NTSC_COUNT;
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} else if (dev->core->tvnorm & V4L2_STD_625_50) {
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/* pal */
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f->fmt.vbi.sampling_rate = 35468950;
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f->fmt.vbi.start[0] = V4L2_VBI_ITU_625_F1_START + 5;
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f->fmt.vbi.start[1] = V4L2_VBI_ITU_625_F2_START + 5;
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f->fmt.vbi.count[0] = VBI_LINE_PAL_COUNT;
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f->fmt.vbi.count[1] = VBI_LINE_PAL_COUNT;
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}
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return 0;
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}
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static int cx8800_start_vbi_dma(struct cx8800_dev *dev,
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struct cx88_dmaqueue *q,
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struct cx88_buffer *buf)
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{
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struct cx88_core *core = dev->core;
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/* setup fifo + format */
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cx88_sram_channel_setup(dev->core, &cx88_sram_channels[SRAM_CH24],
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VBI_LINE_LENGTH, buf->risc.dma);
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cx_write(MO_VBOS_CONTROL, ( (1 << 18) | // comb filter delay fixup
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(1 << 15) | // enable vbi capture
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(1 << 11) ));
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/* reset counter */
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cx_write(MO_VBI_GPCNTRL, GP_COUNT_CONTROL_RESET);
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q->count = 0;
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/* enable irqs */
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cx_set(MO_PCI_INTMSK, core->pci_irqmask | PCI_INT_VIDINT);
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cx_set(MO_VID_INTMSK, 0x0f0088);
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/* enable capture */
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cx_set(VID_CAPTURE_CONTROL,0x18);
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/* start dma */
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cx_set(MO_DEV_CNTRL2, (1<<5));
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cx_set(MO_VID_DMACNTRL, 0x88);
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return 0;
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}
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void cx8800_stop_vbi_dma(struct cx8800_dev *dev)
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{
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struct cx88_core *core = dev->core;
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/* stop dma */
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cx_clear(MO_VID_DMACNTRL, 0x88);
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/* disable capture */
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cx_clear(VID_CAPTURE_CONTROL,0x18);
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/* disable irqs */
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cx_clear(MO_PCI_INTMSK, PCI_INT_VIDINT);
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cx_clear(MO_VID_INTMSK, 0x0f0088);
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}
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int cx8800_restart_vbi_queue(struct cx8800_dev *dev,
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struct cx88_dmaqueue *q)
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{
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struct cx88_buffer *buf;
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if (list_empty(&q->active))
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return 0;
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buf = list_entry(q->active.next, struct cx88_buffer, list);
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dprintk(2,"restart_queue [%p/%d]: restart dma\n",
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buf, buf->vb.vb2_buf.index);
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cx8800_start_vbi_dma(dev, q, buf);
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return 0;
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}
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/* ------------------------------------------------------------------ */
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static int queue_setup(struct vb2_queue *q,
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unsigned int *num_buffers, unsigned int *num_planes,
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unsigned int sizes[], struct device *alloc_devs[])
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{
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struct cx8800_dev *dev = q->drv_priv;
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*num_planes = 1;
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if (dev->core->tvnorm & V4L2_STD_525_60)
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sizes[0] = VBI_LINE_NTSC_COUNT * VBI_LINE_LENGTH * 2;
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else
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sizes[0] = VBI_LINE_PAL_COUNT * VBI_LINE_LENGTH * 2;
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return 0;
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}
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static int buffer_prepare(struct vb2_buffer *vb)
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{
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struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
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struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
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struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
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struct sg_table *sgt = vb2_dma_sg_plane_desc(vb, 0);
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unsigned int lines;
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unsigned int size;
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if (dev->core->tvnorm & V4L2_STD_525_60)
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lines = VBI_LINE_NTSC_COUNT;
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else
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lines = VBI_LINE_PAL_COUNT;
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size = lines * VBI_LINE_LENGTH * 2;
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if (vb2_plane_size(vb, 0) < size)
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return -EINVAL;
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vb2_set_plane_payload(vb, 0, size);
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cx88_risc_buffer(dev->pci, &buf->risc, sgt->sgl,
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0, VBI_LINE_LENGTH * lines,
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VBI_LINE_LENGTH, 0,
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lines);
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return 0;
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}
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static void buffer_finish(struct vb2_buffer *vb)
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{
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struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
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struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
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struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
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struct cx88_riscmem *risc = &buf->risc;
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if (risc->cpu)
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pci_free_consistent(dev->pci, risc->size, risc->cpu, risc->dma);
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memset(risc, 0, sizeof(*risc));
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}
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static void buffer_queue(struct vb2_buffer *vb)
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{
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struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
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struct cx8800_dev *dev = vb->vb2_queue->drv_priv;
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struct cx88_buffer *buf = container_of(vbuf, struct cx88_buffer, vb);
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struct cx88_buffer *prev;
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struct cx88_dmaqueue *q = &dev->vbiq;
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/* add jump to start */
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buf->risc.cpu[1] = cpu_to_le32(buf->risc.dma + 8);
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buf->risc.jmp[0] = cpu_to_le32(RISC_JUMP | RISC_CNT_INC);
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buf->risc.jmp[1] = cpu_to_le32(buf->risc.dma + 8);
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if (list_empty(&q->active)) {
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list_add_tail(&buf->list, &q->active);
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cx8800_start_vbi_dma(dev, q, buf);
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dprintk(2,"[%p/%d] vbi_queue - first active\n",
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buf, buf->vb.vb2_buf.index);
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} else {
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buf->risc.cpu[0] |= cpu_to_le32(RISC_IRQ1);
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prev = list_entry(q->active.prev, struct cx88_buffer, list);
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list_add_tail(&buf->list, &q->active);
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prev->risc.jmp[1] = cpu_to_le32(buf->risc.dma);
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dprintk(2,"[%p/%d] buffer_queue - append to active\n",
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buf, buf->vb.vb2_buf.index);
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}
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}
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static int start_streaming(struct vb2_queue *q, unsigned int count)
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{
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struct cx8800_dev *dev = q->drv_priv;
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struct cx88_dmaqueue *dmaq = &dev->vbiq;
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struct cx88_buffer *buf = list_entry(dmaq->active.next,
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struct cx88_buffer, list);
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cx8800_start_vbi_dma(dev, dmaq, buf);
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return 0;
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}
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static void stop_streaming(struct vb2_queue *q)
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{
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struct cx8800_dev *dev = q->drv_priv;
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struct cx88_core *core = dev->core;
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struct cx88_dmaqueue *dmaq = &dev->vbiq;
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unsigned long flags;
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cx_clear(MO_VID_DMACNTRL, 0x11);
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cx_clear(VID_CAPTURE_CONTROL, 0x06);
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cx8800_stop_vbi_dma(dev);
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spin_lock_irqsave(&dev->slock, flags);
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while (!list_empty(&dmaq->active)) {
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struct cx88_buffer *buf = list_entry(dmaq->active.next,
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struct cx88_buffer, list);
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list_del(&buf->list);
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vb2_buffer_done(&buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
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}
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spin_unlock_irqrestore(&dev->slock, flags);
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}
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const struct vb2_ops cx8800_vbi_qops = {
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.queue_setup = queue_setup,
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.buf_prepare = buffer_prepare,
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.buf_finish = buffer_finish,
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.buf_queue = buffer_queue,
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.wait_prepare = vb2_ops_wait_prepare,
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.wait_finish = vb2_ops_wait_finish,
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.start_streaming = start_streaming,
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.stop_streaming = stop_streaming,
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};
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