143 lines
3.9 KiB
C
143 lines
3.9 KiB
C
/*
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* Copyright 2015 Simon Arlott
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* Derived from bcm63138_nand.c:
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* Copyright © 2015 Broadcom Corporation
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*
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* Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/include/bcm963xx/63268_map_part.h:
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* Copyright 2000-2010 Broadcom Corporation
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*
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* Derived from bcm963xx_4.12L.06B_consumer/shared/opensource/flash/nandflash.c:
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* Copyright 2000-2010 Broadcom Corporation
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*/
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#include <linux/device.h>
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#include <linux/io.h>
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#include <linux/ioport.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include "brcmnand.h"
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struct bcm6368_nand_soc {
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struct brcmnand_soc soc;
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void __iomem *base;
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};
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#define BCM6368_NAND_INT 0x00
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#define BCM6368_NAND_STATUS_SHIFT 0
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#define BCM6368_NAND_STATUS_MASK (0xfff << BCM6368_NAND_STATUS_SHIFT)
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#define BCM6368_NAND_ENABLE_SHIFT 16
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#define BCM6368_NAND_ENABLE_MASK (0xffff << BCM6368_NAND_ENABLE_SHIFT)
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#define BCM6368_NAND_BASE_ADDR0 0x04
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#define BCM6368_NAND_BASE_ADDR1 0x0c
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enum {
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BCM6368_NP_READ = BIT(0),
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BCM6368_BLOCK_ERASE = BIT(1),
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BCM6368_COPY_BACK = BIT(2),
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BCM6368_PAGE_PGM = BIT(3),
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BCM6368_CTRL_READY = BIT(4),
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BCM6368_DEV_RBPIN = BIT(5),
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BCM6368_ECC_ERR_UNC = BIT(6),
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BCM6368_ECC_ERR_CORR = BIT(7),
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};
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static bool bcm6368_nand_intc_ack(struct brcmnand_soc *soc)
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{
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struct bcm6368_nand_soc *priv =
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container_of(soc, struct bcm6368_nand_soc, soc);
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void __iomem *mmio = priv->base + BCM6368_NAND_INT;
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u32 val = brcmnand_readl(mmio);
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if (val & (BCM6368_CTRL_READY << BCM6368_NAND_STATUS_SHIFT)) {
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/* Ack interrupt */
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val &= ~BCM6368_NAND_STATUS_MASK;
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val |= BCM6368_CTRL_READY << BCM6368_NAND_STATUS_SHIFT;
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brcmnand_writel(val, mmio);
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return true;
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}
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return false;
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}
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static void bcm6368_nand_intc_set(struct brcmnand_soc *soc, bool en)
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{
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struct bcm6368_nand_soc *priv =
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container_of(soc, struct bcm6368_nand_soc, soc);
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void __iomem *mmio = priv->base + BCM6368_NAND_INT;
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u32 val = brcmnand_readl(mmio);
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/* Don't ack any interrupts */
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val &= ~BCM6368_NAND_STATUS_MASK;
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if (en)
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val |= BCM6368_CTRL_READY << BCM6368_NAND_ENABLE_SHIFT;
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else
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val &= ~(BCM6368_CTRL_READY << BCM6368_NAND_ENABLE_SHIFT);
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brcmnand_writel(val, mmio);
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}
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static int bcm6368_nand_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct bcm6368_nand_soc *priv;
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struct brcmnand_soc *soc;
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struct resource *res;
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priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
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if (!priv)
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return -ENOMEM;
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soc = &priv->soc;
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res = platform_get_resource_byname(pdev,
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IORESOURCE_MEM, "nand-int-base");
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priv->base = devm_ioremap_resource(dev, res);
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if (IS_ERR(priv->base))
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return PTR_ERR(priv->base);
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soc->ctlrdy_ack = bcm6368_nand_intc_ack;
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soc->ctlrdy_set_enabled = bcm6368_nand_intc_set;
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/* Disable and ack all interrupts */
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brcmnand_writel(0, priv->base + BCM6368_NAND_INT);
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brcmnand_writel(BCM6368_NAND_STATUS_MASK,
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priv->base + BCM6368_NAND_INT);
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return brcmnand_probe(pdev, soc);
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}
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static const struct of_device_id bcm6368_nand_of_match[] = {
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{ .compatible = "brcm,nand-bcm6368" },
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{},
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};
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MODULE_DEVICE_TABLE(of, bcm6368_nand_of_match);
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static struct platform_driver bcm6368_nand_driver = {
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.probe = bcm6368_nand_probe,
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.remove = brcmnand_remove,
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.driver = {
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.name = "bcm6368_nand",
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.pm = &brcmnand_pm_ops,
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.of_match_table = bcm6368_nand_of_match,
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}
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};
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module_platform_driver(bcm6368_nand_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Simon Arlott");
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MODULE_DESCRIPTION("NAND driver for BCM6368");
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