1048 lines
33 KiB
C
1048 lines
33 KiB
C
/*
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* Copyright 2015 Amazon.com, Inc. or its affiliates.
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*
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* This software is available to you under a choice of one of two
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* licenses. You may choose to be licensed under the terms of the GNU
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* General Public License (GPL) Version 2, available from the file
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* COPYING in the main directory of this source tree, or the
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* BSD license below:
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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*
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* - Redistributions of source code must retain the above
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* copyright notice, this list of conditions and the following
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* disclaimer.
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*
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* - Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials
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* provided with the distribution.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
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* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
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* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
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* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
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* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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* SOFTWARE.
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*/
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#ifndef ENA_COM
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#define ENA_COM
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/gfp.h>
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#include <linux/sched.h>
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#include <linux/sizes.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <linux/wait.h>
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#include <linux/netdevice.h>
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#include "ena_common_defs.h"
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#include "ena_admin_defs.h"
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#include "ena_eth_io_defs.h"
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#include "ena_regs_defs.h"
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#undef pr_fmt
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#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
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#define ENA_MAX_NUM_IO_QUEUES 128U
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/* We need to queues for each IO (on for Tx and one for Rx) */
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#define ENA_TOTAL_NUM_QUEUES (2 * (ENA_MAX_NUM_IO_QUEUES))
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#define ENA_MAX_HANDLERS 256
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#define ENA_MAX_PHYS_ADDR_SIZE_BITS 48
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/* Unit in usec */
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#define ENA_REG_READ_TIMEOUT 200000
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#define ADMIN_SQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aq_entry))
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#define ADMIN_CQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_acq_entry))
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#define ADMIN_AENQ_SIZE(depth) ((depth) * sizeof(struct ena_admin_aenq_entry))
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/*****************************************************************************/
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/*****************************************************************************/
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/* ENA adaptive interrupt moderation settings */
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#define ENA_INTR_LOWEST_USECS (0)
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#define ENA_INTR_LOWEST_PKTS (3)
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#define ENA_INTR_LOWEST_BYTES (2 * 1524)
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#define ENA_INTR_LOW_USECS (32)
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#define ENA_INTR_LOW_PKTS (12)
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#define ENA_INTR_LOW_BYTES (16 * 1024)
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#define ENA_INTR_MID_USECS (80)
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#define ENA_INTR_MID_PKTS (48)
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#define ENA_INTR_MID_BYTES (64 * 1024)
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#define ENA_INTR_HIGH_USECS (128)
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#define ENA_INTR_HIGH_PKTS (96)
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#define ENA_INTR_HIGH_BYTES (128 * 1024)
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#define ENA_INTR_HIGHEST_USECS (192)
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#define ENA_INTR_HIGHEST_PKTS (128)
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#define ENA_INTR_HIGHEST_BYTES (192 * 1024)
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#define ENA_INTR_INITIAL_TX_INTERVAL_USECS 196
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#define ENA_INTR_INITIAL_RX_INTERVAL_USECS 4
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#define ENA_INTR_DELAY_OLD_VALUE_WEIGHT 6
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#define ENA_INTR_DELAY_NEW_VALUE_WEIGHT 4
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#define ENA_INTR_MODER_LEVEL_STRIDE 2
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#define ENA_INTR_BYTE_COUNT_NOT_SUPPORTED 0xFFFFFF
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enum ena_intr_moder_level {
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ENA_INTR_MODER_LOWEST = 0,
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ENA_INTR_MODER_LOW,
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ENA_INTR_MODER_MID,
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ENA_INTR_MODER_HIGH,
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ENA_INTR_MODER_HIGHEST,
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ENA_INTR_MAX_NUM_OF_LEVELS,
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};
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struct ena_intr_moder_entry {
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unsigned int intr_moder_interval;
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unsigned int pkts_per_interval;
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unsigned int bytes_per_interval;
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};
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enum queue_direction {
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ENA_COM_IO_QUEUE_DIRECTION_TX,
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ENA_COM_IO_QUEUE_DIRECTION_RX
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};
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struct ena_com_buf {
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dma_addr_t paddr; /**< Buffer physical address */
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u16 len; /**< Buffer length in bytes */
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};
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struct ena_com_rx_buf_info {
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u16 len;
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u16 req_id;
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};
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struct ena_com_io_desc_addr {
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u8 __iomem *pbuf_dev_addr; /* LLQ address */
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u8 *virt_addr;
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dma_addr_t phys_addr;
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};
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struct ena_com_tx_meta {
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u16 mss;
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u16 l3_hdr_len;
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u16 l3_hdr_offset;
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u16 l4_hdr_len; /* In words */
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};
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struct ena_com_io_cq {
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struct ena_com_io_desc_addr cdesc_addr;
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/* Interrupt unmask register */
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u32 __iomem *unmask_reg;
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/* The completion queue head doorbell register */
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u32 __iomem *cq_head_db_reg;
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/* numa configuration register (for TPH) */
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u32 __iomem *numa_node_cfg_reg;
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/* The value to write to the above register to unmask
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* the interrupt of this queue
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*/
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u32 msix_vector;
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enum queue_direction direction;
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/* holds the number of cdesc of the current packet */
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u16 cur_rx_pkt_cdesc_count;
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/* save the firt cdesc idx of the current packet */
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u16 cur_rx_pkt_cdesc_start_idx;
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u16 q_depth;
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/* Caller qid */
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u16 qid;
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/* Device queue index */
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u16 idx;
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u16 head;
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u16 last_head_update;
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u8 phase;
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u8 cdesc_entry_size_in_bytes;
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} ____cacheline_aligned;
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struct ena_com_io_sq {
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struct ena_com_io_desc_addr desc_addr;
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u32 __iomem *db_addr;
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u8 __iomem *header_addr;
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enum queue_direction direction;
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enum ena_admin_placement_policy_type mem_queue_type;
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u32 msix_vector;
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struct ena_com_tx_meta cached_tx_meta;
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u16 q_depth;
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u16 qid;
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u16 idx;
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u16 tail;
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u16 next_to_comp;
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u32 tx_max_header_size;
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u8 phase;
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u8 desc_entry_size;
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u8 dma_addr_bits;
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} ____cacheline_aligned;
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struct ena_com_admin_cq {
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struct ena_admin_acq_entry *entries;
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dma_addr_t dma_addr;
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u16 head;
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u8 phase;
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};
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struct ena_com_admin_sq {
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struct ena_admin_aq_entry *entries;
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dma_addr_t dma_addr;
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u32 __iomem *db_addr;
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u16 head;
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u16 tail;
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u8 phase;
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};
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struct ena_com_stats_admin {
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u32 aborted_cmd;
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u32 submitted_cmd;
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u32 completed_cmd;
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u32 out_of_space;
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u32 no_completion;
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};
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struct ena_com_admin_queue {
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void *q_dmadev;
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spinlock_t q_lock; /* spinlock for the admin queue */
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struct ena_comp_ctx *comp_ctx;
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u16 q_depth;
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struct ena_com_admin_cq cq;
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struct ena_com_admin_sq sq;
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/* Indicate if the admin queue should poll for completion */
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bool polling;
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u16 curr_cmd_id;
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/* Indicate that the ena was initialized and can
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* process new admin commands
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*/
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bool running_state;
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/* Count the number of outstanding admin commands */
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atomic_t outstanding_cmds;
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struct ena_com_stats_admin stats;
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};
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struct ena_aenq_handlers;
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struct ena_com_aenq {
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u16 head;
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u8 phase;
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struct ena_admin_aenq_entry *entries;
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dma_addr_t dma_addr;
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u16 q_depth;
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struct ena_aenq_handlers *aenq_handlers;
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};
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struct ena_com_mmio_read {
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struct ena_admin_ena_mmio_req_read_less_resp *read_resp;
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dma_addr_t read_resp_dma_addr;
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u16 seq_num;
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bool readless_supported;
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/* spin lock to ensure a single outstanding read */
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spinlock_t lock;
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};
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struct ena_rss {
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/* Indirect table */
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u16 *host_rss_ind_tbl;
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struct ena_admin_rss_ind_table_entry *rss_ind_tbl;
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dma_addr_t rss_ind_tbl_dma_addr;
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u16 tbl_log_size;
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/* Hash key */
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enum ena_admin_hash_functions hash_func;
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struct ena_admin_feature_rss_flow_hash_control *hash_key;
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dma_addr_t hash_key_dma_addr;
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u32 hash_init_val;
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/* Flow Control */
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struct ena_admin_feature_rss_hash_control *hash_ctrl;
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dma_addr_t hash_ctrl_dma_addr;
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};
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struct ena_host_attribute {
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/* Debug area */
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u8 *debug_area_virt_addr;
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dma_addr_t debug_area_dma_addr;
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u32 debug_area_size;
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/* Host information */
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struct ena_admin_host_info *host_info;
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dma_addr_t host_info_dma_addr;
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};
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/* Each ena_dev is a PCI function. */
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struct ena_com_dev {
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struct ena_com_admin_queue admin_queue;
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struct ena_com_aenq aenq;
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struct ena_com_io_cq io_cq_queues[ENA_TOTAL_NUM_QUEUES];
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struct ena_com_io_sq io_sq_queues[ENA_TOTAL_NUM_QUEUES];
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u8 __iomem *reg_bar;
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void __iomem *mem_bar;
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void *dmadev;
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enum ena_admin_placement_policy_type tx_mem_queue_type;
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u32 tx_max_header_size;
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u16 stats_func; /* Selected function for extended statistic dump */
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u16 stats_queue; /* Selected queue for extended statistic dump */
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struct ena_com_mmio_read mmio_read;
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struct ena_rss rss;
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u32 supported_features;
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u32 dma_addr_bits;
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struct ena_host_attribute host_attr;
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bool adaptive_coalescing;
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u16 intr_delay_resolution;
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u32 intr_moder_tx_interval;
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struct ena_intr_moder_entry *intr_moder_tbl;
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};
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struct ena_com_dev_get_features_ctx {
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struct ena_admin_queue_feature_desc max_queues;
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struct ena_admin_device_attr_feature_desc dev_attr;
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struct ena_admin_feature_aenq_desc aenq;
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struct ena_admin_feature_offload_desc offload;
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};
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struct ena_com_create_io_ctx {
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enum ena_admin_placement_policy_type mem_queue_type;
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enum queue_direction direction;
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int numa_node;
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u32 msix_vector;
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u16 queue_size;
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u16 qid;
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};
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typedef void (*ena_aenq_handler)(void *data,
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struct ena_admin_aenq_entry *aenq_e);
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/* Holds aenq handlers. Indexed by AENQ event group */
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struct ena_aenq_handlers {
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ena_aenq_handler handlers[ENA_MAX_HANDLERS];
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ena_aenq_handler unimplemented_handler;
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};
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/*****************************************************************************/
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/*****************************************************************************/
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/* ena_com_mmio_reg_read_request_init - Init the mmio reg read mechanism
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* @ena_dev: ENA communication layer struct
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*
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* Initialize the register read mechanism.
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*
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* @note: This method must be the first stage in the initialization sequence.
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*
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* @return - 0 on success, negative value on failure.
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*/
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int ena_com_mmio_reg_read_request_init(struct ena_com_dev *ena_dev);
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/* ena_com_set_mmio_read_mode - Enable/disable the mmio reg read mechanism
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* @ena_dev: ENA communication layer struct
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* @readless_supported: readless mode (enable/disable)
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*/
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void ena_com_set_mmio_read_mode(struct ena_com_dev *ena_dev,
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bool readless_supported);
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/* ena_com_mmio_reg_read_request_write_dev_addr - Write the mmio reg read return
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* value physical address.
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* @ena_dev: ENA communication layer struct
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*/
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void ena_com_mmio_reg_read_request_write_dev_addr(struct ena_com_dev *ena_dev);
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/* ena_com_mmio_reg_read_request_destroy - Destroy the mmio reg read mechanism
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* @ena_dev: ENA communication layer struct
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*/
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void ena_com_mmio_reg_read_request_destroy(struct ena_com_dev *ena_dev);
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/* ena_com_admin_init - Init the admin and the async queues
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* @ena_dev: ENA communication layer struct
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* @aenq_handlers: Those handlers to be called upon event.
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* @init_spinlock: Indicate if this method should init the admin spinlock or
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* the spinlock was init before (for example, in a case of FLR).
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*
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* Initialize the admin submission and completion queues.
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* Initialize the asynchronous events notification queues.
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*
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* @return - 0 on success, negative value on failure.
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*/
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int ena_com_admin_init(struct ena_com_dev *ena_dev,
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struct ena_aenq_handlers *aenq_handlers,
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bool init_spinlock);
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/* ena_com_admin_destroy - Destroy the admin and the async events queues.
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* @ena_dev: ENA communication layer struct
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*
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* @note: Before calling this method, the caller must validate that the device
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* won't send any additional admin completions/aenq.
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* To achieve that, a FLR is recommended.
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*/
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void ena_com_admin_destroy(struct ena_com_dev *ena_dev);
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/* ena_com_dev_reset - Perform device FLR to the device.
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* @ena_dev: ENA communication layer struct
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*
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* @return - 0 on success, negative value on failure.
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*/
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int ena_com_dev_reset(struct ena_com_dev *ena_dev);
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/* ena_com_create_io_queue - Create io queue.
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* @ena_dev: ENA communication layer struct
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* @ctx - create context structure
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*
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* Create the submission and the completion queues.
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*
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* @return - 0 on success, negative value on failure.
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*/
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int ena_com_create_io_queue(struct ena_com_dev *ena_dev,
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struct ena_com_create_io_ctx *ctx);
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/* ena_com_destroy_io_queue - Destroy IO queue with the queue id - qid.
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* @ena_dev: ENA communication layer struct
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* @qid - the caller virtual queue id.
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*/
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void ena_com_destroy_io_queue(struct ena_com_dev *ena_dev, u16 qid);
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/* ena_com_get_io_handlers - Return the io queue handlers
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* @ena_dev: ENA communication layer struct
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* @qid - the caller virtual queue id.
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* @io_sq - IO submission queue handler
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* @io_cq - IO completion queue handler.
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*
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* @return - 0 on success, negative value on failure.
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*/
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int ena_com_get_io_handlers(struct ena_com_dev *ena_dev, u16 qid,
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struct ena_com_io_sq **io_sq,
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struct ena_com_io_cq **io_cq);
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/* ena_com_admin_aenq_enable - ENAble asynchronous event notifications
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* @ena_dev: ENA communication layer struct
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*
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* After this method, aenq event can be received via AENQ.
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*/
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void ena_com_admin_aenq_enable(struct ena_com_dev *ena_dev);
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/* ena_com_set_admin_running_state - Set the state of the admin queue
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* @ena_dev: ENA communication layer struct
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*
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* Change the state of the admin queue (enable/disable)
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*/
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void ena_com_set_admin_running_state(struct ena_com_dev *ena_dev, bool state);
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/* ena_com_get_admin_running_state - Get the admin queue state
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* @ena_dev: ENA communication layer struct
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*
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* Retrieve the state of the admin queue (enable/disable)
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*
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* @return - current polling mode (enable/disable)
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*/
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bool ena_com_get_admin_running_state(struct ena_com_dev *ena_dev);
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/* ena_com_set_admin_polling_mode - Set the admin completion queue polling mode
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* @ena_dev: ENA communication layer struct
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* @polling: ENAble/Disable polling mode
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*
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* Set the admin completion mode.
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*/
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void ena_com_set_admin_polling_mode(struct ena_com_dev *ena_dev, bool polling);
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/* ena_com_set_admin_polling_mode - Get the admin completion queue polling mode
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* @ena_dev: ENA communication layer struct
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*
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* Get the admin completion mode.
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* If polling mode is on, ena_com_execute_admin_command will perform a
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* polling on the admin completion queue for the commands completion,
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* otherwise it will wait on wait event.
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*
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* @return state
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*/
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bool ena_com_get_ena_admin_polling_mode(struct ena_com_dev *ena_dev);
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/* ena_com_admin_q_comp_intr_handler - admin queue interrupt handler
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* @ena_dev: ENA communication layer struct
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*
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* This method go over the admin completion queue and wake up all the pending
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|
* threads that wait on the commands wait event.
|
|
*
|
|
* @note: Should be called after MSI-X interrupt.
|
|
*/
|
|
void ena_com_admin_q_comp_intr_handler(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_aenq_intr_handler - AENQ interrupt handler
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* This method go over the async event notification queue and call the proper
|
|
* aenq handler.
|
|
*/
|
|
void ena_com_aenq_intr_handler(struct ena_com_dev *dev, void *data);
|
|
|
|
/* ena_com_abort_admin_commands - Abort all the outstanding admin commands.
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* This method aborts all the outstanding admin commands.
|
|
* The caller should then call ena_com_wait_for_abort_completion to make sure
|
|
* all the commands were completed.
|
|
*/
|
|
void ena_com_abort_admin_commands(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_wait_for_abort_completion - Wait for admin commands abort.
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* This method wait until all the outstanding admin commands will be completed.
|
|
*/
|
|
void ena_com_wait_for_abort_completion(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_validate_version - Validate the device parameters
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* This method validate the device parameters are the same as the saved
|
|
* parameters in ena_dev.
|
|
* This method is useful after device reset, to validate the device mac address
|
|
* and the device offloads are the same as before the reset.
|
|
*
|
|
* @return - 0 on success negative value otherwise.
|
|
*/
|
|
int ena_com_validate_version(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_get_link_params - Retrieve physical link parameters.
|
|
* @ena_dev: ENA communication layer struct
|
|
* @resp: Link parameters
|
|
*
|
|
* Retrieve the physical link parameters,
|
|
* like speed, auto-negotiation and full duplex support.
|
|
*
|
|
* @return - 0 on Success negative value otherwise.
|
|
*/
|
|
int ena_com_get_link_params(struct ena_com_dev *ena_dev,
|
|
struct ena_admin_get_feat_resp *resp);
|
|
|
|
/* ena_com_get_dma_width - Retrieve physical dma address width the device
|
|
* supports.
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* Retrieve the maximum physical address bits the device can handle.
|
|
*
|
|
* @return: > 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_get_dma_width(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_set_aenq_config - Set aenq groups configurations
|
|
* @ena_dev: ENA communication layer struct
|
|
* @groups flag: bit fields flags of enum ena_admin_aenq_group.
|
|
*
|
|
* Configure which aenq event group the driver would like to receive.
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_set_aenq_config(struct ena_com_dev *ena_dev, u32 groups_flag);
|
|
|
|
/* ena_com_get_dev_attr_feat - Get device features
|
|
* @ena_dev: ENA communication layer struct
|
|
* @get_feat_ctx: returned context that contain the get features.
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_get_dev_attr_feat(struct ena_com_dev *ena_dev,
|
|
struct ena_com_dev_get_features_ctx *get_feat_ctx);
|
|
|
|
/* ena_com_get_dev_basic_stats - Get device basic statistics
|
|
* @ena_dev: ENA communication layer struct
|
|
* @stats: stats return value
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_get_dev_basic_stats(struct ena_com_dev *ena_dev,
|
|
struct ena_admin_basic_stats *stats);
|
|
|
|
/* ena_com_set_dev_mtu - Configure the device mtu.
|
|
* @ena_dev: ENA communication layer struct
|
|
* @mtu: mtu value
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, int mtu);
|
|
|
|
/* ena_com_get_offload_settings - Retrieve the device offloads capabilities
|
|
* @ena_dev: ENA communication layer struct
|
|
* @offlad: offload return value
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_get_offload_settings(struct ena_com_dev *ena_dev,
|
|
struct ena_admin_feature_offload_desc *offload);
|
|
|
|
/* ena_com_rss_init - Init RSS
|
|
* @ena_dev: ENA communication layer struct
|
|
* @log_size: indirection log size
|
|
*
|
|
* Allocate RSS/RFS resources.
|
|
* The caller then can configure rss using ena_com_set_hash_function,
|
|
* ena_com_set_hash_ctrl and ena_com_indirect_table_set.
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_rss_init(struct ena_com_dev *ena_dev, u16 log_size);
|
|
|
|
/* ena_com_rss_destroy - Destroy rss
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* Free all the RSS/RFS resources.
|
|
*/
|
|
void ena_com_rss_destroy(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_get_current_hash_function - Get RSS hash function
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* Return the current hash function.
|
|
* @return: 0 or one of the ena_admin_hash_functions values.
|
|
*/
|
|
int ena_com_get_current_hash_function(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_fill_hash_function - Fill RSS hash function
|
|
* @ena_dev: ENA communication layer struct
|
|
* @func: The hash function (Toeplitz or crc)
|
|
* @key: Hash key (for toeplitz hash)
|
|
* @key_len: key length (max length 10 DW)
|
|
* @init_val: initial value for the hash function
|
|
*
|
|
* Fill the ena_dev resources with the desire hash function, hash key, key_len
|
|
* and key initial value (if needed by the hash function).
|
|
* To flush the key into the device the caller should call
|
|
* ena_com_set_hash_function.
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_fill_hash_function(struct ena_com_dev *ena_dev,
|
|
enum ena_admin_hash_functions func,
|
|
const u8 *key, u16 key_len, u32 init_val);
|
|
|
|
/* ena_com_set_hash_function - Flush the hash function and it dependencies to
|
|
* the device.
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* Flush the hash function and it dependencies (key, key length and
|
|
* initial value) if needed.
|
|
*
|
|
* @note: Prior to this method the caller should call ena_com_fill_hash_function
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_set_hash_function(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_get_hash_function - Retrieve the hash function and the hash key
|
|
* from the device.
|
|
* @ena_dev: ENA communication layer struct
|
|
* @func: hash function
|
|
* @key: hash key
|
|
*
|
|
* Retrieve the hash function and the hash key from the device.
|
|
*
|
|
* @note: If the caller called ena_com_fill_hash_function but didn't flash
|
|
* it to the device, the new configuration will be lost.
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_get_hash_function(struct ena_com_dev *ena_dev,
|
|
enum ena_admin_hash_functions *func,
|
|
u8 *key);
|
|
|
|
/* ena_com_fill_hash_ctrl - Fill RSS hash control
|
|
* @ena_dev: ENA communication layer struct.
|
|
* @proto: The protocol to configure.
|
|
* @hash_fields: bit mask of ena_admin_flow_hash_fields
|
|
*
|
|
* Fill the ena_dev resources with the desire hash control (the ethernet
|
|
* fields that take part of the hash) for a specific protocol.
|
|
* To flush the hash control to the device, the caller should call
|
|
* ena_com_set_hash_ctrl.
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_fill_hash_ctrl(struct ena_com_dev *ena_dev,
|
|
enum ena_admin_flow_hash_proto proto,
|
|
u16 hash_fields);
|
|
|
|
/* ena_com_set_hash_ctrl - Flush the hash control resources to the device.
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* Flush the hash control (the ethernet fields that take part of the hash)
|
|
*
|
|
* @note: Prior to this method the caller should call ena_com_fill_hash_ctrl.
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_set_hash_ctrl(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_get_hash_ctrl - Retrieve the hash control from the device.
|
|
* @ena_dev: ENA communication layer struct
|
|
* @proto: The protocol to retrieve.
|
|
* @fields: bit mask of ena_admin_flow_hash_fields.
|
|
*
|
|
* Retrieve the hash control from the device.
|
|
*
|
|
* @note, If the caller called ena_com_fill_hash_ctrl but didn't flash
|
|
* it to the device, the new configuration will be lost.
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_get_hash_ctrl(struct ena_com_dev *ena_dev,
|
|
enum ena_admin_flow_hash_proto proto,
|
|
u16 *fields);
|
|
|
|
/* ena_com_set_default_hash_ctrl - Set the hash control to a default
|
|
* configuration.
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* Fill the ena_dev resources with the default hash control configuration.
|
|
* To flush the hash control to the device, the caller should call
|
|
* ena_com_set_hash_ctrl.
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_set_default_hash_ctrl(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_indirect_table_fill_entry - Fill a single entry in the RSS
|
|
* indirection table
|
|
* @ena_dev: ENA communication layer struct.
|
|
* @entry_idx - indirection table entry.
|
|
* @entry_value - redirection value
|
|
*
|
|
* Fill a single entry of the RSS indirection table in the ena_dev resources.
|
|
* To flush the indirection table to the device, the called should call
|
|
* ena_com_indirect_table_set.
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_indirect_table_fill_entry(struct ena_com_dev *ena_dev,
|
|
u16 entry_idx, u16 entry_value);
|
|
|
|
/* ena_com_indirect_table_set - Flush the indirection table to the device.
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* Flush the indirection hash control to the device.
|
|
* Prior to this method the caller should call ena_com_indirect_table_fill_entry
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_indirect_table_set(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_indirect_table_get - Retrieve the indirection table from the device.
|
|
* @ena_dev: ENA communication layer struct
|
|
* @ind_tbl: indirection table
|
|
*
|
|
* Retrieve the RSS indirection table from the device.
|
|
*
|
|
* @note: If the caller called ena_com_indirect_table_fill_entry but didn't flash
|
|
* it to the device, the new configuration will be lost.
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_indirect_table_get(struct ena_com_dev *ena_dev, u32 *ind_tbl);
|
|
|
|
/* ena_com_allocate_host_info - Allocate host info resources.
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_allocate_host_info(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_allocate_debug_area - Allocate debug area.
|
|
* @ena_dev: ENA communication layer struct
|
|
* @debug_area_size - debug area size.
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_allocate_debug_area(struct ena_com_dev *ena_dev,
|
|
u32 debug_area_size);
|
|
|
|
/* ena_com_delete_debug_area - Free the debug area resources.
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* Free the allocate debug area.
|
|
*/
|
|
void ena_com_delete_debug_area(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_delete_host_info - Free the host info resources.
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* Free the allocate host info.
|
|
*/
|
|
void ena_com_delete_host_info(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_set_host_attributes - Update the device with the host
|
|
* attributes (debug area and host info) base address.
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* @return: 0 on Success and negative value otherwise.
|
|
*/
|
|
int ena_com_set_host_attributes(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_create_io_cq - Create io completion queue.
|
|
* @ena_dev: ENA communication layer struct
|
|
* @io_cq - io completion queue handler
|
|
|
|
* Create IO completion queue.
|
|
*
|
|
* @return - 0 on success, negative value on failure.
|
|
*/
|
|
int ena_com_create_io_cq(struct ena_com_dev *ena_dev,
|
|
struct ena_com_io_cq *io_cq);
|
|
|
|
/* ena_com_destroy_io_cq - Destroy io completion queue.
|
|
* @ena_dev: ENA communication layer struct
|
|
* @io_cq - io completion queue handler
|
|
|
|
* Destroy IO completion queue.
|
|
*
|
|
* @return - 0 on success, negative value on failure.
|
|
*/
|
|
int ena_com_destroy_io_cq(struct ena_com_dev *ena_dev,
|
|
struct ena_com_io_cq *io_cq);
|
|
|
|
/* ena_com_execute_admin_command - Execute admin command
|
|
* @admin_queue: admin queue.
|
|
* @cmd: the admin command to execute.
|
|
* @cmd_size: the command size.
|
|
* @cmd_completion: command completion return value.
|
|
* @cmd_comp_size: command completion size.
|
|
|
|
* Submit an admin command and then wait until the device will return a
|
|
* completion.
|
|
* The completion will be copyed into cmd_comp.
|
|
*
|
|
* @return - 0 on success, negative value on failure.
|
|
*/
|
|
int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue,
|
|
struct ena_admin_aq_entry *cmd,
|
|
size_t cmd_size,
|
|
struct ena_admin_acq_entry *cmd_comp,
|
|
size_t cmd_comp_size);
|
|
|
|
/* ena_com_init_interrupt_moderation - Init interrupt moderation
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* @return - 0 on success, negative value on failure.
|
|
*/
|
|
int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_destroy_interrupt_moderation - Destroy interrupt moderation resources
|
|
* @ena_dev: ENA communication layer struct
|
|
*/
|
|
void ena_com_destroy_interrupt_moderation(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_interrupt_moderation_supported - Return if interrupt moderation
|
|
* capability is supported by the device.
|
|
*
|
|
* @return - supported or not.
|
|
*/
|
|
bool ena_com_interrupt_moderation_supported(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_config_default_interrupt_moderation_table - Restore the interrupt
|
|
* moderation table back to the default parameters.
|
|
* @ena_dev: ENA communication layer struct
|
|
*/
|
|
void ena_com_config_default_interrupt_moderation_table(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_update_nonadaptive_moderation_interval_tx - Update the
|
|
* non-adaptive interval in Tx direction.
|
|
* @ena_dev: ENA communication layer struct
|
|
* @tx_coalesce_usecs: Interval in usec.
|
|
*
|
|
* @return - 0 on success, negative value on failure.
|
|
*/
|
|
int ena_com_update_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev,
|
|
u32 tx_coalesce_usecs);
|
|
|
|
/* ena_com_update_nonadaptive_moderation_interval_rx - Update the
|
|
* non-adaptive interval in Rx direction.
|
|
* @ena_dev: ENA communication layer struct
|
|
* @rx_coalesce_usecs: Interval in usec.
|
|
*
|
|
* @return - 0 on success, negative value on failure.
|
|
*/
|
|
int ena_com_update_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev,
|
|
u32 rx_coalesce_usecs);
|
|
|
|
/* ena_com_get_nonadaptive_moderation_interval_tx - Retrieve the
|
|
* non-adaptive interval in Tx direction.
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* @return - interval in usec
|
|
*/
|
|
unsigned int ena_com_get_nonadaptive_moderation_interval_tx(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_get_nonadaptive_moderation_interval_rx - Retrieve the
|
|
* non-adaptive interval in Rx direction.
|
|
* @ena_dev: ENA communication layer struct
|
|
*
|
|
* @return - interval in usec
|
|
*/
|
|
unsigned int ena_com_get_nonadaptive_moderation_interval_rx(struct ena_com_dev *ena_dev);
|
|
|
|
/* ena_com_init_intr_moderation_entry - Update a single entry in the interrupt
|
|
* moderation table.
|
|
* @ena_dev: ENA communication layer struct
|
|
* @level: Interrupt moderation table level
|
|
* @entry: Entry value
|
|
*
|
|
* Update a single entry in the interrupt moderation table.
|
|
*/
|
|
void ena_com_init_intr_moderation_entry(struct ena_com_dev *ena_dev,
|
|
enum ena_intr_moder_level level,
|
|
struct ena_intr_moder_entry *entry);
|
|
|
|
/* ena_com_get_intr_moderation_entry - Init ena_intr_moder_entry.
|
|
* @ena_dev: ENA communication layer struct
|
|
* @level: Interrupt moderation table level
|
|
* @entry: Entry to fill.
|
|
*
|
|
* Initialize the entry according to the adaptive interrupt moderation table.
|
|
*/
|
|
void ena_com_get_intr_moderation_entry(struct ena_com_dev *ena_dev,
|
|
enum ena_intr_moder_level level,
|
|
struct ena_intr_moder_entry *entry);
|
|
|
|
static inline bool ena_com_get_adaptive_moderation_enabled(struct ena_com_dev *ena_dev)
|
|
{
|
|
return ena_dev->adaptive_coalescing;
|
|
}
|
|
|
|
static inline void ena_com_enable_adaptive_moderation(struct ena_com_dev *ena_dev)
|
|
{
|
|
ena_dev->adaptive_coalescing = true;
|
|
}
|
|
|
|
static inline void ena_com_disable_adaptive_moderation(struct ena_com_dev *ena_dev)
|
|
{
|
|
ena_dev->adaptive_coalescing = false;
|
|
}
|
|
|
|
/* ena_com_calculate_interrupt_delay - Calculate new interrupt delay
|
|
* @ena_dev: ENA communication layer struct
|
|
* @pkts: Number of packets since the last update
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* @bytes: Number of bytes received since the last update.
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* @smoothed_interval: Returned interval
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* @moder_tbl_idx: Current table level as input update new level as return
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* value.
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*/
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static inline void ena_com_calculate_interrupt_delay(struct ena_com_dev *ena_dev,
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unsigned int pkts,
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unsigned int bytes,
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unsigned int *smoothed_interval,
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unsigned int *moder_tbl_idx)
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{
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enum ena_intr_moder_level curr_moder_idx, new_moder_idx;
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struct ena_intr_moder_entry *curr_moder_entry;
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struct ena_intr_moder_entry *pred_moder_entry;
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struct ena_intr_moder_entry *new_moder_entry;
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struct ena_intr_moder_entry *intr_moder_tbl = ena_dev->intr_moder_tbl;
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unsigned int interval;
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|
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/* We apply adaptive moderation on Rx path only.
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* Tx uses static interrupt moderation.
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*/
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if (!pkts || !bytes)
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/* Tx interrupt, or spurious interrupt,
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* in both cases we just use same delay values
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*/
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return;
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|
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curr_moder_idx = (enum ena_intr_moder_level)(*moder_tbl_idx);
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if (unlikely(curr_moder_idx >= ENA_INTR_MAX_NUM_OF_LEVELS)) {
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pr_err("Wrong moderation index %u\n", curr_moder_idx);
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return;
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}
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|
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curr_moder_entry = &intr_moder_tbl[curr_moder_idx];
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new_moder_idx = curr_moder_idx;
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|
|
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if (curr_moder_idx == ENA_INTR_MODER_LOWEST) {
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if ((pkts > curr_moder_entry->pkts_per_interval) ||
|
|
(bytes > curr_moder_entry->bytes_per_interval))
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new_moder_idx =
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|
(enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE);
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} else {
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|
pred_moder_entry = &intr_moder_tbl[curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE];
|
|
|
|
if ((pkts <= pred_moder_entry->pkts_per_interval) ||
|
|
(bytes <= pred_moder_entry->bytes_per_interval))
|
|
new_moder_idx =
|
|
(enum ena_intr_moder_level)(curr_moder_idx - ENA_INTR_MODER_LEVEL_STRIDE);
|
|
else if ((pkts > curr_moder_entry->pkts_per_interval) ||
|
|
(bytes > curr_moder_entry->bytes_per_interval)) {
|
|
if (curr_moder_idx != ENA_INTR_MODER_HIGHEST)
|
|
new_moder_idx =
|
|
(enum ena_intr_moder_level)(curr_moder_idx + ENA_INTR_MODER_LEVEL_STRIDE);
|
|
}
|
|
}
|
|
new_moder_entry = &intr_moder_tbl[new_moder_idx];
|
|
|
|
interval = new_moder_entry->intr_moder_interval;
|
|
*smoothed_interval = (
|
|
(interval * ENA_INTR_DELAY_NEW_VALUE_WEIGHT +
|
|
ENA_INTR_DELAY_OLD_VALUE_WEIGHT * (*smoothed_interval)) + 5) /
|
|
10;
|
|
|
|
*moder_tbl_idx = new_moder_idx;
|
|
}
|
|
|
|
/* ena_com_update_intr_reg - Prepare interrupt register
|
|
* @intr_reg: interrupt register to update.
|
|
* @rx_delay_interval: Rx interval in usecs
|
|
* @tx_delay_interval: Tx interval in usecs
|
|
* @unmask: unask enable/disable
|
|
*
|
|
* Prepare interrupt update register with the supplied parameters.
|
|
*/
|
|
static inline void ena_com_update_intr_reg(struct ena_eth_io_intr_reg *intr_reg,
|
|
u32 rx_delay_interval,
|
|
u32 tx_delay_interval,
|
|
bool unmask)
|
|
{
|
|
intr_reg->intr_control = 0;
|
|
intr_reg->intr_control |= rx_delay_interval &
|
|
ENA_ETH_IO_INTR_REG_RX_INTR_DELAY_MASK;
|
|
|
|
intr_reg->intr_control |=
|
|
(tx_delay_interval << ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_SHIFT)
|
|
& ENA_ETH_IO_INTR_REG_TX_INTR_DELAY_MASK;
|
|
|
|
if (unmask)
|
|
intr_reg->intr_control |= ENA_ETH_IO_INTR_REG_INTR_UNMASK_MASK;
|
|
}
|
|
|
|
#endif /* !(ENA_COM) */
|