393 lines
9.8 KiB
C
393 lines
9.8 KiB
C
/*
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* drivers/net/phy/realtek.c
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*
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* Driver for Realtek PHYs
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*
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* Author: Johnson Leung <r58129@freescale.com>
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*
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* Copyright (c) 2004 Freescale Semiconductor, Inc.
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* Copyright (c) 2019 - 2020, NVIDIA CORPORATION. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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*/
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#include <linux/phy.h>
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#include <linux/module.h>
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#include <linux/netdevice.h>
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#define RTL821x_PHYSR 0x11
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#define RTL821x_PHYSR_DUPLEX 0x2000
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#define RTL821x_PHYSR_SPEED 0xc000
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#define RTL821x_INER 0x12
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#define RTL821x_INER_INIT 0x6400
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#define RTL821x_INSR 0x13
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#define RTL8211E_INER_LINK_STATUS 0x400
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#define RTL8211F_INER_LINK_STATUS 0x0010
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#define RTL8211F_INSR 0x1d
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#define RTL8211F_PAGE_SELECT 0x1f
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#define RTL8211F_TX_DELAY 0x100
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#define RTL8211F_DEFAULT_PAGE 0xa42
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#define RTL8211F_PHYCR1_PAGE 0xa43
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#define RTL8211F_LED_PAGE 0xd04
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#define RTL8211F_PHYCR1_REG 0x18
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#define RTL8211F_PHYCR2_REG 0x19
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#define RTL8211F_ALDPS_ENABLED 0x4
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#define RTL8211F_ALDPS_PLL_OFF 0x2
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#define RTL8211F_LED0_LINK_1000 0x8
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#define RTL8211F_LED1_LINK_1000 0x100
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#define RTL8211F_LED1_LINK_100 0x40
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#define RTL8211F_LED1_LINK_10 0x20
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#define RTL8211F_LED1_LINK_ACTIVE 0x200
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#define RTL8211F_PAGE_LCR_LED_CONTROL 0x10
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#define RTL8211F_PAGE_EEE_LED_CONTROL 0x11
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#define RTL8211F_INTERRUPT_SELECT_PAGE 0xd40
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#define RTL8211F_WOL_FRAME_SELECT_PAGE 0xd80
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#define RTL8211F_WOL_MAC_PAGE 0xd8c
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#define RTL8211F_WOL_SETTING_PAGE 0xd8a
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#define RTL8211F_INTERRUPT_SELECT_REG 0x16
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#define RTL8211F_WOL_REG_MAC_WORD_0 0x10
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#define RTL8211F_WOL_REG_MAC_WORD_1 0x11
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#define RTL8211F_WOL_REG_MAC_WORD_2 0x12
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#define RTL8211F_WOL_REG_PACKET_LEN 0x11
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#define RTL8211F_WOL_REG_FRAME_EVENT 0x10
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#define RTL8211F_WOL_PACKET_LEN 0x1fff
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#define RTL8211F_WOL_SET_PACKET_LEN BIT(15)
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#define RTL8211F_WOL_ENABLE_MAGIC_PACKET BIT(12)
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#define RTL8211F_WOL_ENABLE_PMEB_EVENT BIT(7)
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#define BIT_SHIFT_8 8
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#define MAC_ADDRESS_BYTE_0 0
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#define MAC_ADDRESS_BYTE_1 1
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#define MAC_ADDRESS_BYTE_2 2
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#define MAC_ADDRESS_BYTE_3 3
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#define MAC_ADDRESS_BYTE_4 4
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#define MAC_ADDRESS_BYTE_5 5
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MODULE_DESCRIPTION("Realtek PHY driver");
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MODULE_AUTHOR("Johnson Leung");
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MODULE_LICENSE("GPL");
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static int rtl8211f_wol_settings(struct phy_device *phydev, bool enable)
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{
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int ret;
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/* Set WoL events and packet length */
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ret = phy_write(phydev, RTL8211F_PAGE_SELECT,
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RTL8211F_WOL_SETTING_PAGE);
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if (ret)
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return ret;
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if (enable) {
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ret = phy_write(phydev, RTL8211F_WOL_REG_PACKET_LEN,
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(RTL8211F_WOL_PACKET_LEN |
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RTL8211F_WOL_SET_PACKET_LEN));
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if (ret)
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return ret;
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ret = phy_write(phydev, RTL8211F_WOL_REG_FRAME_EVENT,
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RTL8211F_WOL_ENABLE_MAGIC_PACKET);
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if (ret)
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return ret;
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} else {
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ret = phy_write(phydev, RTL8211F_WOL_REG_PACKET_LEN,
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RTL8211F_WOL_PACKET_LEN);
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if (ret)
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return ret;
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ret = phy_write(phydev, RTL8211F_WOL_REG_FRAME_EVENT, 0x0);
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if (ret)
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return ret;
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}
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return phy_write(phydev, RTL8211F_PAGE_SELECT, 0x0);
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}
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static int rtl821x_ack_interrupt(struct phy_device *phydev)
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{
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int err;
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err = phy_read(phydev, RTL821x_INSR);
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return (err < 0) ? err : 0;
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}
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static int rtl8211f_ack_interrupt(struct phy_device *phydev)
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{
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int err;
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phy_write(phydev, RTL8211F_PAGE_SELECT, 0xa43);
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err = phy_read(phydev, RTL8211F_INSR);
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/* restore to default page 0 */
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phy_write(phydev, RTL8211F_PAGE_SELECT, 0x0);
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return (err < 0) ? err : 0;
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}
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static int rtl8211b_config_intr(struct phy_device *phydev)
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{
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int err;
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
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err = phy_write(phydev, RTL821x_INER,
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RTL821x_INER_INIT);
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else
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err = phy_write(phydev, RTL821x_INER, 0);
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return err;
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}
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static int rtl8211e_config_intr(struct phy_device *phydev)
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{
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int err;
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
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err = phy_write(phydev, RTL821x_INER,
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RTL8211E_INER_LINK_STATUS);
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else
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err = phy_write(phydev, RTL821x_INER, 0);
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return err;
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}
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static int rtl8211f_config_intr(struct phy_device *phydev)
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{
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int err;
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u16 reg;
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err = phy_write(phydev, RTL8211F_PAGE_SELECT, RTL8211F_DEFAULT_PAGE);
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if (err)
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return err;
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if (phydev->interrupts == PHY_INTERRUPT_ENABLED)
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reg = (RTL8211F_INER_LINK_STATUS |
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RTL8211F_WOL_ENABLE_PMEB_EVENT);
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else
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reg = 0;
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err = phy_write(phydev, RTL821x_INER, reg);
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if (err)
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return err;
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return phy_write(phydev, RTL8211F_PAGE_SELECT, 0);
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}
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static int rtl8211f_config_init(struct phy_device *phydev)
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{
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int ret;
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u16 reg;
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ret = genphy_config_init(phydev);
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if (ret < 0)
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return ret;
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phy_write(phydev, RTL8211F_PAGE_SELECT, 0xd08);
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reg = phy_read(phydev, 0x11);
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/* enable TX-delay for rgmii-id and rgmii-txid, otherwise disable it */
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if (phydev->interface == PHY_INTERFACE_MODE_RGMII_ID ||
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phydev->interface == PHY_INTERFACE_MODE_RGMII_TXID)
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reg |= RTL8211F_TX_DELAY;
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else
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reg &= ~RTL8211F_TX_DELAY;
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phy_write(phydev, 0x11, reg);
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ret = phy_write(phydev, RTL8211F_PAGE_SELECT, RTL8211F_PHYCR1_PAGE);
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if (ret)
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return ret;
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reg = phy_read(phydev, RTL8211F_PHYCR1_REG);
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if (reg < 0)
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return reg;
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ret = phy_write(phydev, RTL8211F_PHYCR1_REG,
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reg | RTL8211F_ALDPS_ENABLED |
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RTL8211F_ALDPS_PLL_OFF);
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if (ret)
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return ret;
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reg = phy_read(phydev, RTL8211F_PHYCR2_REG);
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if (reg < 0)
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return reg;
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ret = phy_write(phydev, RTL8211F_PHYCR2_REG, reg & ~BIT(0));
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if (ret)
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return ret;
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ret = phy_write(phydev, RTL8211F_PAGE_SELECT, RTL8211F_LED_PAGE);
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if (ret)
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return ret;
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/* Enable all speeds for activity indicator and LED0 for GBE */
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reg = RTL8211F_LED0_LINK_1000 | RTL8211F_LED1_LINK_1000 |
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RTL8211F_LED1_LINK_100 | RTL8211F_LED1_LINK_10 |
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RTL8211F_LED1_LINK_ACTIVE;
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ret = phy_write(phydev, RTL8211F_PAGE_LCR_LED_CONTROL, reg);
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if (ret)
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return ret;
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/* disable EEE LED control */
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ret = phy_write(phydev, RTL8211F_PAGE_EEE_LED_CONTROL, 0);
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if (ret)
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return ret;
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/* Write MAC required registers for WoL*/
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ret = phy_write(phydev, RTL8211F_PAGE_SELECT,
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RTL8211F_WOL_MAC_PAGE);
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if (ret)
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return ret;
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ret = phy_write(phydev, RTL8211F_WOL_REG_MAC_WORD_0,
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phydev->attached_dev->dev_addr[MAC_ADDRESS_BYTE_0] |
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(phydev->attached_dev->dev_addr[MAC_ADDRESS_BYTE_1]
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<< BIT_SHIFT_8));
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if (ret)
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return ret;
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ret = phy_write(phydev, RTL8211F_WOL_REG_MAC_WORD_1,
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phydev->attached_dev->dev_addr[MAC_ADDRESS_BYTE_2] |
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(phydev->attached_dev->dev_addr[MAC_ADDRESS_BYTE_3]
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<< BIT_SHIFT_8));
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if (ret)
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return ret;
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ret = phy_write(phydev, RTL8211F_WOL_REG_MAC_WORD_2,
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phydev->attached_dev->dev_addr[MAC_ADDRESS_BYTE_4] |
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(phydev->attached_dev->dev_addr[MAC_ADDRESS_BYTE_5]
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<< BIT_SHIFT_8));
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if (ret)
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return ret;
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phydev_dbg(phydev, "MAC address written to registers\n");
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/* restore to default page 0 */
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phy_write(phydev, RTL8211F_PAGE_SELECT, 0x0);
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return 0;
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}
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static void rtl8211f_get_wol(struct phy_device *phydev,
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struct ethtool_wolinfo *wol)
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{
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int ret;
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u32 value;
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/* For RTL 8211F Magic packet WoL is enabled by default */
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wol->supported = WAKE_MAGIC;
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ret = phy_write(phydev, RTL8211F_PAGE_SELECT,
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RTL8211F_WOL_SETTING_PAGE);
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if (ret)
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return;
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value = phy_read(phydev, RTL8211F_WOL_REG_FRAME_EVENT);
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if (value < 0)
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return;
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if (value & RTL8211F_WOL_ENABLE_MAGIC_PACKET)
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wol->wolopts = WAKE_MAGIC;
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}
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static int rtl8211f_set_wol(struct phy_device *phydev,
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struct ethtool_wolinfo *wol)
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{
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int ret;
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if (wol->wolopts & WAKE_MAGIC) {
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ret = rtl8211f_wol_settings(phydev, true);
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if (ret < 0)
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return ret;
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phydev_dbg(phydev, " WOL Enabled\n");
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} else {
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ret = rtl8211f_wol_settings(phydev, false);
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if (ret < 0)
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return ret;
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phydev_dbg(phydev, " WOL Disabled\n");
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}
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/* restore to default page 0 */
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return phy_write(phydev, RTL8211F_PAGE_SELECT, 0x0);
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}
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static struct phy_driver realtek_drvs[] = {
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{
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.phy_id = 0x00008201,
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.name = "RTL8201CP Ethernet",
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.phy_id_mask = 0x0000ffff,
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.features = PHY_BASIC_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.config_aneg = &genphy_config_aneg,
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.read_status = &genphy_read_status,
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}, {
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.phy_id = 0x001cc912,
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.name = "RTL8211B Gigabit Ethernet",
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.phy_id_mask = 0x001fffff,
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.config_aneg = &genphy_config_aneg,
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.read_status = &genphy_read_status,
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.ack_interrupt = &rtl821x_ack_interrupt,
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.config_intr = &rtl8211b_config_intr,
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}, {
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.phy_id = 0x001cc914,
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.name = "RTL8211DN Gigabit Ethernet",
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.phy_id_mask = 0x001fffff,
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.config_aneg = genphy_config_aneg,
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.read_status = genphy_read_status,
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.ack_interrupt = rtl821x_ack_interrupt,
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.config_intr = rtl8211e_config_intr,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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}, {
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.phy_id = 0x001cc915,
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.name = "RTL8211E Gigabit Ethernet",
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.phy_id_mask = 0x001fffff,
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.config_aneg = &genphy_config_aneg,
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.read_status = &genphy_read_status,
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.ack_interrupt = &rtl821x_ack_interrupt,
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.config_intr = &rtl8211e_config_intr,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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}, {
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.phy_id = 0x001cc916,
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.name = "RTL8211F Gigabit Ethernet",
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.phy_id_mask = 0x001fffff,
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.features = PHY_GBIT_FEATURES,
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.flags = PHY_HAS_INTERRUPT,
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.config_aneg = &genphy_config_aneg,
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.config_init = &rtl8211f_config_init,
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.read_status = &genphy_read_status,
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.ack_interrupt = &rtl8211f_ack_interrupt,
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.config_intr = &rtl8211f_config_intr,
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.get_wol = &rtl8211f_get_wol,
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.set_wol = &rtl8211f_set_wol,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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},
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};
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module_phy_driver(realtek_drvs);
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static struct mdio_device_id __maybe_unused realtek_tbl[] = {
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{ 0x001cc912, 0x001fffff },
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{ 0x001cc914, 0x001fffff },
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{ 0x001cc915, 0x001fffff },
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{ 0x001cc916, 0x001fffff },
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{ }
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};
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MODULE_DEVICE_TABLE(mdio, realtek_tbl);
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