793 lines
24 KiB
C
793 lines
24 KiB
C
/*
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* imx51 pinctrl driver based on imx pinmux core
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*
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* Copyright (C) 2012 Freescale Semiconductor, Inc.
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* Copyright (C) 2012 Linaro, Inc.
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*
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* Author: Dong Aisheng <dong.aisheng@linaro.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include "pinctrl-imx.h"
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enum imx51_pads {
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MX51_PAD_RESERVE0 = 0,
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MX51_PAD_RESERVE1 = 1,
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MX51_PAD_RESERVE2 = 2,
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MX51_PAD_RESERVE3 = 3,
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MX51_PAD_RESERVE4 = 4,
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MX51_PAD_RESERVE5 = 5,
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MX51_PAD_RESERVE6 = 6,
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MX51_PAD_EIM_DA0 = 7,
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MX51_PAD_EIM_DA1 = 8,
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MX51_PAD_EIM_DA2 = 9,
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MX51_PAD_EIM_DA3 = 10,
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MX51_PAD_EIM_DA4 = 11,
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MX51_PAD_EIM_DA5 = 12,
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MX51_PAD_EIM_DA6 = 13,
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MX51_PAD_EIM_DA7 = 14,
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MX51_PAD_EIM_DA8 = 15,
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MX51_PAD_EIM_DA9 = 16,
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MX51_PAD_EIM_DA10 = 17,
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MX51_PAD_EIM_DA11 = 18,
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MX51_PAD_EIM_DA12 = 19,
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MX51_PAD_EIM_DA13 = 20,
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MX51_PAD_EIM_DA14 = 21,
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MX51_PAD_EIM_DA15 = 22,
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MX51_PAD_EIM_D16 = 23,
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MX51_PAD_EIM_D17 = 24,
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MX51_PAD_EIM_D18 = 25,
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MX51_PAD_EIM_D19 = 26,
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MX51_PAD_EIM_D20 = 27,
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MX51_PAD_EIM_D21 = 28,
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MX51_PAD_EIM_D22 = 29,
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MX51_PAD_EIM_D23 = 30,
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MX51_PAD_EIM_D24 = 31,
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MX51_PAD_EIM_D25 = 32,
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MX51_PAD_EIM_D26 = 33,
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MX51_PAD_EIM_D27 = 34,
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MX51_PAD_EIM_D28 = 35,
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MX51_PAD_EIM_D29 = 36,
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MX51_PAD_EIM_D30 = 37,
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MX51_PAD_EIM_D31 = 38,
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MX51_PAD_EIM_A16 = 39,
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MX51_PAD_EIM_A17 = 40,
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MX51_PAD_EIM_A18 = 41,
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MX51_PAD_EIM_A19 = 42,
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MX51_PAD_EIM_A20 = 43,
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MX51_PAD_EIM_A21 = 44,
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MX51_PAD_EIM_A22 = 45,
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MX51_PAD_EIM_A23 = 46,
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MX51_PAD_EIM_A24 = 47,
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MX51_PAD_EIM_A25 = 48,
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MX51_PAD_EIM_A26 = 49,
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MX51_PAD_EIM_A27 = 50,
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MX51_PAD_EIM_EB0 = 51,
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MX51_PAD_EIM_EB1 = 52,
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MX51_PAD_EIM_EB2 = 53,
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MX51_PAD_EIM_EB3 = 54,
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MX51_PAD_EIM_OE = 55,
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MX51_PAD_EIM_CS0 = 56,
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MX51_PAD_EIM_CS1 = 57,
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MX51_PAD_EIM_CS2 = 58,
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MX51_PAD_EIM_CS3 = 59,
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MX51_PAD_EIM_CS4 = 60,
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MX51_PAD_EIM_CS5 = 61,
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MX51_PAD_EIM_DTACK = 62,
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MX51_PAD_EIM_LBA = 63,
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MX51_PAD_EIM_CRE = 64,
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MX51_PAD_DRAM_CS1 = 65,
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MX51_PAD_NANDF_WE_B = 66,
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MX51_PAD_NANDF_RE_B = 67,
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MX51_PAD_NANDF_ALE = 68,
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MX51_PAD_NANDF_CLE = 69,
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MX51_PAD_NANDF_WP_B = 70,
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MX51_PAD_NANDF_RB0 = 71,
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MX51_PAD_NANDF_RB1 = 72,
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MX51_PAD_NANDF_RB2 = 73,
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MX51_PAD_NANDF_RB3 = 74,
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MX51_PAD_GPIO_NAND = 75,
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MX51_PAD_NANDF_CS0 = 76,
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MX51_PAD_NANDF_CS1 = 77,
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MX51_PAD_NANDF_CS2 = 78,
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MX51_PAD_NANDF_CS3 = 79,
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MX51_PAD_NANDF_CS4 = 80,
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MX51_PAD_NANDF_CS5 = 81,
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MX51_PAD_NANDF_CS6 = 82,
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MX51_PAD_NANDF_CS7 = 83,
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MX51_PAD_NANDF_RDY_INT = 84,
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MX51_PAD_NANDF_D15 = 85,
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MX51_PAD_NANDF_D14 = 86,
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MX51_PAD_NANDF_D13 = 87,
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MX51_PAD_NANDF_D12 = 88,
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MX51_PAD_NANDF_D11 = 89,
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MX51_PAD_NANDF_D10 = 90,
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MX51_PAD_NANDF_D9 = 91,
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MX51_PAD_NANDF_D8 = 92,
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MX51_PAD_NANDF_D7 = 93,
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MX51_PAD_NANDF_D6 = 94,
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MX51_PAD_NANDF_D5 = 95,
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MX51_PAD_NANDF_D4 = 96,
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MX51_PAD_NANDF_D3 = 97,
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MX51_PAD_NANDF_D2 = 98,
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MX51_PAD_NANDF_D1 = 99,
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MX51_PAD_NANDF_D0 = 100,
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MX51_PAD_CSI1_D8 = 101,
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MX51_PAD_CSI1_D9 = 102,
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MX51_PAD_CSI1_D10 = 103,
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MX51_PAD_CSI1_D11 = 104,
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MX51_PAD_CSI1_D12 = 105,
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MX51_PAD_CSI1_D13 = 106,
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MX51_PAD_CSI1_D14 = 107,
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MX51_PAD_CSI1_D15 = 108,
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MX51_PAD_CSI1_D16 = 109,
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MX51_PAD_CSI1_D17 = 110,
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MX51_PAD_CSI1_D18 = 111,
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MX51_PAD_CSI1_D19 = 112,
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MX51_PAD_CSI1_VSYNC = 113,
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MX51_PAD_CSI1_HSYNC = 114,
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MX51_PAD_CSI2_D12 = 115,
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MX51_PAD_CSI2_D13 = 116,
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MX51_PAD_CSI2_D14 = 117,
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MX51_PAD_CSI2_D15 = 118,
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MX51_PAD_CSI2_D16 = 119,
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MX51_PAD_CSI2_D17 = 120,
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MX51_PAD_CSI2_D18 = 121,
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MX51_PAD_CSI2_D19 = 122,
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MX51_PAD_CSI2_VSYNC = 123,
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MX51_PAD_CSI2_HSYNC = 124,
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MX51_PAD_CSI2_PIXCLK = 125,
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MX51_PAD_I2C1_CLK = 126,
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MX51_PAD_I2C1_DAT = 127,
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MX51_PAD_AUD3_BB_TXD = 128,
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MX51_PAD_AUD3_BB_RXD = 129,
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MX51_PAD_AUD3_BB_CK = 130,
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MX51_PAD_AUD3_BB_FS = 131,
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MX51_PAD_CSPI1_MOSI = 132,
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MX51_PAD_CSPI1_MISO = 133,
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MX51_PAD_CSPI1_SS0 = 134,
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MX51_PAD_CSPI1_SS1 = 135,
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MX51_PAD_CSPI1_RDY = 136,
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MX51_PAD_CSPI1_SCLK = 137,
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MX51_PAD_UART1_RXD = 138,
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MX51_PAD_UART1_TXD = 139,
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MX51_PAD_UART1_RTS = 140,
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MX51_PAD_UART1_CTS = 141,
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MX51_PAD_UART2_RXD = 142,
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MX51_PAD_UART2_TXD = 143,
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MX51_PAD_UART3_RXD = 144,
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MX51_PAD_UART3_TXD = 145,
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MX51_PAD_OWIRE_LINE = 146,
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MX51_PAD_KEY_ROW0 = 147,
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MX51_PAD_KEY_ROW1 = 148,
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MX51_PAD_KEY_ROW2 = 149,
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MX51_PAD_KEY_ROW3 = 150,
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MX51_PAD_KEY_COL0 = 151,
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MX51_PAD_KEY_COL1 = 152,
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MX51_PAD_KEY_COL2 = 153,
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MX51_PAD_KEY_COL3 = 154,
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MX51_PAD_KEY_COL4 = 155,
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MX51_PAD_KEY_COL5 = 156,
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MX51_PAD_RESERVE7 = 157,
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MX51_PAD_USBH1_CLK = 158,
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MX51_PAD_USBH1_DIR = 159,
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MX51_PAD_USBH1_STP = 160,
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MX51_PAD_USBH1_NXT = 161,
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MX51_PAD_USBH1_DATA0 = 162,
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MX51_PAD_USBH1_DATA1 = 163,
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MX51_PAD_USBH1_DATA2 = 164,
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MX51_PAD_USBH1_DATA3 = 165,
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MX51_PAD_USBH1_DATA4 = 166,
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MX51_PAD_USBH1_DATA5 = 167,
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MX51_PAD_USBH1_DATA6 = 168,
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MX51_PAD_USBH1_DATA7 = 169,
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MX51_PAD_DI1_PIN11 = 170,
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MX51_PAD_DI1_PIN12 = 171,
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MX51_PAD_DI1_PIN13 = 172,
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MX51_PAD_DI1_D0_CS = 173,
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MX51_PAD_DI1_D1_CS = 174,
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MX51_PAD_DISPB2_SER_DIN = 175,
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MX51_PAD_DISPB2_SER_DIO = 176,
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MX51_PAD_DISPB2_SER_CLK = 177,
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MX51_PAD_DISPB2_SER_RS = 178,
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MX51_PAD_DISP1_DAT0 = 179,
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MX51_PAD_DISP1_DAT1 = 180,
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MX51_PAD_DISP1_DAT2 = 181,
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MX51_PAD_DISP1_DAT3 = 182,
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MX51_PAD_DISP1_DAT4 = 183,
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MX51_PAD_DISP1_DAT5 = 184,
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MX51_PAD_DISP1_DAT6 = 185,
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MX51_PAD_DISP1_DAT7 = 186,
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MX51_PAD_DISP1_DAT8 = 187,
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MX51_PAD_DISP1_DAT9 = 188,
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MX51_PAD_DISP1_DAT10 = 189,
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MX51_PAD_DISP1_DAT11 = 190,
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MX51_PAD_DISP1_DAT12 = 191,
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MX51_PAD_DISP1_DAT13 = 192,
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MX51_PAD_DISP1_DAT14 = 193,
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MX51_PAD_DISP1_DAT15 = 194,
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MX51_PAD_DISP1_DAT16 = 195,
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MX51_PAD_DISP1_DAT17 = 196,
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MX51_PAD_DISP1_DAT18 = 197,
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MX51_PAD_DISP1_DAT19 = 198,
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MX51_PAD_DISP1_DAT20 = 199,
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MX51_PAD_DISP1_DAT21 = 200,
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MX51_PAD_DISP1_DAT22 = 201,
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MX51_PAD_DISP1_DAT23 = 202,
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MX51_PAD_DI1_PIN3 = 203,
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MX51_PAD_DI1_PIN2 = 204,
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MX51_PAD_RESERVE8 = 205,
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MX51_PAD_DI_GP2 = 206,
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MX51_PAD_DI_GP3 = 207,
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MX51_PAD_DI2_PIN4 = 208,
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MX51_PAD_DI2_PIN2 = 209,
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MX51_PAD_DI2_PIN3 = 210,
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MX51_PAD_DI2_DISP_CLK = 211,
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MX51_PAD_DI_GP4 = 212,
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MX51_PAD_DISP2_DAT0 = 213,
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MX51_PAD_DISP2_DAT1 = 214,
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MX51_PAD_DISP2_DAT2 = 215,
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MX51_PAD_DISP2_DAT3 = 216,
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MX51_PAD_DISP2_DAT4 = 217,
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MX51_PAD_DISP2_DAT5 = 218,
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MX51_PAD_DISP2_DAT6 = 219,
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MX51_PAD_DISP2_DAT7 = 220,
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MX51_PAD_DISP2_DAT8 = 221,
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MX51_PAD_DISP2_DAT9 = 222,
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MX51_PAD_DISP2_DAT10 = 223,
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MX51_PAD_DISP2_DAT11 = 224,
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MX51_PAD_DISP2_DAT12 = 225,
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MX51_PAD_DISP2_DAT13 = 226,
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MX51_PAD_DISP2_DAT14 = 227,
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MX51_PAD_DISP2_DAT15 = 228,
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MX51_PAD_SD1_CMD = 229,
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MX51_PAD_SD1_CLK = 230,
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MX51_PAD_SD1_DATA0 = 231,
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MX51_PAD_SD1_DATA1 = 232,
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MX51_PAD_SD1_DATA2 = 233,
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MX51_PAD_SD1_DATA3 = 234,
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MX51_PAD_GPIO1_0 = 235,
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MX51_PAD_GPIO1_1 = 236,
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MX51_PAD_SD2_CMD = 237,
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MX51_PAD_SD2_CLK = 238,
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MX51_PAD_SD2_DATA0 = 239,
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MX51_PAD_SD2_DATA1 = 240,
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MX51_PAD_SD2_DATA2 = 241,
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MX51_PAD_SD2_DATA3 = 242,
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MX51_PAD_GPIO1_2 = 243,
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MX51_PAD_GPIO1_3 = 244,
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MX51_PAD_PMIC_INT_REQ = 245,
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MX51_PAD_GPIO1_4 = 246,
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MX51_PAD_GPIO1_5 = 247,
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MX51_PAD_GPIO1_6 = 248,
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MX51_PAD_GPIO1_7 = 249,
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MX51_PAD_GPIO1_8 = 250,
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MX51_PAD_GPIO1_9 = 251,
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MX51_PAD_RESERVE9 = 252,
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MX51_PAD_RESERVE10 = 253,
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MX51_PAD_RESERVE11 = 254,
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MX51_PAD_RESERVE12 = 255,
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MX51_PAD_RESERVE13 = 256,
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MX51_PAD_RESERVE14 = 257,
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MX51_PAD_RESERVE15 = 258,
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MX51_PAD_RESERVE16 = 259,
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MX51_PAD_RESERVE17 = 260,
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MX51_PAD_RESERVE18 = 261,
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MX51_PAD_RESERVE19 = 262,
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MX51_PAD_RESERVE20 = 263,
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MX51_PAD_RESERVE21 = 264,
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MX51_PAD_RESERVE22 = 265,
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MX51_PAD_RESERVE23 = 266,
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MX51_PAD_RESERVE24 = 267,
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MX51_PAD_RESERVE25 = 268,
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MX51_PAD_RESERVE26 = 269,
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MX51_PAD_RESERVE27 = 270,
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MX51_PAD_RESERVE28 = 271,
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MX51_PAD_RESERVE29 = 272,
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MX51_PAD_RESERVE30 = 273,
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MX51_PAD_RESERVE31 = 274,
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MX51_PAD_RESERVE32 = 275,
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MX51_PAD_RESERVE33 = 276,
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MX51_PAD_RESERVE34 = 277,
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MX51_PAD_RESERVE35 = 278,
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MX51_PAD_RESERVE36 = 279,
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MX51_PAD_RESERVE37 = 280,
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MX51_PAD_RESERVE38 = 281,
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MX51_PAD_RESERVE39 = 282,
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MX51_PAD_RESERVE40 = 283,
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MX51_PAD_RESERVE41 = 284,
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MX51_PAD_RESERVE42 = 285,
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MX51_PAD_RESERVE43 = 286,
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MX51_PAD_RESERVE44 = 287,
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MX51_PAD_RESERVE45 = 288,
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MX51_PAD_RESERVE46 = 289,
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MX51_PAD_RESERVE47 = 290,
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MX51_PAD_RESERVE48 = 291,
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MX51_PAD_RESERVE49 = 292,
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MX51_PAD_RESERVE50 = 293,
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MX51_PAD_RESERVE51 = 294,
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MX51_PAD_RESERVE52 = 295,
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MX51_PAD_RESERVE53 = 296,
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MX51_PAD_RESERVE54 = 297,
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MX51_PAD_RESERVE55 = 298,
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MX51_PAD_RESERVE56 = 299,
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MX51_PAD_RESERVE57 = 300,
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MX51_PAD_RESERVE58 = 301,
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MX51_PAD_RESERVE59 = 302,
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MX51_PAD_RESERVE60 = 303,
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MX51_PAD_RESERVE61 = 304,
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MX51_PAD_RESERVE62 = 305,
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MX51_PAD_RESERVE63 = 306,
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MX51_PAD_RESERVE64 = 307,
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MX51_PAD_RESERVE65 = 308,
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MX51_PAD_RESERVE66 = 309,
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MX51_PAD_RESERVE67 = 310,
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MX51_PAD_RESERVE68 = 311,
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MX51_PAD_RESERVE69 = 312,
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MX51_PAD_RESERVE70 = 313,
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MX51_PAD_RESERVE71 = 314,
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MX51_PAD_RESERVE72 = 315,
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MX51_PAD_RESERVE73 = 316,
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MX51_PAD_RESERVE74 = 317,
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MX51_PAD_RESERVE75 = 318,
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MX51_PAD_RESERVE76 = 319,
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MX51_PAD_RESERVE77 = 320,
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MX51_PAD_RESERVE78 = 321,
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MX51_PAD_RESERVE79 = 322,
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MX51_PAD_RESERVE80 = 323,
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MX51_PAD_RESERVE81 = 324,
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MX51_PAD_RESERVE82 = 325,
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MX51_PAD_RESERVE83 = 326,
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MX51_PAD_RESERVE84 = 327,
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MX51_PAD_RESERVE85 = 328,
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MX51_PAD_RESERVE86 = 329,
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MX51_PAD_RESERVE87 = 330,
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MX51_PAD_RESERVE88 = 331,
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MX51_PAD_RESERVE89 = 332,
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MX51_PAD_RESERVE90 = 333,
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MX51_PAD_RESERVE91 = 334,
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MX51_PAD_RESERVE92 = 335,
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MX51_PAD_RESERVE93 = 336,
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MX51_PAD_RESERVE94 = 337,
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MX51_PAD_RESERVE95 = 338,
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MX51_PAD_RESERVE96 = 339,
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MX51_PAD_RESERVE97 = 340,
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MX51_PAD_RESERVE98 = 341,
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MX51_PAD_RESERVE99 = 342,
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MX51_PAD_RESERVE100 = 343,
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MX51_PAD_RESERVE101 = 344,
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MX51_PAD_RESERVE102 = 345,
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MX51_PAD_RESERVE103 = 346,
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MX51_PAD_RESERVE104 = 347,
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MX51_PAD_RESERVE105 = 348,
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MX51_PAD_RESERVE106 = 349,
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MX51_PAD_RESERVE107 = 350,
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MX51_PAD_RESERVE108 = 351,
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MX51_PAD_RESERVE109 = 352,
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MX51_PAD_RESERVE110 = 353,
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MX51_PAD_RESERVE111 = 354,
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MX51_PAD_RESERVE112 = 355,
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MX51_PAD_RESERVE113 = 356,
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MX51_PAD_RESERVE114 = 357,
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MX51_PAD_RESERVE115 = 358,
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MX51_PAD_RESERVE116 = 359,
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MX51_PAD_RESERVE117 = 360,
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MX51_PAD_RESERVE118 = 361,
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MX51_PAD_RESERVE119 = 362,
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MX51_PAD_RESERVE120 = 363,
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MX51_PAD_RESERVE121 = 364,
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MX51_PAD_CSI1_PIXCLK = 365,
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MX51_PAD_CSI1_MCLK = 366,
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};
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/* Pad names for the pinmux subsystem */
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static const struct pinctrl_pin_desc imx51_pinctrl_pads[] = {
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE0),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE4),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE5),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE6),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DA0),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DA1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DA2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DA3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DA4),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DA5),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DA6),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DA7),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DA8),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DA9),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DA10),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DA11),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DA12),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DA13),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DA14),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DA15),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_D16),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_D17),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_D18),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_D19),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_D20),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_D21),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_D22),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_D23),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_D24),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_D25),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_D26),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_D27),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_D28),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_D29),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_D30),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_D31),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_A16),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_A17),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_A18),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_A19),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_A20),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_A21),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_A22),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_A23),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_A24),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_A25),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_A26),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_A27),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_EB0),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_EB1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_EB2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_EB3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_OE),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_CS0),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_CS1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_CS2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_CS3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_CS4),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_CS5),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_DTACK),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_LBA),
|
|
IMX_PINCTRL_PIN(MX51_PAD_EIM_CRE),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DRAM_CS1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_WE_B),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_RE_B),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_ALE),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_CLE),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_WP_B),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_RB0),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_RB1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_RB2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_RB3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_GPIO_NAND),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS0),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS4),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS5),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS6),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_CS7),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_RDY_INT),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_D15),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_D14),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_D13),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_D12),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_D11),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_D10),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_D9),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_D8),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_D7),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_D6),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_D5),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_D4),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_D3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_D2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_D1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_NANDF_D0),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI1_D8),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI1_D9),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI1_D10),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI1_D11),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI1_D12),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI1_D13),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI1_D14),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI1_D15),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI1_D16),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI1_D17),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI1_D18),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI1_D19),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI1_VSYNC),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI1_HSYNC),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI2_D12),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI2_D13),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI2_D14),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI2_D15),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI2_D16),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI2_D17),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI2_D18),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI2_D19),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI2_VSYNC),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI2_HSYNC),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI2_PIXCLK),
|
|
IMX_PINCTRL_PIN(MX51_PAD_I2C1_CLK),
|
|
IMX_PINCTRL_PIN(MX51_PAD_I2C1_DAT),
|
|
IMX_PINCTRL_PIN(MX51_PAD_AUD3_BB_TXD),
|
|
IMX_PINCTRL_PIN(MX51_PAD_AUD3_BB_RXD),
|
|
IMX_PINCTRL_PIN(MX51_PAD_AUD3_BB_CK),
|
|
IMX_PINCTRL_PIN(MX51_PAD_AUD3_BB_FS),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSPI1_MOSI),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSPI1_MISO),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSPI1_SS0),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSPI1_SS1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSPI1_RDY),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSPI1_SCLK),
|
|
IMX_PINCTRL_PIN(MX51_PAD_UART1_RXD),
|
|
IMX_PINCTRL_PIN(MX51_PAD_UART1_TXD),
|
|
IMX_PINCTRL_PIN(MX51_PAD_UART1_RTS),
|
|
IMX_PINCTRL_PIN(MX51_PAD_UART1_CTS),
|
|
IMX_PINCTRL_PIN(MX51_PAD_UART2_RXD),
|
|
IMX_PINCTRL_PIN(MX51_PAD_UART2_TXD),
|
|
IMX_PINCTRL_PIN(MX51_PAD_UART3_RXD),
|
|
IMX_PINCTRL_PIN(MX51_PAD_UART3_TXD),
|
|
IMX_PINCTRL_PIN(MX51_PAD_OWIRE_LINE),
|
|
IMX_PINCTRL_PIN(MX51_PAD_KEY_ROW0),
|
|
IMX_PINCTRL_PIN(MX51_PAD_KEY_ROW1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_KEY_ROW2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_KEY_ROW3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_KEY_COL0),
|
|
IMX_PINCTRL_PIN(MX51_PAD_KEY_COL1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_KEY_COL2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_KEY_COL3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_KEY_COL4),
|
|
IMX_PINCTRL_PIN(MX51_PAD_KEY_COL5),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE7),
|
|
IMX_PINCTRL_PIN(MX51_PAD_USBH1_CLK),
|
|
IMX_PINCTRL_PIN(MX51_PAD_USBH1_DIR),
|
|
IMX_PINCTRL_PIN(MX51_PAD_USBH1_STP),
|
|
IMX_PINCTRL_PIN(MX51_PAD_USBH1_NXT),
|
|
IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA0),
|
|
IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA4),
|
|
IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA5),
|
|
IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA6),
|
|
IMX_PINCTRL_PIN(MX51_PAD_USBH1_DATA7),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DI1_PIN11),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DI1_PIN12),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DI1_PIN13),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DI1_D0_CS),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DI1_D1_CS),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISPB2_SER_DIN),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISPB2_SER_DIO),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISPB2_SER_CLK),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISPB2_SER_RS),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT0),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT4),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT5),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT6),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT7),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT8),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT9),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT10),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT11),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT12),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT13),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT14),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT15),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT16),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT17),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT18),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT19),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT20),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT21),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT22),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP1_DAT23),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DI1_PIN3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DI1_PIN2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE8),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DI_GP2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DI_GP3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DI2_PIN4),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DI2_PIN2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DI2_PIN3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DI2_DISP_CLK),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DI_GP4),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT0),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT4),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT5),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT6),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT7),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT8),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT9),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT10),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT11),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT12),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT13),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT14),
|
|
IMX_PINCTRL_PIN(MX51_PAD_DISP2_DAT15),
|
|
IMX_PINCTRL_PIN(MX51_PAD_SD1_CMD),
|
|
IMX_PINCTRL_PIN(MX51_PAD_SD1_CLK),
|
|
IMX_PINCTRL_PIN(MX51_PAD_SD1_DATA0),
|
|
IMX_PINCTRL_PIN(MX51_PAD_SD1_DATA1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_SD1_DATA2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_SD1_DATA3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_GPIO1_0),
|
|
IMX_PINCTRL_PIN(MX51_PAD_GPIO1_1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_SD2_CMD),
|
|
IMX_PINCTRL_PIN(MX51_PAD_SD2_CLK),
|
|
IMX_PINCTRL_PIN(MX51_PAD_SD2_DATA0),
|
|
IMX_PINCTRL_PIN(MX51_PAD_SD2_DATA1),
|
|
IMX_PINCTRL_PIN(MX51_PAD_SD2_DATA2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_SD2_DATA3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_GPIO1_2),
|
|
IMX_PINCTRL_PIN(MX51_PAD_GPIO1_3),
|
|
IMX_PINCTRL_PIN(MX51_PAD_PMIC_INT_REQ),
|
|
IMX_PINCTRL_PIN(MX51_PAD_GPIO1_4),
|
|
IMX_PINCTRL_PIN(MX51_PAD_GPIO1_5),
|
|
IMX_PINCTRL_PIN(MX51_PAD_GPIO1_6),
|
|
IMX_PINCTRL_PIN(MX51_PAD_GPIO1_7),
|
|
IMX_PINCTRL_PIN(MX51_PAD_GPIO1_8),
|
|
IMX_PINCTRL_PIN(MX51_PAD_GPIO1_9),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE9),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE10),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE11),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE12),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE13),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE14),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE15),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE16),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE17),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE18),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE19),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE20),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE21),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE22),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE23),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE24),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE25),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE26),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE27),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE28),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE29),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE30),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE31),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE32),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE33),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE34),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE35),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE36),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE37),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE38),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE39),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE40),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE41),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE42),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE43),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE44),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE45),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE46),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE47),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE48),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE49),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE50),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE51),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE52),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE53),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE54),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE55),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE56),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE57),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE58),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE59),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE60),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE61),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE62),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE63),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE64),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE65),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE66),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE67),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE68),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE69),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE70),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE71),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE72),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE73),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE74),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE75),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE76),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE77),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE78),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE79),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE80),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE81),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE82),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE83),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE84),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE85),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE86),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE87),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE88),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE89),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE90),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE91),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE92),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE93),
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|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE94),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE95),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE96),
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IMX_PINCTRL_PIN(MX51_PAD_RESERVE97),
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|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE98),
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|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE99),
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|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE100),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE101),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE102),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE103),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE104),
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|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE105),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE106),
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|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE107),
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|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE108),
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|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE109),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE110),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE111),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE112),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE113),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE114),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE115),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE116),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE117),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE118),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE119),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE120),
|
|
IMX_PINCTRL_PIN(MX51_PAD_RESERVE121),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI1_PIXCLK),
|
|
IMX_PINCTRL_PIN(MX51_PAD_CSI1_MCLK),
|
|
};
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|
|
|
static struct imx_pinctrl_soc_info imx51_pinctrl_info = {
|
|
.pins = imx51_pinctrl_pads,
|
|
.npins = ARRAY_SIZE(imx51_pinctrl_pads),
|
|
};
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|
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|
static const struct of_device_id imx51_pinctrl_of_match[] = {
|
|
{ .compatible = "fsl,imx51-iomuxc", },
|
|
{ /* sentinel */ }
|
|
};
|
|
|
|
static int imx51_pinctrl_probe(struct platform_device *pdev)
|
|
{
|
|
return imx_pinctrl_probe(pdev, &imx51_pinctrl_info);
|
|
}
|
|
|
|
static struct platform_driver imx51_pinctrl_driver = {
|
|
.driver = {
|
|
.name = "imx51-pinctrl",
|
|
.of_match_table = imx51_pinctrl_of_match,
|
|
},
|
|
.probe = imx51_pinctrl_probe,
|
|
};
|
|
|
|
static int __init imx51_pinctrl_init(void)
|
|
{
|
|
return platform_driver_register(&imx51_pinctrl_driver);
|
|
}
|
|
arch_initcall(imx51_pinctrl_init);
|