451 lines
14 KiB
C
451 lines
14 KiB
C
/*
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* Marvell Armada 375 pinctrl driver based on mvebu pinctrl core
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*
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* Copyright (C) 2012 Marvell
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*
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* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*/
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/module.h>
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#include <linux/platform_device.h>
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#include <linux/clk.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/pinctrl/pinctrl.h>
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#include "pinctrl-mvebu.h"
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static void __iomem *mpp_base;
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static int armada_375_mpp_ctrl_get(unsigned pid, unsigned long *config)
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{
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return default_mpp_ctrl_get(mpp_base, pid, config);
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}
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static int armada_375_mpp_ctrl_set(unsigned pid, unsigned long config)
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{
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return default_mpp_ctrl_set(mpp_base, pid, config);
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}
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static struct mvebu_mpp_mode mv88f6720_mpp_modes[] = {
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MPP_MODE(0,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad2"),
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MPP_FUNCTION(0x2, "spi0", "cs1"),
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MPP_FUNCTION(0x3, "spi1", "cs1"),
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MPP_FUNCTION(0x5, "nand", "io2")),
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MPP_MODE(1,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad3"),
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MPP_FUNCTION(0x2, "spi0", "mosi"),
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MPP_FUNCTION(0x3, "spi1", "mosi"),
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MPP_FUNCTION(0x5, "nand", "io3")),
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MPP_MODE(2,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad4"),
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MPP_FUNCTION(0x2, "ptp", "evreq"),
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MPP_FUNCTION(0x3, "led", "c0"),
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MPP_FUNCTION(0x4, "audio", "sdi"),
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MPP_FUNCTION(0x5, "nand", "io4"),
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MPP_FUNCTION(0x6, "spi1", "mosi")),
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MPP_MODE(3,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad5"),
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MPP_FUNCTION(0x2, "ptp", "trig"),
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MPP_FUNCTION(0x3, "led", "p3"),
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MPP_FUNCTION(0x4, "audio", "mclk"),
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MPP_FUNCTION(0x5, "nand", "io5"),
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MPP_FUNCTION(0x6, "spi1", "miso")),
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MPP_MODE(4,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad6"),
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MPP_FUNCTION(0x2, "spi0", "miso"),
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MPP_FUNCTION(0x3, "spi1", "miso"),
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MPP_FUNCTION(0x5, "nand", "io6")),
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MPP_MODE(5,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad7"),
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MPP_FUNCTION(0x2, "spi0", "cs2"),
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MPP_FUNCTION(0x3, "spi1", "cs2"),
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MPP_FUNCTION(0x5, "nand", "io7"),
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MPP_FUNCTION(0x6, "spi1", "miso")),
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MPP_MODE(6,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad0"),
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MPP_FUNCTION(0x3, "led", "p1"),
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MPP_FUNCTION(0x4, "audio", "lrclk"),
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MPP_FUNCTION(0x5, "nand", "io0")),
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MPP_MODE(7,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ad1"),
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MPP_FUNCTION(0x2, "ptp", "clk"),
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MPP_FUNCTION(0x3, "led", "p2"),
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MPP_FUNCTION(0x4, "audio", "extclk"),
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MPP_FUNCTION(0x5, "nand", "io1")),
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MPP_MODE(8,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "bootcs"),
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MPP_FUNCTION(0x2, "spi0", "cs0"),
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MPP_FUNCTION(0x3, "spi1", "cs0"),
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MPP_FUNCTION(0x5, "nand", "ce")),
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MPP_MODE(9,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "spi0", "sck"),
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MPP_FUNCTION(0x3, "spi1", "sck"),
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MPP_FUNCTION(0x5, "nand", "we")),
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MPP_MODE(10,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "dram", "vttctrl"),
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MPP_FUNCTION(0x3, "led", "c1"),
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MPP_FUNCTION(0x5, "nand", "re"),
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MPP_FUNCTION(0x6, "spi1", "sck")),
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MPP_MODE(11,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "a0"),
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MPP_FUNCTION(0x3, "led", "c2"),
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MPP_FUNCTION(0x4, "audio", "sdo"),
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MPP_FUNCTION(0x5, "nand", "cle")),
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MPP_MODE(12,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "a1"),
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MPP_FUNCTION(0x4, "audio", "bclk"),
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MPP_FUNCTION(0x5, "nand", "ale")),
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MPP_MODE(13,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "dev", "ready"),
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MPP_FUNCTION(0x2, "pcie0", "rstout"),
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MPP_FUNCTION(0x3, "pcie1", "rstout"),
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MPP_FUNCTION(0x5, "nand", "rb"),
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MPP_FUNCTION(0x6, "spi1", "mosi")),
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MPP_MODE(14,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "i2c0", "sda"),
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MPP_FUNCTION(0x3, "uart1", "txd")),
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MPP_MODE(15,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "i2c0", "sck"),
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MPP_FUNCTION(0x3, "uart1", "rxd")),
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MPP_MODE(16,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "uart0", "txd")),
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MPP_MODE(17,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "uart0", "rxd")),
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MPP_MODE(18,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "tdm", "int")),
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MPP_MODE(19,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "tdm", "rst")),
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MPP_MODE(20,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "tdm", "pclk")),
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MPP_MODE(21,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "tdm", "fsync")),
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MPP_MODE(22,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "tdm", "drx")),
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MPP_MODE(23,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "tdm", "dtx")),
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MPP_MODE(24,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "led", "p0"),
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MPP_FUNCTION(0x2, "ge1", "rxd0"),
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MPP_FUNCTION(0x3, "sd", "cmd"),
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MPP_FUNCTION(0x4, "uart0", "rts"),
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MPP_FUNCTION(0x5, "spi0", "cs0"),
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MPP_FUNCTION(0x6, "dev", "cs1")),
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MPP_MODE(25,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "led", "p2"),
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MPP_FUNCTION(0x2, "ge1", "rxd1"),
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MPP_FUNCTION(0x3, "sd", "d0"),
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MPP_FUNCTION(0x4, "uart0", "cts"),
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MPP_FUNCTION(0x5, "spi0", "mosi"),
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MPP_FUNCTION(0x6, "dev", "cs2")),
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MPP_MODE(26,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "pcie0", "clkreq"),
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MPP_FUNCTION(0x2, "ge1", "rxd2"),
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MPP_FUNCTION(0x3, "sd", "d2"),
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MPP_FUNCTION(0x4, "uart1", "rts"),
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MPP_FUNCTION(0x5, "spi0", "cs1"),
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MPP_FUNCTION(0x6, "led", "c1")),
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MPP_MODE(27,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "pcie1", "clkreq"),
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MPP_FUNCTION(0x2, "ge1", "rxd3"),
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MPP_FUNCTION(0x3, "sd", "d1"),
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MPP_FUNCTION(0x4, "uart1", "cts"),
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MPP_FUNCTION(0x5, "spi0", "miso"),
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MPP_FUNCTION(0x6, "led", "c2")),
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MPP_MODE(28,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "led", "p3"),
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MPP_FUNCTION(0x2, "ge1", "txctl"),
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MPP_FUNCTION(0x3, "sd", "clk"),
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MPP_FUNCTION(0x5, "dram", "vttctrl")),
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MPP_MODE(29,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "pcie1", "clkreq"),
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MPP_FUNCTION(0x2, "ge1", "rxclk"),
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MPP_FUNCTION(0x3, "sd", "d3"),
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MPP_FUNCTION(0x5, "spi0", "sck"),
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MPP_FUNCTION(0x6, "pcie0", "rstout")),
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MPP_MODE(30,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "ge1", "txd0"),
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MPP_FUNCTION(0x3, "spi1", "cs0"),
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MPP_FUNCTION(0x5, "led", "p3"),
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MPP_FUNCTION(0x6, "ptp", "evreq")),
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MPP_MODE(31,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "ge1", "txd1"),
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MPP_FUNCTION(0x3, "spi1", "mosi"),
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MPP_FUNCTION(0x5, "led", "p0")),
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MPP_MODE(32,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "ge1", "txd2"),
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MPP_FUNCTION(0x3, "spi1", "sck"),
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MPP_FUNCTION(0x4, "ptp", "trig"),
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MPP_FUNCTION(0x5, "led", "c0")),
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MPP_MODE(33,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "ge1", "txd3"),
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MPP_FUNCTION(0x3, "spi1", "miso"),
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MPP_FUNCTION(0x5, "led", "p2")),
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MPP_MODE(34,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "ge1", "txclkout"),
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MPP_FUNCTION(0x3, "spi1", "sck"),
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MPP_FUNCTION(0x5, "led", "c1")),
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MPP_MODE(35,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "ge1", "rxctl"),
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MPP_FUNCTION(0x3, "spi1", "cs1"),
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MPP_FUNCTION(0x4, "spi0", "cs2"),
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MPP_FUNCTION(0x5, "led", "p1")),
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MPP_MODE(36,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "pcie0", "clkreq"),
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MPP_FUNCTION(0x5, "led", "c2")),
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MPP_MODE(37,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "pcie0", "clkreq"),
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MPP_FUNCTION(0x2, "tdm", "int"),
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MPP_FUNCTION(0x4, "ge", "mdc")),
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MPP_MODE(38,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "pcie1", "clkreq"),
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MPP_FUNCTION(0x4, "ge", "mdio")),
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MPP_MODE(39,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x4, "ref", "clkout"),
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MPP_FUNCTION(0x5, "led", "p3")),
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MPP_MODE(40,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x4, "uart1", "txd"),
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MPP_FUNCTION(0x5, "led", "p0")),
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MPP_MODE(41,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x4, "uart1", "rxd"),
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MPP_FUNCTION(0x5, "led", "p1")),
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MPP_MODE(42,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x3, "spi1", "cs2"),
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MPP_FUNCTION(0x4, "led", "c0"),
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MPP_FUNCTION(0x6, "ptp", "clk")),
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MPP_MODE(43,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "sata0", "prsnt"),
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MPP_FUNCTION(0x4, "dram", "vttctrl"),
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MPP_FUNCTION(0x5, "led", "c1")),
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MPP_MODE(44,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x4, "sata0", "prsnt")),
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MPP_MODE(45,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "spi0", "cs2"),
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MPP_FUNCTION(0x4, "pcie0", "rstout"),
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MPP_FUNCTION(0x5, "led", "c2"),
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MPP_FUNCTION(0x6, "spi1", "cs2")),
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MPP_MODE(46,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "led", "p0"),
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MPP_FUNCTION(0x2, "ge0", "txd0"),
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MPP_FUNCTION(0x3, "ge1", "txd0"),
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MPP_FUNCTION(0x6, "dev", "we1")),
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MPP_MODE(47,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "led", "p1"),
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MPP_FUNCTION(0x2, "ge0", "txd1"),
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MPP_FUNCTION(0x3, "ge1", "txd1"),
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MPP_FUNCTION(0x5, "ptp", "trig"),
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MPP_FUNCTION(0x6, "dev", "ale0")),
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MPP_MODE(48,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "led", "p2"),
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MPP_FUNCTION(0x2, "ge0", "txd2"),
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MPP_FUNCTION(0x3, "ge1", "txd2"),
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MPP_FUNCTION(0x6, "dev", "ale1")),
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MPP_MODE(49,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "led", "p3"),
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MPP_FUNCTION(0x2, "ge0", "txd3"),
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MPP_FUNCTION(0x3, "ge1", "txd3"),
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MPP_FUNCTION(0x6, "dev", "a2")),
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MPP_MODE(50,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "led", "c0"),
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MPP_FUNCTION(0x2, "ge0", "rxd0"),
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MPP_FUNCTION(0x3, "ge1", "rxd0"),
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MPP_FUNCTION(0x5, "ptp", "evreq"),
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MPP_FUNCTION(0x6, "dev", "ad12")),
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MPP_MODE(51,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "led", "c1"),
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MPP_FUNCTION(0x2, "ge0", "rxd1"),
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MPP_FUNCTION(0x3, "ge1", "rxd1"),
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MPP_FUNCTION(0x6, "dev", "ad8")),
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MPP_MODE(52,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "led", "c2"),
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MPP_FUNCTION(0x2, "ge0", "rxd2"),
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MPP_FUNCTION(0x3, "ge1", "rxd2"),
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MPP_FUNCTION(0x5, "i2c0", "sda"),
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MPP_FUNCTION(0x6, "dev", "ad9")),
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MPP_MODE(53,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "pcie1", "rstout"),
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MPP_FUNCTION(0x2, "ge0", "rxd3"),
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MPP_FUNCTION(0x3, "ge1", "rxd3"),
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MPP_FUNCTION(0x5, "i2c0", "sck"),
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MPP_FUNCTION(0x6, "dev", "ad10")),
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MPP_MODE(54,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "pcie0", "rstout"),
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MPP_FUNCTION(0x2, "ge0", "rxctl"),
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MPP_FUNCTION(0x3, "ge1", "rxctl"),
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MPP_FUNCTION(0x6, "dev", "ad11")),
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MPP_MODE(55,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "ge0", "rxclk"),
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MPP_FUNCTION(0x3, "ge1", "rxclk"),
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MPP_FUNCTION(0x6, "dev", "cs0")),
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MPP_MODE(56,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "ge0", "txclkout"),
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MPP_FUNCTION(0x3, "ge1", "txclkout"),
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MPP_FUNCTION(0x6, "dev", "oe")),
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MPP_MODE(57,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "ge0", "txctl"),
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MPP_FUNCTION(0x3, "ge1", "txctl"),
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MPP_FUNCTION(0x6, "dev", "we0")),
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MPP_MODE(58,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x4, "led", "c0")),
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MPP_MODE(59,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x4, "led", "c1")),
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MPP_MODE(60,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x2, "uart1", "txd"),
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MPP_FUNCTION(0x4, "led", "c2"),
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MPP_FUNCTION(0x6, "dev", "ad13")),
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MPP_MODE(61,
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MPP_FUNCTION(0x0, "gpio", NULL),
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MPP_FUNCTION(0x1, "i2c1", "sda"),
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MPP_FUNCTION(0x2, "uart1", "rxd"),
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MPP_FUNCTION(0x3, "spi1", "cs2"),
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MPP_FUNCTION(0x4, "led", "p0"),
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MPP_FUNCTION(0x6, "dev", "ad14")),
|
|
MPP_MODE(62,
|
|
MPP_FUNCTION(0x0, "gpio", NULL),
|
|
MPP_FUNCTION(0x1, "i2c1", "sck"),
|
|
MPP_FUNCTION(0x4, "led", "p1"),
|
|
MPP_FUNCTION(0x6, "dev", "ad15")),
|
|
MPP_MODE(63,
|
|
MPP_FUNCTION(0x0, "gpio", NULL),
|
|
MPP_FUNCTION(0x2, "ptp", "trig"),
|
|
MPP_FUNCTION(0x4, "led", "p2"),
|
|
MPP_FUNCTION(0x6, "dev", "burst/last")),
|
|
MPP_MODE(64,
|
|
MPP_FUNCTION(0x0, "gpio", NULL),
|
|
MPP_FUNCTION(0x2, "dram", "vttctrl"),
|
|
MPP_FUNCTION(0x4, "led", "p3")),
|
|
MPP_MODE(65,
|
|
MPP_FUNCTION(0x0, "gpio", NULL),
|
|
MPP_FUNCTION(0x1, "sata1", "prsnt")),
|
|
MPP_MODE(66,
|
|
MPP_FUNCTION(0x0, "gpio", NULL),
|
|
MPP_FUNCTION(0x2, "ptp", "evreq"),
|
|
MPP_FUNCTION(0x4, "spi1", "cs3"),
|
|
MPP_FUNCTION(0x5, "pcie0", "rstout"),
|
|
MPP_FUNCTION(0x6, "dev", "cs3")),
|
|
};
|
|
|
|
static struct mvebu_pinctrl_soc_info armada_375_pinctrl_info;
|
|
|
|
static const struct of_device_id armada_375_pinctrl_of_match[] = {
|
|
{ .compatible = "marvell,mv88f6720-pinctrl" },
|
|
{ },
|
|
};
|
|
|
|
static struct mvebu_mpp_ctrl mv88f6720_mpp_controls[] = {
|
|
MPP_FUNC_CTRL(0, 69, NULL, armada_375_mpp_ctrl),
|
|
};
|
|
|
|
static struct pinctrl_gpio_range mv88f6720_mpp_gpio_ranges[] = {
|
|
MPP_GPIO_RANGE(0, 0, 0, 32),
|
|
MPP_GPIO_RANGE(1, 32, 32, 32),
|
|
MPP_GPIO_RANGE(2, 64, 64, 3),
|
|
};
|
|
|
|
static int armada_375_pinctrl_probe(struct platform_device *pdev)
|
|
{
|
|
struct mvebu_pinctrl_soc_info *soc = &armada_375_pinctrl_info;
|
|
struct resource *res;
|
|
|
|
res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
|
|
mpp_base = devm_ioremap_resource(&pdev->dev, res);
|
|
if (IS_ERR(mpp_base))
|
|
return PTR_ERR(mpp_base);
|
|
|
|
soc->variant = 0; /* no variants for Armada 375 */
|
|
soc->controls = mv88f6720_mpp_controls;
|
|
soc->ncontrols = ARRAY_SIZE(mv88f6720_mpp_controls);
|
|
soc->modes = mv88f6720_mpp_modes;
|
|
soc->nmodes = ARRAY_SIZE(mv88f6720_mpp_modes);
|
|
soc->gpioranges = mv88f6720_mpp_gpio_ranges;
|
|
soc->ngpioranges = ARRAY_SIZE(mv88f6720_mpp_gpio_ranges);
|
|
|
|
pdev->dev.platform_data = soc;
|
|
|
|
return mvebu_pinctrl_probe(pdev);
|
|
}
|
|
|
|
static struct platform_driver armada_375_pinctrl_driver = {
|
|
.driver = {
|
|
.name = "armada-375-pinctrl",
|
|
.of_match_table = of_match_ptr(armada_375_pinctrl_of_match),
|
|
},
|
|
.probe = armada_375_pinctrl_probe,
|
|
};
|
|
|
|
module_platform_driver(armada_375_pinctrl_driver);
|
|
|
|
MODULE_AUTHOR("Thomas Petazzoni <thomas.petazzoni@free-electrons.com>");
|
|
MODULE_DESCRIPTION("Marvell Armada 375 pinctrl driver");
|
|
MODULE_LICENSE("GPL v2");
|