162 lines
4.3 KiB
C
162 lines
4.3 KiB
C
/*
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* Core driver interface for TI TPS65090 PMIC family
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*
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* Copyright (C) 2012 NVIDIA Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA.
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*
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*/
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#ifndef __LINUX_MFD_TPS65090_H
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#define __LINUX_MFD_TPS65090_H
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#include <linux/irq.h>
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#include <linux/regmap.h>
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/* TPS65090 IRQs */
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enum {
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TPS65090_IRQ_INTERRUPT,
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TPS65090_IRQ_VAC_STATUS_CHANGE,
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TPS65090_IRQ_VSYS_STATUS_CHANGE,
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TPS65090_IRQ_BAT_STATUS_CHANGE,
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TPS65090_IRQ_CHARGING_STATUS_CHANGE,
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TPS65090_IRQ_CHARGING_COMPLETE,
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TPS65090_IRQ_OVERLOAD_DCDC1,
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TPS65090_IRQ_OVERLOAD_DCDC2,
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TPS65090_IRQ_OVERLOAD_DCDC3,
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TPS65090_IRQ_OVERLOAD_FET1,
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TPS65090_IRQ_OVERLOAD_FET2,
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TPS65090_IRQ_OVERLOAD_FET3,
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TPS65090_IRQ_OVERLOAD_FET4,
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TPS65090_IRQ_OVERLOAD_FET5,
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TPS65090_IRQ_OVERLOAD_FET6,
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TPS65090_IRQ_OVERLOAD_FET7,
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};
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/* TPS65090 Regulator ID */
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enum {
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TPS65090_REGULATOR_DCDC1,
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TPS65090_REGULATOR_DCDC2,
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TPS65090_REGULATOR_DCDC3,
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TPS65090_REGULATOR_FET1,
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TPS65090_REGULATOR_FET2,
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TPS65090_REGULATOR_FET3,
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TPS65090_REGULATOR_FET4,
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TPS65090_REGULATOR_FET5,
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TPS65090_REGULATOR_FET6,
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TPS65090_REGULATOR_FET7,
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TPS65090_REGULATOR_LDO1,
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TPS65090_REGULATOR_LDO2,
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/* Last entry for maximum ID */
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TPS65090_REGULATOR_MAX,
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};
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/* Register addresses */
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#define TPS65090_REG_INTR_STS 0x00
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#define TPS65090_REG_INTR_STS2 0x01
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#define TPS65090_REG_INTR_MASK 0x02
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#define TPS65090_REG_INTR_MASK2 0x03
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#define TPS65090_REG_CG_CTRL0 0x04
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#define TPS65090_REG_CG_CTRL1 0x05
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#define TPS65090_REG_CG_CTRL2 0x06
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#define TPS65090_REG_CG_CTRL3 0x07
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#define TPS65090_REG_CG_CTRL4 0x08
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#define TPS65090_REG_CG_CTRL5 0x09
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#define TPS65090_REG_CG_STATUS1 0x0a
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#define TPS65090_REG_CG_STATUS2 0x0b
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#define TPS65090_REG_AD_OUT1 0x17
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#define TPS65090_REG_AD_OUT2 0x18
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#define TPS65090_MAX_REG TPS65090_REG_AD_OUT2
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#define TPS65090_NUM_REGS (TPS65090_MAX_REG + 1)
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struct tps65090 {
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struct device *dev;
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struct regmap *rmap;
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struct regmap_irq_chip_data *irq_data;
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};
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/*
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* struct tps65090_regulator_plat_data
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*
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* @reg_init_data: The regulator init data.
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* @enable_ext_control: Enable extrenal control or not. Only available for
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* DCDC1, DCDC2 and DCDC3.
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* @gpio: Gpio number if external control is enabled and controlled through
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* gpio.
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* @overcurrent_wait_valid: True if the overcurrent_wait should be applied.
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* @overcurrent_wait: Value to set as the overcurrent wait time. This is the
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* actual bitfield value, not a time in ms (valid value are 0 - 3).
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*/
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struct tps65090_regulator_plat_data {
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struct regulator_init_data *reg_init_data;
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bool enable_ext_control;
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int gpio;
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bool overcurrent_wait_valid;
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int overcurrent_wait;
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};
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struct tps65090_platform_data {
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int irq_base;
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char **supplied_to;
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size_t num_supplicants;
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int enable_low_current_chrg;
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struct tps65090_regulator_plat_data *reg_pdata[TPS65090_REGULATOR_MAX];
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};
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/*
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* NOTE: the functions below are not intended for use outside
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* of the TPS65090 sub-device drivers
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*/
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static inline int tps65090_write(struct device *dev, int reg, uint8_t val)
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{
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struct tps65090 *tps = dev_get_drvdata(dev);
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return regmap_write(tps->rmap, reg, val);
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}
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static inline int tps65090_read(struct device *dev, int reg, uint8_t *val)
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{
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struct tps65090 *tps = dev_get_drvdata(dev);
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unsigned int temp_val;
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int ret;
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ret = regmap_read(tps->rmap, reg, &temp_val);
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if (!ret)
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*val = temp_val;
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return ret;
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}
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static inline int tps65090_set_bits(struct device *dev, int reg,
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uint8_t bit_num)
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{
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struct tps65090 *tps = dev_get_drvdata(dev);
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return regmap_update_bits(tps->rmap, reg, BIT(bit_num), ~0u);
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}
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static inline int tps65090_clr_bits(struct device *dev, int reg,
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uint8_t bit_num)
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{
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struct tps65090 *tps = dev_get_drvdata(dev);
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return regmap_update_bits(tps->rmap, reg, BIT(bit_num), 0u);
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}
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#endif /*__LINUX_MFD_TPS65090_H */
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