111 lines
3.1 KiB
C
111 lines
3.1 KiB
C
/*
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* Copyright (C) 2011 Google, Inc.
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* Copyright (C) 2016-2018, NVIDIA Corporation. All rights reserved.
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*
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* Author:
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* Colin Cross <ccross@android.com>
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* Olof Johansson <olof@lixom.net>
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*
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* This software is licensed under the terms of the GNU General Public
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* License version 2, as published by the Free Software Foundation, and
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* may be copied, distributed, and modified under those terms.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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*/
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#ifndef __TEGRA_EMC_H_
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#define __TEGRA_EMC_H_
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#define TEGRA_EMC_NUM_REGS 46
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enum {
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TEGRA_DRAM_OVER_TEMP_NONE = 0,
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TEGRA_DRAM_OVER_TEMP_REFRESH_X2,
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TEGRA_DRAM_OVER_TEMP_REFRESH_X4,
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TEGRA_DRAM_OVER_TEMP_THROTTLE, /* 4x Refresh + derating. */
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TEGRA_DRAM_OVER_TEMP_MAX,
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};
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enum emc_user_id {
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EMC_USER_DC1 = 0,
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EMC_USER_DC2,
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EMC_USER_VI,
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EMC_USER_MSENC,
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EMC_USER_2D,
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EMC_USER_3D,
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EMC_USER_BB,
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EMC_USER_VDE,
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EMC_USER_VI2,
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EMC_USER_ISPA,
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EMC_USER_ISPB,
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EMC_USER_NVDEC,
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EMC_USER_NVJPG,
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EMC_USER_NUM,
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};
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struct tegra_emc_table {
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unsigned long rate;
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u32 regs[TEGRA_EMC_NUM_REGS];
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};
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struct tegra_emc_pdata {
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int num_tables;
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struct tegra_emc_table *tables;
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};
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struct emc_clk_ops {
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long (*emc_round_rate)(unsigned long);
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int (*emc_set_rate)(unsigned long);
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unsigned long (*emc_get_rate)(void);
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struct clk * (*emc_predict_parent)(unsigned long, unsigned long *);
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void (*emc_get_backup_parent)(struct clk **,
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unsigned long *);
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};
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struct emc_iso_usage {
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u32 emc_usage_flags;
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u8 iso_usage_share;
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u8 (*iso_share_calculator)(unsigned long iso_bw);
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};
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#ifdef CONFIG_TEGRA124_EMC
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void tegra124_emc_timing_invalidate(void);
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bool tegra124_emc_is_ready(void);
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unsigned long tegra124_predict_emc_rate(int millivolts);
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const struct emc_clk_ops *tegra124_emc_get_ops(void);
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#else
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static inline void tegra124_emc_timing_invalidate(void) { return; };
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static inline bool tegra124_emc_is_ready(void) { return true; };
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static inline unsigned long tegra124_predict_emc_rate(int millivolts)
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{ return -ENODEV; }
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static inline const struct emc_clk_ops *tegra124_emc_get_ops(void)
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{ return NULL; }
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#endif
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#ifdef CONFIG_TEGRA210_EMC
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void tegra210_emc_timing_invalidate(void);
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bool tegra210_emc_is_ready(void);
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unsigned long tegra210_predict_emc_rate(int millivolts);
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const struct emc_clk_ops *tegra210_emc_get_ops(void);
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int tegra210_emc_get_dram_temp(void);
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int tegra210_emc_set_over_temp_state(unsigned long state);
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void tegra210_emc_mr4_set_freq_thresh(unsigned long thresh);
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#else
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static inline void tegra210_emc_timing_invalidate(void) { return; }
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static inline bool tegra210_emc_is_ready(void) { return true; }
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static inline unsigned long tegra210_predict_emc_rate(int millivolts)
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{ return -ENODEV; }
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static inline const struct emc_clk_ops *tegra210_emc_get_ops(void)
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{ return NULL; }
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static inline int tegra210_emc_get_dram_temp(void) {return -ENODEV; }
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static inline int tegra210_emc_set_over_temp_state(unsigned long state)
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{ return -ENODEV; }
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static inline void tegra210_emc_mr4_set_freq_thresh(unsigned long thresh) { }
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#endif
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#endif
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