843 lines
23 KiB
C
843 lines
23 KiB
C
/*
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* uda1380.c - Philips UDA1380 ALSA SoC audio driver
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Copyright (c) 2007-2009 Philipp Zabel <philipp.zabel@gmail.com>
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*
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* Modified by Richard Purdie <richard@openedhand.com> to fit into SoC
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* codec model.
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*
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* Copyright (c) 2005 Giorgio Padrin <giorgio@mandarinlogiq.org>
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* Copyright 2005 Openedhand Ltd.
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*/
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#include <linux/module.h>
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#include <linux/init.h>
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#include <linux/types.h>
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#include <linux/slab.h>
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#include <linux/errno.h>
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#include <linux/gpio.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/workqueue.h>
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#include <sound/core.h>
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#include <sound/control.h>
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#include <sound/initval.h>
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#include <sound/soc.h>
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#include <sound/tlv.h>
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#include <sound/uda1380.h>
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#include "uda1380.h"
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/* codec private data */
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struct uda1380_priv {
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struct snd_soc_codec *codec;
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unsigned int dac_clk;
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struct work_struct work;
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void *control_data;
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};
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/*
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* uda1380 register cache
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*/
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static const u16 uda1380_reg[UDA1380_CACHEREGNUM] = {
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0x0502, 0x0000, 0x0000, 0x3f3f,
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0x0202, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0xff00, 0x0000, 0x4800,
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0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x0000, 0x0000, 0x0000,
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0x0000, 0x8000, 0x0002, 0x0000,
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};
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static unsigned long uda1380_cache_dirty;
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/*
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* read uda1380 register cache
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*/
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static inline unsigned int uda1380_read_reg_cache(struct snd_soc_codec *codec,
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unsigned int reg)
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{
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u16 *cache = codec->reg_cache;
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if (reg == UDA1380_RESET)
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return 0;
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if (reg >= UDA1380_CACHEREGNUM)
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return -1;
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return cache[reg];
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}
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/*
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* write uda1380 register cache
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*/
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static inline void uda1380_write_reg_cache(struct snd_soc_codec *codec,
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u16 reg, unsigned int value)
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{
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u16 *cache = codec->reg_cache;
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if (reg >= UDA1380_CACHEREGNUM)
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return;
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if ((reg >= 0x10) && (cache[reg] != value))
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set_bit(reg - 0x10, &uda1380_cache_dirty);
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cache[reg] = value;
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}
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/*
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* write to the UDA1380 register space
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*/
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static int uda1380_write(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value)
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{
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u8 data[3];
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/* data is
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* data[0] is register offset
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* data[1] is MS byte
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* data[2] is LS byte
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*/
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data[0] = reg;
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data[1] = (value & 0xff00) >> 8;
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data[2] = value & 0x00ff;
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uda1380_write_reg_cache(codec, reg, value);
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/* the interpolator & decimator regs must only be written when the
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* codec DAI is active.
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*/
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if (!snd_soc_codec_is_active(codec) && (reg >= UDA1380_MVOL))
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return 0;
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pr_debug("uda1380: hw write %x val %x\n", reg, value);
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if (codec->hw_write(codec->control_data, data, 3) == 3) {
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unsigned int val;
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i2c_master_send(codec->control_data, data, 1);
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i2c_master_recv(codec->control_data, data, 2);
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val = (data[0]<<8) | data[1];
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if (val != value) {
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pr_debug("uda1380: READ BACK VAL %x\n",
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(data[0]<<8) | data[1]);
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return -EIO;
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}
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if (reg >= 0x10)
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clear_bit(reg - 0x10, &uda1380_cache_dirty);
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return 0;
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} else
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return -EIO;
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}
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static void uda1380_sync_cache(struct snd_soc_codec *codec)
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{
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int reg;
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u8 data[3];
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u16 *cache = codec->reg_cache;
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/* Sync reg_cache with the hardware */
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for (reg = 0; reg < UDA1380_MVOL; reg++) {
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data[0] = reg;
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data[1] = (cache[reg] & 0xff00) >> 8;
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data[2] = cache[reg] & 0x00ff;
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if (codec->hw_write(codec->control_data, data, 3) != 3)
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dev_err(codec->dev, "%s: write to reg 0x%x failed\n",
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__func__, reg);
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}
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}
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static int uda1380_reset(struct snd_soc_codec *codec)
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{
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struct uda1380_platform_data *pdata = codec->dev->platform_data;
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if (gpio_is_valid(pdata->gpio_reset)) {
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gpio_set_value(pdata->gpio_reset, 1);
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mdelay(1);
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gpio_set_value(pdata->gpio_reset, 0);
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} else {
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u8 data[3];
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data[0] = UDA1380_RESET;
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data[1] = 0;
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data[2] = 0;
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if (codec->hw_write(codec->control_data, data, 3) != 3) {
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dev_err(codec->dev, "%s: failed\n", __func__);
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return -EIO;
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}
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}
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return 0;
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}
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static void uda1380_flush_work(struct work_struct *work)
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{
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struct uda1380_priv *uda1380 = container_of(work, struct uda1380_priv, work);
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struct snd_soc_codec *uda1380_codec = uda1380->codec;
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int bit, reg;
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for_each_set_bit(bit, &uda1380_cache_dirty, UDA1380_CACHEREGNUM - 0x10) {
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reg = 0x10 + bit;
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pr_debug("uda1380: flush reg %x val %x:\n", reg,
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uda1380_read_reg_cache(uda1380_codec, reg));
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uda1380_write(uda1380_codec, reg,
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uda1380_read_reg_cache(uda1380_codec, reg));
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clear_bit(bit, &uda1380_cache_dirty);
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}
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}
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/* declarations of ALSA reg_elem_REAL controls */
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static const char *uda1380_deemp[] = {
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"None",
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"32kHz",
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"44.1kHz",
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"48kHz",
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"96kHz",
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};
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static const char *uda1380_input_sel[] = {
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"Line",
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"Mic + Line R",
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"Line L",
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"Mic",
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};
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static const char *uda1380_output_sel[] = {
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"DAC",
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"Analog Mixer",
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};
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static const char *uda1380_spf_mode[] = {
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"Flat",
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"Minimum1",
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"Minimum2",
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"Maximum"
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};
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static const char *uda1380_capture_sel[] = {
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"ADC",
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"Digital Mixer"
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};
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static const char *uda1380_sel_ns[] = {
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"3rd-order",
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"5th-order"
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};
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static const char *uda1380_mix_control[] = {
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"off",
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"PCM only",
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"before sound processing",
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"after sound processing"
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};
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static const char *uda1380_sdet_setting[] = {
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"3200",
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"4800",
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"9600",
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"19200"
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};
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static const char *uda1380_os_setting[] = {
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"single-speed",
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"double-speed (no mixing)",
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"quad-speed (no mixing)"
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};
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static const struct soc_enum uda1380_deemp_enum[] = {
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SOC_ENUM_SINGLE(UDA1380_DEEMP, 8, ARRAY_SIZE(uda1380_deemp),
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uda1380_deemp),
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SOC_ENUM_SINGLE(UDA1380_DEEMP, 0, ARRAY_SIZE(uda1380_deemp),
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uda1380_deemp),
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};
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static SOC_ENUM_SINGLE_DECL(uda1380_input_sel_enum,
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UDA1380_ADC, 2, uda1380_input_sel); /* SEL_MIC, SEL_LNA */
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static SOC_ENUM_SINGLE_DECL(uda1380_output_sel_enum,
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UDA1380_PM, 7, uda1380_output_sel); /* R02_EN_AVC */
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static SOC_ENUM_SINGLE_DECL(uda1380_spf_enum,
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UDA1380_MODE, 14, uda1380_spf_mode); /* M */
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static SOC_ENUM_SINGLE_DECL(uda1380_capture_sel_enum,
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UDA1380_IFACE, 6, uda1380_capture_sel); /* SEL_SOURCE */
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static SOC_ENUM_SINGLE_DECL(uda1380_sel_ns_enum,
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UDA1380_MIXER, 14, uda1380_sel_ns); /* SEL_NS */
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static SOC_ENUM_SINGLE_DECL(uda1380_mix_enum,
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UDA1380_MIXER, 12, uda1380_mix_control); /* MIX, MIX_POS */
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static SOC_ENUM_SINGLE_DECL(uda1380_sdet_enum,
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UDA1380_MIXER, 4, uda1380_sdet_setting); /* SD_VALUE */
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static SOC_ENUM_SINGLE_DECL(uda1380_os_enum,
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UDA1380_MIXER, 0, uda1380_os_setting); /* OS */
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/*
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* from -48 dB in 1.5 dB steps (mute instead of -49.5 dB)
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*/
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static DECLARE_TLV_DB_SCALE(amix_tlv, -4950, 150, 1);
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/*
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* from -78 dB in 1 dB steps (3 dB steps, really. LSB are ignored),
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* from -66 dB in 0.5 dB steps (2 dB steps, really) and
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* from -52 dB in 0.25 dB steps
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*/
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static const DECLARE_TLV_DB_RANGE(mvol_tlv,
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0, 15, TLV_DB_SCALE_ITEM(-8200, 100, 1),
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16, 43, TLV_DB_SCALE_ITEM(-6600, 50, 0),
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44, 252, TLV_DB_SCALE_ITEM(-5200, 25, 0)
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);
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/*
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* from -72 dB in 1.5 dB steps (6 dB steps really),
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* from -66 dB in 0.75 dB steps (3 dB steps really),
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* from -60 dB in 0.5 dB steps (2 dB steps really) and
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* from -46 dB in 0.25 dB steps
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*/
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static const DECLARE_TLV_DB_RANGE(vc_tlv,
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0, 7, TLV_DB_SCALE_ITEM(-7800, 150, 1),
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8, 15, TLV_DB_SCALE_ITEM(-6600, 75, 0),
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16, 43, TLV_DB_SCALE_ITEM(-6000, 50, 0),
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44, 228, TLV_DB_SCALE_ITEM(-4600, 25, 0)
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);
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/* from 0 to 6 dB in 2 dB steps if SPF mode != flat */
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static DECLARE_TLV_DB_SCALE(tr_tlv, 0, 200, 0);
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/* from 0 to 24 dB in 2 dB steps, if SPF mode == maximum, otherwise cuts
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* off at 18 dB max) */
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static DECLARE_TLV_DB_SCALE(bb_tlv, 0, 200, 0);
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/* from -63 to 24 dB in 0.5 dB steps (-128...48) */
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static DECLARE_TLV_DB_SCALE(dec_tlv, -6400, 50, 1);
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/* from 0 to 24 dB in 3 dB steps */
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static DECLARE_TLV_DB_SCALE(pga_tlv, 0, 300, 0);
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/* from 0 to 30 dB in 2 dB steps */
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static DECLARE_TLV_DB_SCALE(vga_tlv, 0, 200, 0);
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static const struct snd_kcontrol_new uda1380_snd_controls[] = {
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SOC_DOUBLE_TLV("Analog Mixer Volume", UDA1380_AMIX, 0, 8, 44, 1, amix_tlv), /* AVCR, AVCL */
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SOC_DOUBLE_TLV("Master Playback Volume", UDA1380_MVOL, 0, 8, 252, 1, mvol_tlv), /* MVCL, MVCR */
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SOC_SINGLE_TLV("ADC Playback Volume", UDA1380_MIXVOL, 8, 228, 1, vc_tlv), /* VC2 */
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SOC_SINGLE_TLV("PCM Playback Volume", UDA1380_MIXVOL, 0, 228, 1, vc_tlv), /* VC1 */
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SOC_ENUM("Sound Processing Filter", uda1380_spf_enum), /* M */
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SOC_DOUBLE_TLV("Tone Control - Treble", UDA1380_MODE, 4, 12, 3, 0, tr_tlv), /* TRL, TRR */
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SOC_DOUBLE_TLV("Tone Control - Bass", UDA1380_MODE, 0, 8, 15, 0, bb_tlv), /* BBL, BBR */
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/**/ SOC_SINGLE("Master Playback Switch", UDA1380_DEEMP, 14, 1, 1), /* MTM */
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SOC_SINGLE("ADC Playback Switch", UDA1380_DEEMP, 11, 1, 1), /* MT2 from decimation filter */
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SOC_ENUM("ADC Playback De-emphasis", uda1380_deemp_enum[0]), /* DE2 */
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SOC_SINGLE("PCM Playback Switch", UDA1380_DEEMP, 3, 1, 1), /* MT1, from digital data input */
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SOC_ENUM("PCM Playback De-emphasis", uda1380_deemp_enum[1]), /* DE1 */
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SOC_SINGLE("DAC Polarity inverting Switch", UDA1380_MIXER, 15, 1, 0), /* DA_POL_INV */
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SOC_ENUM("Noise Shaper", uda1380_sel_ns_enum), /* SEL_NS */
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SOC_ENUM("Digital Mixer Signal Control", uda1380_mix_enum), /* MIX_POS, MIX */
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SOC_SINGLE("Silence Detector Switch", UDA1380_MIXER, 6, 1, 0), /* SDET_ON */
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SOC_ENUM("Silence Detector Setting", uda1380_sdet_enum), /* SD_VALUE */
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SOC_ENUM("Oversampling Input", uda1380_os_enum), /* OS */
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SOC_DOUBLE_S8_TLV("ADC Capture Volume", UDA1380_DEC, -128, 48, dec_tlv), /* ML_DEC, MR_DEC */
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/**/ SOC_SINGLE("ADC Capture Switch", UDA1380_PGA, 15, 1, 1), /* MT_ADC */
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SOC_DOUBLE_TLV("Line Capture Volume", UDA1380_PGA, 0, 8, 8, 0, pga_tlv), /* PGA_GAINCTRLL, PGA_GAINCTRLR */
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SOC_SINGLE("ADC Polarity inverting Switch", UDA1380_ADC, 12, 1, 0), /* ADCPOL_INV */
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SOC_SINGLE_TLV("Mic Capture Volume", UDA1380_ADC, 8, 15, 0, vga_tlv), /* VGA_CTRL */
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SOC_SINGLE("DC Filter Bypass Switch", UDA1380_ADC, 1, 1, 0), /* SKIP_DCFIL (before decimator) */
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SOC_SINGLE("DC Filter Enable Switch", UDA1380_ADC, 0, 1, 0), /* EN_DCFIL (at output of decimator) */
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SOC_SINGLE("AGC Timing", UDA1380_AGC, 8, 7, 0), /* TODO: enum, see table 62 */
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SOC_SINGLE("AGC Target level", UDA1380_AGC, 2, 3, 1), /* AGC_LEVEL */
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/* -5.5, -8, -11.5, -14 dBFS */
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SOC_SINGLE("AGC Switch", UDA1380_AGC, 0, 1, 0),
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};
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/* Input mux */
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static const struct snd_kcontrol_new uda1380_input_mux_control =
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SOC_DAPM_ENUM("Route", uda1380_input_sel_enum);
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/* Output mux */
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static const struct snd_kcontrol_new uda1380_output_mux_control =
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SOC_DAPM_ENUM("Route", uda1380_output_sel_enum);
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/* Capture mux */
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static const struct snd_kcontrol_new uda1380_capture_mux_control =
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SOC_DAPM_ENUM("Route", uda1380_capture_sel_enum);
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static const struct snd_soc_dapm_widget uda1380_dapm_widgets[] = {
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SND_SOC_DAPM_MUX("Input Mux", SND_SOC_NOPM, 0, 0,
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&uda1380_input_mux_control),
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SND_SOC_DAPM_MUX("Output Mux", SND_SOC_NOPM, 0, 0,
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&uda1380_output_mux_control),
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SND_SOC_DAPM_MUX("Capture Mux", SND_SOC_NOPM, 0, 0,
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&uda1380_capture_mux_control),
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SND_SOC_DAPM_PGA("Left PGA", UDA1380_PM, 3, 0, NULL, 0),
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SND_SOC_DAPM_PGA("Right PGA", UDA1380_PM, 1, 0, NULL, 0),
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SND_SOC_DAPM_PGA("Mic LNA", UDA1380_PM, 4, 0, NULL, 0),
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SND_SOC_DAPM_ADC("Left ADC", "Left Capture", UDA1380_PM, 2, 0),
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SND_SOC_DAPM_ADC("Right ADC", "Right Capture", UDA1380_PM, 0, 0),
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SND_SOC_DAPM_INPUT("VINM"),
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SND_SOC_DAPM_INPUT("VINL"),
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SND_SOC_DAPM_INPUT("VINR"),
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SND_SOC_DAPM_MIXER("Analog Mixer", UDA1380_PM, 6, 0, NULL, 0),
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SND_SOC_DAPM_OUTPUT("VOUTLHP"),
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SND_SOC_DAPM_OUTPUT("VOUTRHP"),
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SND_SOC_DAPM_OUTPUT("VOUTL"),
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SND_SOC_DAPM_OUTPUT("VOUTR"),
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SND_SOC_DAPM_DAC("DAC", "Playback", UDA1380_PM, 10, 0),
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SND_SOC_DAPM_PGA("HeadPhone Driver", UDA1380_PM, 13, 0, NULL, 0),
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};
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static const struct snd_soc_dapm_route uda1380_dapm_routes[] = {
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/* output mux */
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{"HeadPhone Driver", NULL, "Output Mux"},
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{"VOUTR", NULL, "Output Mux"},
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{"VOUTL", NULL, "Output Mux"},
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{"Analog Mixer", NULL, "VINR"},
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{"Analog Mixer", NULL, "VINL"},
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{"Analog Mixer", NULL, "DAC"},
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{"Output Mux", "DAC", "DAC"},
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{"Output Mux", "Analog Mixer", "Analog Mixer"},
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/* {"DAC", "Digital Mixer", "I2S" } */
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/* headphone driver */
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{"VOUTLHP", NULL, "HeadPhone Driver"},
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{"VOUTRHP", NULL, "HeadPhone Driver"},
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/* input mux */
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{"Left ADC", NULL, "Input Mux"},
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{"Input Mux", "Mic", "Mic LNA"},
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{"Input Mux", "Mic + Line R", "Mic LNA"},
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{"Input Mux", "Line L", "Left PGA"},
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{"Input Mux", "Line", "Left PGA"},
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/* right input */
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{"Right ADC", "Mic + Line R", "Right PGA"},
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{"Right ADC", "Line", "Right PGA"},
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/* inputs */
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{"Mic LNA", NULL, "VINM"},
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{"Left PGA", NULL, "VINL"},
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{"Right PGA", NULL, "VINR"},
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};
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static int uda1380_set_dai_fmt_both(struct snd_soc_dai *codec_dai,
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unsigned int fmt)
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{
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struct snd_soc_codec *codec = codec_dai->codec;
|
|
int iface;
|
|
|
|
/* set up DAI based upon fmt */
|
|
iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
|
|
iface &= ~(R01_SFORI_MASK | R01_SIM | R01_SFORO_MASK);
|
|
|
|
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
|
|
case SND_SOC_DAIFMT_I2S:
|
|
iface |= R01_SFORI_I2S | R01_SFORO_I2S;
|
|
break;
|
|
case SND_SOC_DAIFMT_LSB:
|
|
iface |= R01_SFORI_LSB16 | R01_SFORO_LSB16;
|
|
break;
|
|
case SND_SOC_DAIFMT_MSB:
|
|
iface |= R01_SFORI_MSB | R01_SFORO_MSB;
|
|
}
|
|
|
|
/* DATAI is slave only, so in single-link mode, this has to be slave */
|
|
if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
|
|
return -EINVAL;
|
|
|
|
uda1380_write_reg_cache(codec, UDA1380_IFACE, iface);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int uda1380_set_dai_fmt_playback(struct snd_soc_dai *codec_dai,
|
|
unsigned int fmt)
|
|
{
|
|
struct snd_soc_codec *codec = codec_dai->codec;
|
|
int iface;
|
|
|
|
/* set up DAI based upon fmt */
|
|
iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
|
|
iface &= ~R01_SFORI_MASK;
|
|
|
|
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
|
|
case SND_SOC_DAIFMT_I2S:
|
|
iface |= R01_SFORI_I2S;
|
|
break;
|
|
case SND_SOC_DAIFMT_LSB:
|
|
iface |= R01_SFORI_LSB16;
|
|
break;
|
|
case SND_SOC_DAIFMT_MSB:
|
|
iface |= R01_SFORI_MSB;
|
|
}
|
|
|
|
/* DATAI is slave only, so this has to be slave */
|
|
if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) != SND_SOC_DAIFMT_CBS_CFS)
|
|
return -EINVAL;
|
|
|
|
uda1380_write(codec, UDA1380_IFACE, iface);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int uda1380_set_dai_fmt_capture(struct snd_soc_dai *codec_dai,
|
|
unsigned int fmt)
|
|
{
|
|
struct snd_soc_codec *codec = codec_dai->codec;
|
|
int iface;
|
|
|
|
/* set up DAI based upon fmt */
|
|
iface = uda1380_read_reg_cache(codec, UDA1380_IFACE);
|
|
iface &= ~(R01_SIM | R01_SFORO_MASK);
|
|
|
|
switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
|
|
case SND_SOC_DAIFMT_I2S:
|
|
iface |= R01_SFORO_I2S;
|
|
break;
|
|
case SND_SOC_DAIFMT_LSB:
|
|
iface |= R01_SFORO_LSB16;
|
|
break;
|
|
case SND_SOC_DAIFMT_MSB:
|
|
iface |= R01_SFORO_MSB;
|
|
}
|
|
|
|
if ((fmt & SND_SOC_DAIFMT_MASTER_MASK) == SND_SOC_DAIFMT_CBM_CFM)
|
|
iface |= R01_SIM;
|
|
|
|
uda1380_write(codec, UDA1380_IFACE, iface);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int uda1380_trigger(struct snd_pcm_substream *substream, int cmd,
|
|
struct snd_soc_dai *dai)
|
|
{
|
|
struct snd_soc_codec *codec = dai->codec;
|
|
struct uda1380_priv *uda1380 = snd_soc_codec_get_drvdata(codec);
|
|
int mixer = uda1380_read_reg_cache(codec, UDA1380_MIXER);
|
|
|
|
switch (cmd) {
|
|
case SNDRV_PCM_TRIGGER_START:
|
|
case SNDRV_PCM_TRIGGER_PAUSE_RELEASE:
|
|
uda1380_write_reg_cache(codec, UDA1380_MIXER,
|
|
mixer & ~R14_SILENCE);
|
|
schedule_work(&uda1380->work);
|
|
break;
|
|
case SNDRV_PCM_TRIGGER_STOP:
|
|
case SNDRV_PCM_TRIGGER_PAUSE_PUSH:
|
|
uda1380_write_reg_cache(codec, UDA1380_MIXER,
|
|
mixer | R14_SILENCE);
|
|
schedule_work(&uda1380->work);
|
|
break;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
static int uda1380_pcm_hw_params(struct snd_pcm_substream *substream,
|
|
struct snd_pcm_hw_params *params,
|
|
struct snd_soc_dai *dai)
|
|
{
|
|
struct snd_soc_codec *codec = dai->codec;
|
|
u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
|
|
|
|
/* set WSPLL power and divider if running from this clock */
|
|
if (clk & R00_DAC_CLK) {
|
|
int rate = params_rate(params);
|
|
u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
|
|
clk &= ~0x3; /* clear SEL_LOOP_DIV */
|
|
switch (rate) {
|
|
case 6250 ... 12500:
|
|
clk |= 0x0;
|
|
break;
|
|
case 12501 ... 25000:
|
|
clk |= 0x1;
|
|
break;
|
|
case 25001 ... 50000:
|
|
clk |= 0x2;
|
|
break;
|
|
case 50001 ... 100000:
|
|
clk |= 0x3;
|
|
break;
|
|
}
|
|
uda1380_write(codec, UDA1380_PM, R02_PON_PLL | pm);
|
|
}
|
|
|
|
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
|
|
clk |= R00_EN_DAC | R00_EN_INT;
|
|
else
|
|
clk |= R00_EN_ADC | R00_EN_DEC;
|
|
|
|
uda1380_write(codec, UDA1380_CLK, clk);
|
|
return 0;
|
|
}
|
|
|
|
static void uda1380_pcm_shutdown(struct snd_pcm_substream *substream,
|
|
struct snd_soc_dai *dai)
|
|
{
|
|
struct snd_soc_codec *codec = dai->codec;
|
|
u16 clk = uda1380_read_reg_cache(codec, UDA1380_CLK);
|
|
|
|
/* shut down WSPLL power if running from this clock */
|
|
if (clk & R00_DAC_CLK) {
|
|
u16 pm = uda1380_read_reg_cache(codec, UDA1380_PM);
|
|
uda1380_write(codec, UDA1380_PM, ~R02_PON_PLL & pm);
|
|
}
|
|
|
|
if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK)
|
|
clk &= ~(R00_EN_DAC | R00_EN_INT);
|
|
else
|
|
clk &= ~(R00_EN_ADC | R00_EN_DEC);
|
|
|
|
uda1380_write(codec, UDA1380_CLK, clk);
|
|
}
|
|
|
|
static int uda1380_set_bias_level(struct snd_soc_codec *codec,
|
|
enum snd_soc_bias_level level)
|
|
{
|
|
int pm = uda1380_read_reg_cache(codec, UDA1380_PM);
|
|
int reg;
|
|
struct uda1380_platform_data *pdata = codec->dev->platform_data;
|
|
|
|
switch (level) {
|
|
case SND_SOC_BIAS_ON:
|
|
case SND_SOC_BIAS_PREPARE:
|
|
/* ADC, DAC on */
|
|
uda1380_write(codec, UDA1380_PM, R02_PON_BIAS | pm);
|
|
break;
|
|
case SND_SOC_BIAS_STANDBY:
|
|
if (snd_soc_codec_get_bias_level(codec) == SND_SOC_BIAS_OFF) {
|
|
if (gpio_is_valid(pdata->gpio_power)) {
|
|
gpio_set_value(pdata->gpio_power, 1);
|
|
mdelay(1);
|
|
uda1380_reset(codec);
|
|
}
|
|
|
|
uda1380_sync_cache(codec);
|
|
}
|
|
uda1380_write(codec, UDA1380_PM, 0x0);
|
|
break;
|
|
case SND_SOC_BIAS_OFF:
|
|
if (!gpio_is_valid(pdata->gpio_power))
|
|
break;
|
|
|
|
gpio_set_value(pdata->gpio_power, 0);
|
|
|
|
/* Mark mixer regs cache dirty to sync them with
|
|
* codec regs on power on.
|
|
*/
|
|
for (reg = UDA1380_MVOL; reg < UDA1380_CACHEREGNUM; reg++)
|
|
set_bit(reg - 0x10, &uda1380_cache_dirty);
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
#define UDA1380_RATES (SNDRV_PCM_RATE_8000 | SNDRV_PCM_RATE_11025 |\
|
|
SNDRV_PCM_RATE_16000 | SNDRV_PCM_RATE_22050 |\
|
|
SNDRV_PCM_RATE_44100 | SNDRV_PCM_RATE_48000)
|
|
|
|
static const struct snd_soc_dai_ops uda1380_dai_ops = {
|
|
.hw_params = uda1380_pcm_hw_params,
|
|
.shutdown = uda1380_pcm_shutdown,
|
|
.trigger = uda1380_trigger,
|
|
.set_fmt = uda1380_set_dai_fmt_both,
|
|
};
|
|
|
|
static const struct snd_soc_dai_ops uda1380_dai_ops_playback = {
|
|
.hw_params = uda1380_pcm_hw_params,
|
|
.shutdown = uda1380_pcm_shutdown,
|
|
.trigger = uda1380_trigger,
|
|
.set_fmt = uda1380_set_dai_fmt_playback,
|
|
};
|
|
|
|
static const struct snd_soc_dai_ops uda1380_dai_ops_capture = {
|
|
.hw_params = uda1380_pcm_hw_params,
|
|
.shutdown = uda1380_pcm_shutdown,
|
|
.trigger = uda1380_trigger,
|
|
.set_fmt = uda1380_set_dai_fmt_capture,
|
|
};
|
|
|
|
static struct snd_soc_dai_driver uda1380_dai[] = {
|
|
{
|
|
.name = "uda1380-hifi",
|
|
.playback = {
|
|
.stream_name = "Playback",
|
|
.channels_min = 1,
|
|
.channels_max = 2,
|
|
.rates = UDA1380_RATES,
|
|
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
|
|
.capture = {
|
|
.stream_name = "Capture",
|
|
.channels_min = 1,
|
|
.channels_max = 2,
|
|
.rates = UDA1380_RATES,
|
|
.formats = SNDRV_PCM_FMTBIT_S16_LE,},
|
|
.ops = &uda1380_dai_ops,
|
|
},
|
|
{ /* playback only - dual interface */
|
|
.name = "uda1380-hifi-playback",
|
|
.playback = {
|
|
.stream_name = "Playback",
|
|
.channels_min = 1,
|
|
.channels_max = 2,
|
|
.rates = UDA1380_RATES,
|
|
.formats = SNDRV_PCM_FMTBIT_S16_LE,
|
|
},
|
|
.ops = &uda1380_dai_ops_playback,
|
|
},
|
|
{ /* capture only - dual interface*/
|
|
.name = "uda1380-hifi-capture",
|
|
.capture = {
|
|
.stream_name = "Capture",
|
|
.channels_min = 1,
|
|
.channels_max = 2,
|
|
.rates = UDA1380_RATES,
|
|
.formats = SNDRV_PCM_FMTBIT_S16_LE,
|
|
},
|
|
.ops = &uda1380_dai_ops_capture,
|
|
},
|
|
};
|
|
|
|
static int uda1380_probe(struct snd_soc_codec *codec)
|
|
{
|
|
struct uda1380_platform_data *pdata =codec->dev->platform_data;
|
|
struct uda1380_priv *uda1380 = snd_soc_codec_get_drvdata(codec);
|
|
int ret;
|
|
|
|
uda1380->codec = codec;
|
|
|
|
codec->hw_write = (hw_write_t)i2c_master_send;
|
|
codec->control_data = uda1380->control_data;
|
|
|
|
if (!pdata)
|
|
return -EINVAL;
|
|
|
|
if (gpio_is_valid(pdata->gpio_reset)) {
|
|
ret = gpio_request_one(pdata->gpio_reset, GPIOF_OUT_INIT_LOW,
|
|
"uda1380 reset");
|
|
if (ret)
|
|
goto err_out;
|
|
}
|
|
|
|
if (gpio_is_valid(pdata->gpio_power)) {
|
|
ret = gpio_request_one(pdata->gpio_power, GPIOF_OUT_INIT_LOW,
|
|
"uda1380 power");
|
|
if (ret)
|
|
goto err_free_gpio;
|
|
} else {
|
|
ret = uda1380_reset(codec);
|
|
if (ret)
|
|
goto err_free_gpio;
|
|
}
|
|
|
|
INIT_WORK(&uda1380->work, uda1380_flush_work);
|
|
|
|
/* set clock input */
|
|
switch (pdata->dac_clk) {
|
|
case UDA1380_DAC_CLK_SYSCLK:
|
|
uda1380_write_reg_cache(codec, UDA1380_CLK, 0);
|
|
break;
|
|
case UDA1380_DAC_CLK_WSPLL:
|
|
uda1380_write_reg_cache(codec, UDA1380_CLK,
|
|
R00_DAC_CLK);
|
|
break;
|
|
}
|
|
|
|
return 0;
|
|
|
|
err_free_gpio:
|
|
if (gpio_is_valid(pdata->gpio_reset))
|
|
gpio_free(pdata->gpio_reset);
|
|
err_out:
|
|
return ret;
|
|
}
|
|
|
|
/* power down chip */
|
|
static int uda1380_remove(struct snd_soc_codec *codec)
|
|
{
|
|
struct uda1380_platform_data *pdata =codec->dev->platform_data;
|
|
|
|
gpio_free(pdata->gpio_reset);
|
|
gpio_free(pdata->gpio_power);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct snd_soc_codec_driver soc_codec_dev_uda1380 = {
|
|
.probe = uda1380_probe,
|
|
.remove = uda1380_remove,
|
|
.read = uda1380_read_reg_cache,
|
|
.write = uda1380_write,
|
|
.set_bias_level = uda1380_set_bias_level,
|
|
.suspend_bias_off = true,
|
|
|
|
.reg_cache_size = ARRAY_SIZE(uda1380_reg),
|
|
.reg_word_size = sizeof(u16),
|
|
.reg_cache_default = uda1380_reg,
|
|
.reg_cache_step = 1,
|
|
|
|
.component_driver = {
|
|
.controls = uda1380_snd_controls,
|
|
.num_controls = ARRAY_SIZE(uda1380_snd_controls),
|
|
.dapm_widgets = uda1380_dapm_widgets,
|
|
.num_dapm_widgets = ARRAY_SIZE(uda1380_dapm_widgets),
|
|
.dapm_routes = uda1380_dapm_routes,
|
|
.num_dapm_routes = ARRAY_SIZE(uda1380_dapm_routes),
|
|
},
|
|
};
|
|
|
|
#if IS_ENABLED(CONFIG_I2C)
|
|
static int uda1380_i2c_probe(struct i2c_client *i2c,
|
|
const struct i2c_device_id *id)
|
|
{
|
|
struct uda1380_priv *uda1380;
|
|
int ret;
|
|
|
|
uda1380 = devm_kzalloc(&i2c->dev, sizeof(struct uda1380_priv),
|
|
GFP_KERNEL);
|
|
if (uda1380 == NULL)
|
|
return -ENOMEM;
|
|
|
|
i2c_set_clientdata(i2c, uda1380);
|
|
uda1380->control_data = i2c;
|
|
|
|
ret = snd_soc_register_codec(&i2c->dev,
|
|
&soc_codec_dev_uda1380, uda1380_dai, ARRAY_SIZE(uda1380_dai));
|
|
return ret;
|
|
}
|
|
|
|
static int uda1380_i2c_remove(struct i2c_client *i2c)
|
|
{
|
|
snd_soc_unregister_codec(&i2c->dev);
|
|
return 0;
|
|
}
|
|
|
|
static const struct i2c_device_id uda1380_i2c_id[] = {
|
|
{ "uda1380", 0 },
|
|
{ }
|
|
};
|
|
MODULE_DEVICE_TABLE(i2c, uda1380_i2c_id);
|
|
|
|
static struct i2c_driver uda1380_i2c_driver = {
|
|
.driver = {
|
|
.name = "uda1380-codec",
|
|
},
|
|
.probe = uda1380_i2c_probe,
|
|
.remove = uda1380_i2c_remove,
|
|
.id_table = uda1380_i2c_id,
|
|
};
|
|
#endif
|
|
|
|
static int __init uda1380_modinit(void)
|
|
{
|
|
int ret = 0;
|
|
#if IS_ENABLED(CONFIG_I2C)
|
|
ret = i2c_add_driver(&uda1380_i2c_driver);
|
|
if (ret != 0)
|
|
pr_err("Failed to register UDA1380 I2C driver: %d\n", ret);
|
|
#endif
|
|
return ret;
|
|
}
|
|
module_init(uda1380_modinit);
|
|
|
|
static void __exit uda1380_exit(void)
|
|
{
|
|
#if IS_ENABLED(CONFIG_I2C)
|
|
i2c_del_driver(&uda1380_i2c_driver);
|
|
#endif
|
|
}
|
|
module_exit(uda1380_exit);
|
|
|
|
MODULE_AUTHOR("Giorgio Padrin");
|
|
MODULE_DESCRIPTION("Audio support for codec Philips UDA1380");
|
|
MODULE_LICENSE("GPL");
|